mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
rename to hcd_edpt_open()
This commit is contained in:
parent
7deac61d5f
commit
0d04e6eb96
@ -173,7 +173,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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// notification endpoint
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tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) p_desc;
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TU_ASSERT( hcd_pipe_open(rhport, dev_addr, ep_desc) );
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TU_ASSERT( hcd_edpt_open(rhport, dev_addr, ep_desc) );
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p_cdc->ep_notif = ep_desc->bEndpointAddress;
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(*p_length) += p_desc[DESC_OFFSET_LEN];
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@ -194,7 +194,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
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TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
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TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc));
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TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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@ -121,7 +121,7 @@ tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_
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pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ?
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&custom_interface[dev_addr-1].pipe_in : &custom_interface[dev_addr-1].pipe_out;
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*p_pipe_hdl = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_VENDOR_SPECIFIC);
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*p_pipe_hdl = hcd_edpt_open(dev_addr, p_endpoint, TUSB_CLASS_VENDOR_SPECIFIC);
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TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl), TUSB_ERROR_HCD_OPEN_PIPE_FAILED );
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p_desc = descriptor_next(p_desc);
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@ -56,7 +56,7 @@
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//--------------------------------------------------------------------+
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static inline bool hidh_interface_open(uint8_t dev_addr, uint8_t interface_number, tusb_desc_endpoint_t const *p_endpoint_desc, hidh_interface_info_t *p_hid)
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{
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p_hid->pipe_hdl = hcd_pipe_open(dev_addr, p_endpoint_desc, TUSB_CLASS_HID);
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p_hid->pipe_hdl = hcd_edpt_open(dev_addr, p_endpoint_desc, TUSB_CLASS_HID);
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p_hid->report_size = p_endpoint_desc->wMaxPacketSize.size; // TODO get size from report descriptor
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p_hid->interface_number = interface_number;
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@ -307,7 +307,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
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TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
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TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc));
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TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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@ -313,7 +313,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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//--------------------------------------------------------------------+
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// BULK/INT/ISO PIPE API
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//--------------------------------------------------------------------+
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bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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{
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// TODO not support ISO yet
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TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
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@ -128,15 +128,15 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev
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//--------------------------------------------------------------------+
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// Endpoints API
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//--------------------------------------------------------------------+
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bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
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bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
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bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
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//--------------------------------------------------------------------+
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// PIPE API
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//--------------------------------------------------------------------+
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// TODO control xfer should be used via usbh layer
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bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet
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bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete);
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bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO remove
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@ -168,7 +168,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_i
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TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
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TU_ASSERT(TUSB_XFER_INTERRUPT == ep_desc->bmAttributes.xfer);
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TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc));
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TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
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hub_data[dev_addr-1].itf_num = p_interface_desc->bInterfaceNumber;
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hub_data[dev_addr-1].ep_status = ep_desc->bEndpointAddress;
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@ -481,7 +481,7 @@ static void ed_list_remove(ohci_ed_t * p_head, ohci_ed_t * p_ed)
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p_ed->used = 0; // free ED
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}
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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pipe_handle_t hcd_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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{
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pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 };
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@ -236,7 +236,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
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.bInterval = 0
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};
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hcd_pipe_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc);
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hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc);
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return TUSB_ERROR_NONE;
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}
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@ -86,7 +86,7 @@ void test_cdch_open_failed_to_open_notification_endpoint(void)
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{
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pipe_handle_t null_hdl = {0};
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, null_hdl);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, null_hdl);
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//------------- CUT -------------//
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TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length));
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@ -98,8 +98,8 @@ void test_cdch_open_failed_to_open_data_endpoint_out(void)
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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pipe_handle_t null_hdl = {0};
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, null_hdl);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, null_hdl);
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//------------- CUT -------------//
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TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length));
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@ -111,9 +111,9 @@ void test_cdch_open_failed_to_open_data_endpoint_in(void)
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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pipe_handle_t null_hdl = {0};
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, dummy_hld);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, null_hdl);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, dummy_hld);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, null_hdl);
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//------------- CUT -------------//
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TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length));
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@ -131,7 +131,7 @@ void test_cdch_open_length_check(void)
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sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t);
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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hcd_pipe_open_IgnoreAndReturn(dummy_hld);
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hcd_edpt_open_IgnoreAndReturn(dummy_hld);
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tusbh_cdc_mounted_cb_Expect(dev_addr);
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//------------- CUT -------------//
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@ -143,7 +143,7 @@ void test_cdch_open_length_check(void)
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void test_cdch_open_interface_number_check(void)
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{
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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hcd_pipe_open_IgnoreAndReturn(dummy_hld);
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hcd_edpt_open_IgnoreAndReturn(dummy_hld);
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tusbh_cdc_mounted_cb_Expect(dev_addr);
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//------------- CUT -------------//
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@ -156,7 +156,7 @@ void test_cdch_open_interface_number_check(void)
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void test_cdch_open_protocol_check(void)
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{
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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hcd_pipe_open_IgnoreAndReturn(dummy_hld);
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hcd_edpt_open_IgnoreAndReturn(dummy_hld);
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tusbh_cdc_mounted_cb_Expect(dev_addr);
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//------------- CUT -------------//
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@ -169,7 +169,7 @@ void test_cdch_open_protocol_check(void)
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void test_cdch_open_acm_capacity_check(void)
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{
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pipe_handle_t dummy_hld = { .dev_addr = 1 };
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hcd_pipe_open_IgnoreAndReturn(dummy_hld);
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hcd_edpt_open_IgnoreAndReturn(dummy_hld);
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tusbh_cdc_mounted_cb_Expect(dev_addr);
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//------------- CUT -------------//
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@ -187,9 +187,9 @@ void test_cdch_close_device(void)
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pipe_handle_t pipe_out = { .dev_addr = 1, .xfer_type = TUSB_XFER_BULK, .index = 0 };
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pipe_handle_t pipe_int = { .dev_addr = 1, .xfer_type = TUSB_XFER_BULK, .index = 1 };
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_int);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_int);
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tusbh_cdc_mounted_cb_Expect(dev_addr);
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TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) );
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@ -103,9 +103,9 @@ void setUp(void)
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osal_mutex_wait_StubWithCallback(stub_mutex_wait);
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osal_mutex_release_IgnoreAndReturn(TUSB_ERROR_NONE);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out);
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hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_in);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out);
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hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_in);
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}
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void tearDown(void)
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@ -168,7 +168,7 @@ void test_bulk_pipe_close(void)
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};
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uint8_t xfer_data[100];
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
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pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
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TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 100) );
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TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 50) );
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@ -155,7 +155,7 @@ void test_open_bulk_qhd_data(void)
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tusb_desc_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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pipe_hdl = hcd_edpt_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl.xfer_type);
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@ -175,7 +175,7 @@ void test_open_bulk_hs_out_pingstate(void)
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pipe_handle_t pipe_hdl;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC);
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pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ];
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TEST_ASSERT(p_qhd->qtd_overlay.pingstate_err);
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@ -187,7 +187,7 @@ void test_open_bulk_hs_out_pingstate(void)
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void test_bulk_close(void)
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{
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tusb_desc_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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ehci_qhd_t *p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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//------------- Code Under TEST -------------//
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@ -102,7 +102,7 @@ void setUp(void)
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async_head = get_async_head( hostid );
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//------------- pipe open -------------//
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pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
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pipe_hdl_bulk = hcd_edpt_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type);
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@ -148,7 +148,7 @@ void test_bulk_xfer_hs_ping_out(void)
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{
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_usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH;
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC);
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pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC);
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl);
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//------------- Code Under Test -------------//
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@ -144,7 +144,7 @@ void check_int_endpoint_link(ehci_qhd_t *p_prev, ehci_qhd_t *p_qhd)
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void test_open_interrupt_qhd_hs(void)
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{
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
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@ -162,7 +162,7 @@ void test_open_interrupt_hs_interval_1(void)
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int_edp_interval.bInterval = 1;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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TEST_ASSERT_EQUAL(0 , p_int_qhd->interval_ms);
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@ -177,7 +177,7 @@ void test_open_interrupt_hs_interval_2(void)
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int_edp_interval.bInterval = 2;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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TEST_ASSERT_EQUAL(0 , p_int_qhd->interval_ms);
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@ -191,7 +191,7 @@ void test_open_interrupt_hs_interval_3(void)
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int_edp_interval.bInterval = 3;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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TEST_ASSERT_EQUAL(0, p_int_qhd->interval_ms);
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@ -205,7 +205,7 @@ void test_open_interrupt_hs_interval_4(void)
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int_edp_interval.bInterval = 4;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
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p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(1, p_int_qhd->interval_ms);
|
||||
@ -219,7 +219,7 @@ void test_open_interrupt_hs_interval_5(void)
|
||||
int_edp_interval.bInterval = 5;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(2, p_int_qhd->interval_ms);
|
||||
@ -233,7 +233,7 @@ void test_open_interrupt_hs_interval_6(void)
|
||||
int_edp_interval.bInterval = 6;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(4, p_int_qhd->interval_ms);
|
||||
@ -247,7 +247,7 @@ void test_open_interrupt_hs_interval_7(void)
|
||||
int_edp_interval.bInterval = 7;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(8, p_int_qhd->interval_ms);
|
||||
@ -261,7 +261,7 @@ void test_open_interrupt_hs_interval_8(void)
|
||||
int_edp_interval.bInterval = 16;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(255, p_int_qhd->interval_ms);
|
||||
@ -275,7 +275,7 @@ void test_open_interrupt_qhd_non_hs(void)
|
||||
_usbh_devices[dev_addr].speed = TUSB_SPEED_FULL;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
|
||||
|
||||
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
|
||||
TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
|
||||
@ -297,7 +297,7 @@ void test_open_interrupt_qhd_non_hs_9(void)
|
||||
_usbh_devices[dev_addr].speed = TUSB_SPEED_FULL;
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
|
||||
|
||||
TEST_ASSERT_EQUAL(int_edp_interval.bInterval, p_int_qhd->interval_ms);
|
||||
@ -310,7 +310,7 @@ void test_open_interrupt_qhd_non_hs_9(void)
|
||||
//--------------------------------------------------------------------+
|
||||
void test_interrupt_close(void)
|
||||
{
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
|
||||
p_int_qhd = qhd_get_from_pipe_handle(pipe_hdl);
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
@ -328,7 +328,7 @@ void test_interrupt_256ms_close(void)
|
||||
tusb_desc_endpoint_t int_edp_interval = desc_ept_interrupt_out;
|
||||
int_edp_interval.bInterval = 9;
|
||||
|
||||
pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID);
|
||||
p_int_qhd = qhd_get_from_pipe_handle(pipe_hdl);
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
|
@ -104,7 +104,7 @@ void setUp(void)
|
||||
period_head_arr = (ehci_qhd_t*) get_period_head( hostid, 1 );
|
||||
|
||||
//------------- pipe open -------------//
|
||||
pipe_hdl_interrupt = hcd_pipe_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID);
|
||||
pipe_hdl_interrupt = hcd_edpt_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID);
|
||||
|
||||
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_interrupt.dev_addr);
|
||||
TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl_interrupt.xfer_type);
|
||||
@ -220,7 +220,7 @@ void test_interrupt_xfer_complete_isr_interval_2ms(void)
|
||||
tusb_desc_endpoint_t desc_endpoint_2ms = desc_ept_interrupt_in;
|
||||
desc_endpoint_2ms.bInterval = 5;
|
||||
|
||||
pipe_handle_t pipe_hdl_2ms = hcd_pipe_open(dev_addr, &desc_endpoint_2ms, TUSB_CLASS_HID);
|
||||
pipe_handle_t pipe_hdl_2ms = hcd_edpt_open(dev_addr, &desc_endpoint_2ms, TUSB_CLASS_HID);
|
||||
ehci_qhd_t * p_qhd_2ms = &ehci_data.device[ dev_addr -1].qhd[ pipe_hdl_2ms.index ];
|
||||
|
||||
TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_2ms, xfer_data, sizeof(xfer_data), false) );
|
||||
|
@ -94,6 +94,6 @@ tusb_desc_endpoint_t const desc_ept_iso_in =
|
||||
|
||||
void test_open_isochronous(void)
|
||||
{
|
||||
pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO);
|
||||
pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO);
|
||||
TEST_ASSERT_EQUAL(0, pipe_hdl.dev_addr);
|
||||
}
|
||||
|
@ -75,7 +75,7 @@ void tearDown(void)
|
||||
// uint16_t length=0;
|
||||
//
|
||||
// // TODO expect get HID report descriptor
|
||||
// hcd_pipe_open_IgnoreAndReturn( pipe_hdl );
|
||||
// hcd_edpt_open_IgnoreAndReturn( pipe_hdl );
|
||||
//
|
||||
// //------------- Code Under TEST -------------//
|
||||
// TEST_ASSERT_EQUAL(TUSB_ERROR_NONE, hidh_open_subtask(dev_addr, p_kbd_interface_desc, &length) );
|
||||
|
@ -146,7 +146,7 @@ void test_keyboard_open_ok(void)
|
||||
usbh_control_xfer_subtask_ExpectAndReturn(dev_addr, bm_request_type(TUSB_DIR_HOST_TO_DEV, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RECIPIENT_INTERFACE),
|
||||
HID_REQ_CONTROL_SET_IDLE, 0, p_kbd_interface_desc->bInterfaceNumber, 0, NULL,
|
||||
TUSB_ERROR_NONE);
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_kdb_endpoint_desc, TUSB_CLASS_HID, pipe_hdl);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_kdb_endpoint_desc, TUSB_CLASS_HID, pipe_hdl);
|
||||
tusbh_hid_keyboard_mounted_cb_Expect(dev_addr);
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
|
@ -117,7 +117,7 @@ void test_mouse_open_ok(void)
|
||||
usbh_control_xfer_subtask_ExpectAndReturn(dev_addr, bm_request_type(TUSB_DIR_HOST_TO_DEV, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RECIPIENT_INTERFACE),
|
||||
HID_REQ_CONTROL_SET_IDLE, 0, p_mouse_interface_desc->bInterfaceNumber, 0, NULL,
|
||||
TUSB_ERROR_NONE);
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_mouse_endpoint_desc, TUSB_CLASS_HID, pipe_hdl);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_mouse_endpoint_desc, TUSB_CLASS_HID, pipe_hdl);
|
||||
tusbh_hid_mouse_mounted_cb_Expect(dev_addr);
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
|
@ -84,15 +84,15 @@ void tearDown(void)
|
||||
|
||||
void test_open_pipe_in_failed(void)
|
||||
{
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_null);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_null);
|
||||
|
||||
TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length));
|
||||
}
|
||||
|
||||
void test_open_pipe_out_failed(void)
|
||||
{
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, (pipe_handle_t) {1} );
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_null);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, (pipe_handle_t) {1} );
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_null);
|
||||
|
||||
TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length));
|
||||
}
|
||||
@ -121,8 +121,8 @@ tusb_error_t stub_control_xfer(uint8_t dev_addr, uint8_t bmRequestType, uint8_t
|
||||
#if 0 // TODO TEST enable this
|
||||
void test_open_desc_length(void)
|
||||
{
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in);
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out);
|
||||
|
||||
usbh_control_xfer_subtask_IgnoreAndReturn(TUSB_ERROR_NONE);
|
||||
hcd_pipe_xfer_IgnoreAndReturn(TUSB_ERROR_NONE);
|
||||
@ -137,8 +137,8 @@ void test_open_desc_length(void)
|
||||
|
||||
void test_open_ok(void)
|
||||
{
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in);
|
||||
hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in);
|
||||
hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out);
|
||||
|
||||
//------------- get max lun -------------//
|
||||
usbh_control_xfer_subtask_StubWithCallback(stub_control_xfer);
|
||||
|
Loading…
x
Reference in New Issue
Block a user