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move scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2) to hal/hal_lpc43xx.c

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dual host run without problem with mcb4300
This commit is contained in:
hathach 2013-05-23 14:56:11 +07:00
parent 94fc55ba2c
commit 132c3996ea
7 changed files with 11 additions and 12 deletions
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1
demos/bsp/boards/embedded_artists/board_ea4357.c
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@ -56,7 +56,6 @@ void board_init(void)
scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus Power
// USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
// init I2C and set up MIC2555 to have 15k pull-down on USB1 D+ & D-
I2C_Init(LPC_I2C0, 100000);

11
demos/bsp/boards/keil/board_mcb4300.c
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@ -77,14 +77,13 @@ void board_init(void)
SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE) / CFG_TICKS_PER_SECOND); // 1 msec tick timer
//------------- USB Bus power HOST ONLY-------------//
//scu_pinmux(0x6, 3, MD_PUP | MD_EZI, FUNC1); // P6_3 USB0_PWR_EN, USB0 VBus function
// Keil VBUS0 on schematic is F1
// Keil VBUS0 is P6_3
scu_pinmux(0x6, 3, MD_PUP | MD_EZI, FUNC1); // P6_3 USB0_PWR_EN, USB0 VBus function
// TODO USB1 P2_5
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
//scu_pinmux(0x9, 5, MD_PUP | MD_EZI, FUNC2); // P9_5 USB1_PWR_EN, USB1 VBus function
// Keil VBUS1 on schematics is P2_5
// Keil VBUS1 is P9_5
scu_pinmux(0x9, 5, MD_PUP | MD_EZI, FUNC2); // P9_5 USB1_PWR_EN, USB1 VBus function
//------------- LEDs init, J21 must be installed -------------//
for(uint32_t i=0; i<BOARD_MAX_LEDS; i++)

2
demos/bsp/boards/keil/board_mcb4300.h
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@ -56,7 +56,7 @@
extern "C" {
#endif
#define CFG_PRINTF_TARGET PRINTF_TARGET_UART
#define CFG_PRINTF_TARGET PRINTF_TARGET_DEBUG_CONSOLE
#ifdef __cplusplus

1
demos/bsp/boards/ngx/board_ngx4330.c
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@ -55,7 +55,6 @@ void board_init(void)
//------------- USB Bus power HOST ONLY-------------//
scu_pinmux(0x1, 7, MD_PUP | MD_EZI, FUNC4); // P1_7 USB0_PWR_EN, USB0 VBus function Xplorer
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
scu_pinmux(0x2, 6, MD_PUP | MD_EZI, FUNC4); // P2_6 is configured as GPIO5[6] for USB1_PWR_EN
GPIO_SetDir (5, BIT_(6), 1); // GPIO5[6] is output
GPIO_SetValue (5, BIT_(6)); // GPIO5[6] output high

4
demos/host/host_os_none/.cproject
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@ -1180,7 +1180,7 @@
</option>
<option id="gnu.c.link.option.libs.1825587478" name="Libraries (-l)" superClass="gnu.c.link.option.libs"/>
<option id="gnu.c.link.option.paths.916077707" name="Library search path (-L)" superClass="gnu.c.link.option.paths"/>
<option id="com.crt.advproject.link.gcc.hdrlib.1015545513" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.hdrlib.1015545513" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.semihost" valueType="enumerated"/>
<option id="com.crt.advproject.link.fpu.409118044" name="Floating point" superClass="com.crt.advproject.link.fpu" value="com.crt.advproject.link.fpu.fpv4" valueType="enumerated"/>
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.388300407" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
@ -2288,7 +2288,7 @@
</option>
<option id="gnu.c.link.option.libs.495921515" name="Libraries (-l)" superClass="gnu.c.link.option.libs"/>
<option id="gnu.c.link.option.paths.692268551" name="Library search path (-L)" superClass="gnu.c.link.option.paths"/>
<option id="com.crt.advproject.link.gcc.hdrlib.1209404346" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.hdrlib.1209404346" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.semihost" valueType="enumerated"/>
<option id="com.crt.advproject.link.fpu.1664439954" name="Floating point" superClass="com.crt.advproject.link.fpu" value="com.crt.advproject.link.fpu.fpv4" valueType="enumerated"/>
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1521825863" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>

2
demos/host/src/tusb_config.h
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@ -60,7 +60,7 @@
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
#define TUSB_CFG_CONTROLLER0_MODE (TUSB_MODE_HOST)
#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_NONE)
#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_HOST)
//--------------------------------------------------------------------+
// HOST CONFIGURATION

2
tinyusb/hal/hal_lpc43xx.c
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@ -77,6 +77,8 @@ tusb_error_t hal_init(void)
//------------- USB1 Clock, only use on-chip FS PHY -------------//
#if TUSB_CFG_CONTROLLER1_MODE
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
/* connect CLK_USB1 to 60 MHz clock */
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
//LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */