diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 1516c329a..6e657abdb 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -89,7 +89,6 @@ typedef struct {
   uint8_t rhport;       // storage of \a rhport because some callbacks are done without it
 
   // recv handling
-  CFG_TUSB_MEM_ALIGN recv_ntb_t recv_ntb[RECV_NTB_N];   // actual recv NTBs
   recv_ntb_t *recv_free_ntb[RECV_NTB_N];                // free list of recv NTBs
   recv_ntb_t *recv_ready_ntb[RECV_NTB_N];               // NTBs waiting for transmission to glue logic
   recv_ntb_t *recv_tinyusb_ntb;                         // buffer for the running transfer TinyUSB -> driver
@@ -97,7 +96,6 @@ typedef struct {
   uint16_t recv_glue_ntb_datagram_ndx;                  // index into \a recv_glue_ntb_datagram
 
   // xmit handling
-  CFG_TUSB_MEM_ALIGN xmit_ntb_t xmit_ntb[XMIT_NTB_N];   // actual xmit NTBs
   xmit_ntb_t *xmit_free_ntb[XMIT_NTB_N];                // free list of xmit NTBs
   xmit_ntb_t *xmit_ready_ntb[XMIT_NTB_N];               // NTBs waiting for transmission to TinyUSB
   xmit_ntb_t *xmit_tinyusb_ntb;                         // buffer for the running transfer driver -> TinyUSB
@@ -118,7 +116,18 @@ typedef struct {
   bool tud_network_recv_renew_process_again;            // tud_network_recv_renew() should process again
 } ncm_interface_t;
 
-CFG_TUD_MEM_SECTION CFG_TUD_MEM_ALIGN tu_static ncm_interface_t ncm_interface;
+typedef struct {
+  struct {
+    TUD_EPBUF_TYPE_DEF(ntb, recv_ntb_t);
+  } recv[RECV_NTB_N];
+
+  struct {
+    TUD_EPBUF_TYPE_DEF(ntb, xmit_ntb_t);
+  } xmit[XMIT_NTB_N];
+} ncm_epbuf_t;
+
+static ncm_interface_t ncm_interface;
+CFG_TUD_MEM_SECTION static ncm_epbuf_t ncm_epbuf;
 
 /**
  * This is the NTB parameter structure
@@ -126,7 +135,7 @@ CFG_TUD_MEM_SECTION CFG_TUD_MEM_ALIGN tu_static ncm_interface_t ncm_interface;
  * \attention
  *     We are lucky, that byte order is correct
  */
-CFG_TUD_MEM_SECTION CFG_TUD_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = {
+TU_ATTR_ALIGNED(4) static const ntb_parameters_t ntb_parameters = {
   .wLength                  = sizeof(ntb_parameters_t),
   .bmNtbFormatsSupported    = 0x01,// 16-bit NTB supported
   .dwNtbInMaxSize           = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -743,10 +752,10 @@ void netd_init(void) {
   memset(&ncm_interface, 0, sizeof(ncm_interface));
 
   for (int i = 0; i < XMIT_NTB_N; ++i) {
-    ncm_interface.xmit_free_ntb[i] = ncm_interface.xmit_ntb + i;
+    ncm_interface.xmit_free_ntb[i] = &ncm_epbuf.xmit[i].ntb;
   }
   for (int i = 0; i < RECV_NTB_N; ++i) {
-    ncm_interface.recv_free_ntb[i] = ncm_interface.recv_ntb + i;
+    ncm_interface.recv_free_ntb[i] = &ncm_epbuf.recv[i].ntb;
   }
 } // netd_init
 
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index f6f90c592..622c8fc21 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -373,8 +373,8 @@
   #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
   #endif
 
-  #define CFG_TUD_MEM_DCACHE_LINE_SIZE  64
-  #define CFG_TUH_MEM_DCACHE_LINE_SIZE  64
+  #define CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT  64
+  #define CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT  64
 
   #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT  0 // TODO currently have issue with buffer DMA with espressif
 
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index c726add84..e5660861d 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -35,16 +35,17 @@
  extern "C" {
 #endif
 
-// DCache padding for variable to occupy full cache line
 #define TUD_EPBUF_DCACHE_SIZE(_size) \
   (CFG_TUD_MEM_DCACHE_ENABLE ? (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : (_size))
 
+// Declare an endpoint buffer with uint8_t[size]
 #define TUD_EPBUF_DEF(_name, _size) \
   union { \
     CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \
     uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
   };
 
+// Declare an endpoint buffer with a type
 #define TUD_EPBUF_TYPE_DEF(_name, _type) \
   union { \
     CFG_TUD_MEM_ALIGN _type _name; \
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index 84a8360c5..6220716d3 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -116,7 +116,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint
 //--------------------------------------------------------------------+
 #if CFG_TUD_DWC2_DMA_ENABLE || CFG_TUH_DWC2_DMA_ENABLE
 #if defined(SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE) && SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-#include "hal/cache_hal.h"
 #include "esp_cache.h"
 
 #if CFG_TUD_MEM_DCACHE_LINE_SIZE != CONFIG_CACHE_L1_CACHE_LINE_SIZE || \
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 68fd90de9..2f07b8da6 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -433,7 +433,11 @@
 #endif
 
 #ifndef CFG_TUD_MEM_DCACHE_LINE_SIZE
-  #define CFG_TUD_MEM_DCACHE_LINE_SIZE 32
+  #ifndef CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT
+  #define CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+  #endif
+
+  #define CFG_TUD_MEM_DCACHE_LINE_SIZE CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT
 #endif
 
 #ifndef CFG_TUD_ENDPOINT0_SIZE
@@ -543,6 +547,22 @@
   #define CFG_TUH_MEM_ALIGN     CFG_TUSB_MEM_ALIGN
 #endif
 
+#ifndef CFG_TUH_MEM_DCACHE_ENABLE
+  #ifndef CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT  0
+  #endif
+
+  #define CFG_TUH_MEM_DCACHE_ENABLE   CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT
+#endif
+
+#ifndef CFG_TUH_MEM_DCACHE_LINE_SIZE
+  #ifndef CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT
+  #define CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+  #endif
+
+  #define CFG_TUH_MEM_DCACHE_LINE_SIZE CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT
+#endif
+
 //------------- CLASS -------------//
 
 #ifndef CFG_TUH_HUB