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https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
nrf52 cdc example work on nrf52840pdk
- add tud_cdc_flush(), auto flush with sof is enabled by default. -
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7a628f4dfc
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2f0fcf80e0
@ -134,12 +134,10 @@ static void power_usb_event_handler(nrf_drv_power_usb_evt_t event)
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nrf_usbd_isosplit_set(NRF_USBD_ISOSPLIT_Half);
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// Enable interrupt
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// Enable interrupt. SOF is used as CDC auto flush
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NRF_USBD->INTENSET = USBD_INTEN_USBRESET_Msk | USBD_INTEN_USBEVENT_Msk | USBD_INTEN_ACCESSFAULT_Msk |
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USBD_INTEN_EP0SETUP_Msk | USBD_INTEN_EP0DATADONE_Msk |
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USBD_INTEN_ENDEPIN0_Msk | USBD_INTEN_ENDEPOUT0_Msk |
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/*USBD_INTEN_STARTED_Msk |*/ USBD_INTEN_EPDATA_Msk ;
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//USBD_INTEN_SOF_Msk
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USBD_INTEN_EP0SETUP_Msk | USBD_INTEN_EP0DATADONE_Msk | USBD_INTEN_ENDEPIN0_Msk | USBD_INTEN_ENDEPOUT0_Msk |
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USBD_INTEN_EPDATA_Msk | USBD_INTEN_SOF_Msk;
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// if (enable_sof || nrf_drv_usbd_errata_104())
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// {
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@ -200,7 +198,7 @@ bool tusb_dcd_init (uint8_t port)
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{
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.handler = power_usb_event_handler
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};
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VERIFY( NRF_SUCCESS == nrf_drv_power_usbevt_init(&config) );
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return ( NRF_SUCCESS == nrf_drv_power_usbevt_init(&config) );
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}
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void tusb_dcd_connect (uint8_t port)
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@ -215,7 +213,6 @@ void tusb_dcd_disconnect (uint8_t port)
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void tusb_dcd_set_address (uint8_t port, uint8_t dev_addr)
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{
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(void) port;
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// Set Address is automatically update by hw controller
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}
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@ -223,7 +220,6 @@ void tusb_dcd_set_config (uint8_t port, uint8_t config_num)
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{
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(void) port;
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(void) config_num;
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// Nothing to do
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}
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@ -330,16 +326,24 @@ void tusb_dcd_control_stall (uint8_t port)
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*------------------------------------------------------------------*/
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static void normal_xact_start(uint8_t epnum, uint8_t dir)
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{
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// Each transaction is up to Max Packet Size
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nom_xfer_t* xfer = &_dcd.xfer[dir][epnum-1];
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// Each transaction is up to Max Packet Size
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uint8_t const xact_len = min16_of(xfer->total_len - xfer->actual_len, xfer->mps);
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if ( dir == TUSB_DIR_OUT )
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{
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// HW issue on nrf5284 sample, SIZE.EPOUT won't trigger ACK as spec
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// use the back door interface as sdk for walk around
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#if 0
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// Overwrite size will allow hw to accept data
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NRF_USBD->SIZE.EPOUT[epnum] = 0;
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__ISB(); __DSB();
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#else
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + 2*epnum;
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0;
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(void) (((volatile uint32_t *)(NRF_USBD_BASE + 0x804)));
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#endif
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}else
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{
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NRF_USBD->EPIN[epnum].PTR = (uint32_t) xfer->buffer;
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@ -413,10 +417,19 @@ void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr)
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}
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// TODO may remove
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr)
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{
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return true;
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(void) port;
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// USBD shouldn't check control endpoint state
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if ( 0 == ep_addr ) return false;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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nom_xfer_t* xfer = &_dcd.xfer[dir][epnum-1];
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return xfer->actual_len < xfer->total_len;
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}
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/*------------------------------------------------------------------*/
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@ -443,7 +456,6 @@ void USBD_IRQHandler(void)
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}
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/*------------- Interrupt Processing -------------*/
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if ( int_status & USBD_INTEN_USBRESET_Msk )
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{
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bus_reset();
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@ -451,6 +463,11 @@ void USBD_IRQHandler(void)
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tusb_dcd_bus_event(0, USBD_BUS_EVENT_RESET);
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}
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if ( int_status & USBD_INTEN_SOF_Msk )
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{
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tusb_dcd_bus_event(0, USBD_BUS_EVENT_SOF);
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}
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if ( int_status & EDPT_END_ALL_MASK )
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{
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// DMA complete move data from SRAM -> Endpoint
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@ -524,7 +541,7 @@ void USBD_IRQHandler(void)
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normal_xact_start(epnum, TUSB_DIR_IN);
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} else
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{
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// xfer complete
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// BULK/INT IN complete
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tusb_dcd_xfer_complete(0, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, true);
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}
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}
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@ -562,10 +579,23 @@ void USBD_IRQHandler(void)
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if ( (NRF_USBD->EPOUT[epnum].AMOUNT == xfer->mps) && (xfer->actual_len < xfer->total_len) )
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{
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// Allow Host -> Endpoint
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// HW issue on nrf5284 sample, SIZE.EPOUT won't trigger ACK as spec
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// use the back door interface as sdk for walk around
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#if 0
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// Overwrite size will allow hw to accept data
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NRF_USBD->SIZE.EPOUT[epnum] = 0;
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__ISB(); __DSB();
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#else
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + 2*epnum;
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0;
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(void) (((volatile uint32_t *)(NRF_USBD_BASE + 0x804)));
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#endif
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}else
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{
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xfer->total_len = xfer->actual_len;
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// BULK/INT OUT complete
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tusb_dcd_xfer_complete(0, epnum, xfer->actual_len, true);
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}
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}
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@ -280,18 +280,24 @@ tusb_error_t cdcd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
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return TUSB_ERROR_NONE;
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}
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void cdcd_sof(uint8_t port)
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bool tud_n_cdc_flush (uint8_t port)
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{
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if ( !tud_n_cdc_connected(port) ) return;
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VERIFY( tud_n_cdc_connected(port) );
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uint8_t edpt = cdcd_data[port].ep_addr[CDC_PIPE_DATA_IN];
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if ( !tusb_dcd_edpt_busy(port, edpt) )
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{
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uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
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VERIFY( !tusb_dcd_edpt_busy(port, edpt) );
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TU_ASSERT( tusb_dcd_edpt_xfer(port, edpt, _tmp_tx_buf, count, false), TUSB_ERROR_DCD_EDPT_XFER);
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}
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uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
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TU_ASSERT( tusb_dcd_edpt_xfer(port, edpt, _tmp_tx_buf, count, false) );
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return true;
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}
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void cdcd_sof(uint8_t port)
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{
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tud_n_cdc_flush(port);
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}
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#endif
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@ -63,18 +63,20 @@ uint32_t tud_n_cdc_read (uint8_t port, void* buffer, uint32_t bufsize);
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uint32_t tud_n_cdc_write_char (uint8_t port, char ch);
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uint32_t tud_n_cdc_write (uint8_t port, void const* buffer, uint32_t bufsize);
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bool tud_n_cdc_flush (uint8_t port);
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//--------------------------------------------------------------------+
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// APPLICATION API (Single Port)
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//--------------------------------------------------------------------+
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static inline bool tud_cdc_connected (void) { return tud_n_cdc_connected(0); }
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static inline uint32_t tud_cdc_available (void) { return tud_n_cdc_available(0); }
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static inline bool tud_cdc_connected (void) { return tud_n_cdc_connected(0); }
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static inline uint32_t tud_cdc_available (void) { return tud_n_cdc_available(0); }
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static inline int tud_cdc_read_char (void) { return tud_n_cdc_read_char(0); }
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static inline uint32_t tud_cdc_read (void* buffer, uint32_t bufsize) { return tud_n_cdc_read(0, buffer, bufsize); }
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static inline int tud_cdc_read_char (void) { return tud_n_cdc_read_char(0); }
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static inline uint32_t tud_cdc_read (void* buffer, uint32_t bufsize) { return tud_n_cdc_read(0, buffer, bufsize); }
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static inline uint32_t tud_cdc_write_char (char ch) { return tud_n_cdc_write_char(0, ch); }
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static inline uint32_t tud_cdc_write_char (char ch) { return tud_n_cdc_write_char(0, ch); }
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static inline uint32_t tud_cdc_write (void const* buffer, uint32_t bufsize) { return tud_n_cdc_write(0, buffer, bufsize); }
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static inline bool tud_cdc_flush (void) { return tud_n_cdc_flush(0); }
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//--------------------------------------------------------------------+
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// APPLICATION CALLBACK API
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@ -87,13 +87,11 @@ void tusb_dcd_control_stall (uint8_t port);
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bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
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bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
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bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t edpt_addr);
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t edpt_addr);
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void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t edpt_addr);
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// TODO may remove
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t edpt_addr);
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#ifdef __cplusplus
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}
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#endif
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