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Minor clean ups

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This commit is contained in:
Stefan Kerkmann 2021-07-10 11:47:42 +02:00
parent 771bbe8af7
commit 3db2089aa9
3 changed files with 17 additions and 20 deletions
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8
hw/bsp/gd32vf103_longan_nano/board.mk
View File

@ -21,15 +21,14 @@ CFLAGS += \
#CFLAGS += -Wno-error=unused-parameter
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/gcc_gd32vf103xb_flashxip.ld # 128kb ROM 32kb RAM
# LD_FILE = hw/bsp/$(BOARD)/gcc_gd32vf103x8_flashxip.ld # 64kb ROM 20kb RAM Longan Nano Lite
LD_FILE = hw/bsp/$(BOARD)/gcc_gd32vf103xb_flashxip.ld # Longan Nano 128k ROM 32k RAM
# LD_FILE = hw/bsp/$(BOARD)/gcc_gd32vf103x8_flashxip.ld # Longan Nano Lite 64k ROM 20k RAM
SRC_C += \
src/portable/st/synopsys/dcd_synopsys.c \
$(GD32VF103_SDK_DRIVER)/gd32vf103_rcu.c \
$(GD32VF103_SDK_DRIVER)/gd32vf103_gpio.c \
$(GD32VF103_SDK_DRIVER)/Usb/gd32vf103_usb_hw.c \
$(GD32VF103_SDK_DRIVER)/gd32vf103_fmc.c \
$(GD32VF103_SDK_DRIVER)/gd32vf103_usart.c \
$(GD32VF103_SDK_SOC_COMMON)/Source/Stubs/sbrk.c \
$(GD32VF103_SDK_SOC_COMMON)/Source/Stubs/close.c \
@ -52,7 +51,8 @@ INC += \
#FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = gd32vf103cb
JLINK_DEVICE = gd32vf103cbt6 # Longan Nano 128k ROM 32k RAM
#JLINK_DEVICE = gd32vf103c8t6 # Longan Nano Lite 64k ROM 20k RAM
# flash target ROM bootloader
flash: $(BUILD)/$(PROJECT).bin

20
hw/bsp/gd32vf103_longan_nano/gd32vf103_longan_nano.c
View File

@ -39,7 +39,7 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); }
#define HXTAL_VALUE \
((uint32_t)8000000) /*!< value of the external oscillator in Hz */
#define USB_NO_VBUS_PIN 1
#define USB_NO_VBUS_PIN
//--------------------------------------------------------------------+
// LED
@ -62,16 +62,6 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); }
#define UART_TX_PIN GPIO_PIN_9
#define UART_RX_PIN GPIO_PIN_10
/* sipeed longan nano board UART com port */
#define GD32_COM0 USART0
#define GD32_COM_CLK RCU_USART0
#define GD32_COM_TX_PIN GPIO_PIN_9
#define GD32_COM_RX_PIN GPIO_PIN_10
#define GD32_COM_TX_GPIO_PORT GPIOA
#define GD32_COM_RX_GPIO_PORT GPIOA
#define GD32_COM_TX_GPIO_CLK RCU_GPIOA
#define GD32_COM_RX_GPIO_CLK RCU_GPIOA
void board_init(void) {
/* Disable interrupts during init */
__disable_irq();
@ -117,7 +107,7 @@ void board_init(void) {
board_led_write(0);
#endif
#if defined(UART_DEV) && CFG_TUSB_DEBUG
#if defined(UART_DEV)
/* enable GPIO TX and RX clock */
rcu_periph_clock_enable(GD32_COM_TX_GPIO_CLK);
rcu_periph_clock_enable(GD32_COM_RX_GPIO_CLK);
@ -214,8 +204,7 @@ uint32_t board_button_read(void) {
}
int board_uart_read(uint8_t* buf, int len) {
#if defined(UART_DEV) && CFG_TUSB_DEBUG
#if defined(UART_DEV)
int rxsize = len;
while (rxsize--) {
*(uint8_t*)buf = usart_read(UART_DEV);
@ -230,8 +219,7 @@ int board_uart_read(uint8_t* buf, int len) {
}
int board_uart_write(void const* buf, int len) {
#if defined(UART_DEV) && CFG_TUSB_DEBUG
#if defined(UART_DEV)
int txsize = len;
while (txsize--) {
usart_write(UART_DEV, *(uint8_t*)buf);

9
hw/bsp/gd32vf103_longan_nano/nuclei_sdk_hal.h
View File

@ -12,7 +12,16 @@
extern "C" {
#endif
/* sipeed longan nano board UART com port */
#define SOC_DEBUG_UART USART0
#define GD32_COM0 USART0
#define GD32_COM_CLK RCU_USART0
#define GD32_COM_TX_PIN GPIO_PIN_9
#define GD32_COM_RX_PIN GPIO_PIN_10
#define GD32_COM_TX_GPIO_PORT GPIOA
#define GD32_COM_RX_GPIO_PORT GPIOA
#define GD32_COM_TX_GPIO_CLK RCU_GPIOA
#define GD32_COM_RX_GPIO_CLK RCU_GPIOA
#ifdef __cplusplus
}