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https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
merge tusb_dcd_control_stall() to tusb_dcd_edpt_stall()
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9a487a238a
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@ -85,7 +85,7 @@ typedef struct
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}_dcd;
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/*------------------------------------------------------------------*/
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/* Controller API
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/* Controller Start up Sequence
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*------------------------------------------------------------------*/
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static bool hfclk_running(void)
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{
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@ -351,12 +351,6 @@ bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint
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return true;
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}
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void tusb_dcd_control_stall (uint8_t port)
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{
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(void) port;
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NRF_USBD->TASKS_EP0STALL = 1;
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__ISB(); __DSB();
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}
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/*------------------------------------------------------------------*/
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/*
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@ -449,12 +443,26 @@ bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer,
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr)
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{
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(void) port;
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if ( ep_addr == 0)
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{
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NRF_USBD->TASKS_EP0STALL = 1;
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}else
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{
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NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep_addr;
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}
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__ISB(); __DSB();
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}
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void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr)
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{
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(void) port;
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if ( ep_addr )
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{
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NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr;
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}
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}
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr)
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@ -230,10 +230,6 @@ static inline uint8_t qtd_find_free(uint8_t port)
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//--------------------------------------------------------------------+
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// CONTROL PIPE API
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//--------------------------------------------------------------------+
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void tusb_dcd_control_stall(uint8_t port)
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{
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LPC_USB[port]->ENDPTCTRL0 |= (ENDPTCTRL_MASK_STALL << 16); // stall Control IN TODO stall control OUT as well
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}
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// control transfer does not need to use qtd find function
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// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
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@ -277,7 +273,14 @@ void tusb_dcd_edpt_stall(uint8_t port, uint8_t ep_addr)
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uint8_t ep_idx = edpt_addr2phy(ep_addr);
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volatile uint32_t * reg_control = get_reg_control_addr(port, ep_idx);
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(*reg_control) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
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if ( ep_addr == 0)
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{
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// Stall both Control IN and OUT
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(*reg_control) |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
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}else
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{
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(*reg_control) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
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}
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}
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void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t ep_addr)
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@ -475,7 +478,9 @@ void hal_dcd_isr(uint8_t port)
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if ( p_qtd->int_on_complete )
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{
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bool succeeded = ( p_qtd->xact_err || p_qtd->halted || p_qtd->buffer_err ) ? false : true;
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tusb_dcd_xfer_complete(port, 0, 0, succeeded); // TODO xferred bytes for control xfer is not needed yet !!!!
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(void) succeeded;
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tusb_dcd_control_complete(port);
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}
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}
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}
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@ -382,7 +382,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
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if(TUSB_ERROR_NONE != error)
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{
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// Response with Protocol Stall if request is not supported
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tusb_dcd_control_stall(port);
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tusb_dcd_edpt_stall(port, 0);
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}else if (p_request->wLength == 0)
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{
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usbd_control_status(port, 1-p_request->bmRequestType_bit.direction);
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@ -546,6 +546,10 @@ void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_byte
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{
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if (ep_addr == 0 )
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{
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(void) port;
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(void) xferred_bytes;
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(void) succeeded;
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// Control Transfer
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osal_semaphore_post( usbd_control_xfer_sem_hdl );
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}else
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@ -557,7 +561,7 @@ void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_byte
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.sub_event_id = succeeded ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR
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};
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task_event.xfer_done.ep_addr = ep_addr;
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task_event.xfer_done.ep_addr = ep_addr;
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task_event.xfer_done.xferred_byte = xferred_bytes;
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osal_queue_send(usbd_queue_hdl, &task_event);
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@ -73,24 +73,28 @@ void tusb_dcd_set_config (uint8_t port, uint8_t config_num);
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*------------------------------------------------------------------*/
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void tusb_dcd_bus_event (uint8_t port, usbd_bus_event_type_t bus_event);
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void tusb_dcd_setup_received (uint8_t port, uint8_t const* p_request);
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void tusb_dcd_xfer_complete (uint8_t port, uint8_t edpt_addr, uint32_t xferred_bytes, bool succeeded);
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void tusb_dcd_xfer_complete (uint8_t port, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded);
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static inline void tusb_dcd_control_complete(uint8_t port)
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{
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// TODO all control complete is successful !!
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tusb_dcd_xfer_complete(port, 0, 0, true);
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}
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/*------------------------------------------------------------------*/
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/* Endpoint API
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*------------------------------------------------------------------*/
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//------------- Control Endpoint -------------//
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bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
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void tusb_dcd_control_stall (uint8_t port);
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//------------- Other Endpoints -------------//
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bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
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bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
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bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t edpt_addr);
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bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
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bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr);
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t edpt_addr);
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void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t edpt_addr);
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr);
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void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr);
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#ifdef __cplusplus
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}
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