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test again

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This commit is contained in:
hathach 2013-05-12 22:29:02 +07:00
parent dd6a0d8d69
commit 4dd38f0df6
5 changed files with 68 additions and 40 deletions
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6
tests/test/host/ehci/test_pipe_bulk_xfer.c
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@ -36,6 +36,7 @@
*/
/**************************************************************************/
#include <stdlib.h>
#include "unity.h"
#include "tusb_option.h"
#include "errors.h"
@ -91,7 +92,8 @@ void setUp(void)
memclr_(usbh_devices, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
memclr_(xfer_data, sizeof(xfer_data));
hcd_init();
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_init() );
dev_addr = 1;
@ -103,6 +105,8 @@ void setUp(void)
usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH;
async_head = get_async_head( hostid );
//------------- pipe open -------------//
pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);

49
tests/test/host/ehci/test_pipe_control_xfer.c
View File

@ -36,6 +36,7 @@
*/
/**************************************************************************/
#include <stdlib.h>
#include "unity.h"
#include "tusb_option.h"
#include "errors.h"
@ -74,22 +75,28 @@ void setUp(void)
memclr_(usbh_devices, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
memclr_(xfer_data, sizeof(xfer_data));
hcd_init();
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_init() );
dev_addr = 1;
hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX+1; i++)
{
usbh_devices[i].core_id = hostid;
usbh_devices[i].hub_addr = hub_addr;
usbh_devices[i].hub_port = hub_port;
usbh_devices[i].speed = TUSB_SPEED_HIGH;
}
usbh_devices[0].core_id = hostid;
usbh_devices[0].hub_addr = hub_addr;
usbh_devices[0].hub_port = hub_port;
usbh_devices[0].speed = TUSB_SPEED_HIGH;
usbh_devices[dev_addr].core_id = hostid;
usbh_devices[dev_addr].hub_addr = hub_addr;
usbh_devices[dev_addr].hub_port = hub_port;
usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH;
async_head = get_async_head( hostid );
hcd_pipe_control_open(dev_addr, control_max_packet_size);
//------------- pipe open -------------//
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_open(dev_addr, control_max_packet_size) );
p_control_qhd = &ehci_data.device[dev_addr-1].control.qhd;
@ -147,10 +154,12 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
dev_addr = 0;
ehci_qhd_t * const p_qhd = async_head;
hcd_pipe_control_open(dev_addr, control_max_packet_size);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_open(dev_addr, control_max_packet_size) );
//------------- Code Under TEST -------------//
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
p_setup = &ehci_data.addr0_qtd[0];
p_data = &ehci_data.addr0_qtd[1];
@ -162,7 +171,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
TEST_ASSERT_TRUE( p_status->next.terminate );
verify_qtd(p_setup, &request_get_dev_desc, 8);
verify_qtd(p_setup, (uint8_t*) &request_get_dev_desc, 8);
}
//--------------------------------------------------------------------+
@ -171,7 +180,8 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
void test_control_xfer_get(void)
{
//------------- Code Under TEST -------------//
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
@ -180,7 +190,7 @@ void test_control_xfer_get(void)
TEST_ASSERT_TRUE( p_status->next.terminate );
//------------- SETUP -------------//
verify_qtd(p_setup, &request_get_dev_desc, 8);
verify_qtd(p_setup, (uint8_t*) &request_get_dev_desc, 8);
TEST_ASSERT_FALSE(p_setup->int_on_complete);
TEST_ASSERT_FALSE(p_setup->data_toggle);
@ -206,7 +216,8 @@ void test_control_xfer_get(void)
void test_control_xfer_set(void)
{
//------------- Code Under TEST -------------//
hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data) );
TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
@ -226,7 +237,9 @@ void test_control_xfer_set(void)
void test_control_xfer_complete_isr(void)
{
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
usbh_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE);
//------------- Code Under TEST -------------//
@ -243,7 +256,9 @@ void test_control_xfer_complete_isr(void)
void test_control_xfer_error_isr(void)
{
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
usbh_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_ERROR);
//------------- Code Under TEST -------------//

12
tests/test/host/ehci/test_pipe_interrupt_open.c
View File

@ -72,13 +72,11 @@ void setUp(void)
dev_addr = 1;
hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX+1; i++)
{
usbh_devices[i].core_id = hostid;
usbh_devices[i].hub_addr = hub_addr;
usbh_devices[i].hub_port = hub_port;
usbh_devices[i].speed = TUSB_SPEED_HIGH;
}
usbh_devices[dev_addr].core_id = hostid;
usbh_devices[dev_addr].hub_addr = hub_addr;
usbh_devices[dev_addr].hub_port = hub_port;
usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH;
period_head_arr = get_period_head( hostid, 1 );
p_int_qhd = NULL;

40
tests/test/host/ehci/test_pipe_interrupt_xfer.c
View File

@ -36,6 +36,7 @@
*/
/**************************************************************************/
#include <stdlib.h>
#include "unity.h"
#include "tusb_option.h"
#include "errors.h"
@ -91,20 +92,21 @@ void setUp(void)
memclr_(usbh_devices, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
memclr_(xfer_data, sizeof(xfer_data));
hcd_init();
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_init() );
dev_addr = 1;
hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX+1; i++)
{
usbh_devices[i].core_id = hostid;
usbh_devices[i].hub_addr = hub_addr;
usbh_devices[i].hub_port = hub_port;
usbh_devices[i].speed = TUSB_SPEED_HIGH;
}
period_head_arr = get_period_head( hostid, 1 );
usbh_devices[dev_addr].core_id = hostid;
usbh_devices[dev_addr].hub_addr = hub_addr;
usbh_devices[dev_addr].hub_port = hub_port;
usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH;
period_head_arr = (ehci_qhd_t*) get_period_head( hostid, 1 );
//------------- pipe open -------------//
pipe_hdl_interrupt = hcd_pipe_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_interrupt.dev_addr);
@ -149,7 +151,8 @@ void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length)
void test_interrupt_xfer(void)
{
//------------- Code Under Test -------------//
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true) );
ehci_qtd_t* p_qtd = p_qhd_interrupt->p_qtd_list_head;
TEST_ASSERT_NOT_NULL(p_qtd);
@ -164,8 +167,11 @@ void test_interrupt_xfer(void)
void test_interrupt_xfer_double(void)
{
//------------- Code Under Test -------------//
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false);
hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false) );
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) );
ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head;
ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail;
@ -196,8 +202,11 @@ void check_qhd_after_complete(ehci_qhd_t *p_qhd)
void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void)
{
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false);
hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), false) );
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) );
usbh_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE);
@ -220,7 +229,8 @@ void test_interrupt_xfer_complete_isr_interval_2ms(void)
pipe_handle_t pipe_hdl_2ms = hcd_pipe_open(dev_addr, &desc_endpoint_2ms, TUSB_CLASS_HID);
ehci_qhd_t * p_qhd_2ms = &ehci_data.device[ dev_addr -1].qhd[ pipe_hdl_2ms.index ];
hcd_pipe_xfer(pipe_hdl_2ms, xfer_data, sizeof(xfer_data), false);
TEST_ASSERT_EQUAL( TUSB_ERROR_NONE,
hcd_pipe_xfer(pipe_hdl_2ms, xfer_data, sizeof(xfer_data), false) );
ehci_qtd_t* p_head = p_qhd_2ms->p_qtd_list_head;
ehci_qtd_t* p_tail = p_qhd_2ms->p_qtd_list_tail;

1
tests/test/support/ehci_controller_fake.h
View File

@ -62,6 +62,7 @@ extern ehci_data_t ehci_data;
void ehci_controller_init(void);
void ehci_controller_run(uint8_t hostid);
void ehci_controller_run_error(uint8_t hostid);
void ehci_controller_control_xfer_proceed(uint8_t dev_addr, uint8_t p_data[]);
void ehci_controller_device_plug(uint8_t hostid, tusb_speed_t speed);
void ehci_controller_device_unplug(uint8_t hostid);