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https://github.com/hathach/tinyusb.git
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more clean up
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@ -175,41 +175,18 @@ bool dcd_init(uint8_t rhport)
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}
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//--------------------------------------------------------------------+
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// PIPE HELPER
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// HELPER
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//--------------------------------------------------------------------+
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#if 0
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static inline uint8_t edpt_pos2phy(uint8_t pos)
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{ // 0-5 --> OUT, 16-21 IN
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return (pos < DCD_QHD_MAX/2) ? (2*pos) : (2*(pos-16)+1);
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}
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#endif
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static inline uint8_t edpt_phy2pos(uint8_t physical_endpoint)
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// index to bit position in register
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static inline uint8_t ep_idx2bit(uint8_t ep_idx)
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{
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return physical_endpoint/2 + ( (physical_endpoint%2) ? 16 : 0);
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}
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static inline uint8_t edpt_addr2phy(uint8_t endpoint_addr)
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{
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return 2*(endpoint_addr & 0x0F) + ((endpoint_addr & TUSB_DIR_IN_MASK) ? 1 : 0);
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}
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static inline uint8_t edpt_phy2addr(uint8_t ep_idx)
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{
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return (ep_idx/2) | ( ep_idx & 0x01 ? TUSB_DIR_IN_MASK : 0 );
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}
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static inline uint8_t edpt_phy2log(uint8_t physical_endpoint)
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{
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return physical_endpoint/2;
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return ep_idx/2 + ( (ep_idx%2) ? 16 : 0);
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}
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static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
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{
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tu_memclr(p_qtd, sizeof(dcd_qtd_t));
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p_qtd->used = 1;
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p_qtd->next = QTD_NEXT_INVALID;
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p_qtd->active = 1;
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p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
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@ -224,38 +201,29 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
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}
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}
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// retval 0: invalid
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static inline uint8_t qtd_find_free(uint8_t rhport)
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static inline volatile uint32_t * get_endpt_ctrl_reg(uint8_t rhport, uint8_t ep_idx)
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{
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// QTD0 is reserved for control transfer
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for(uint8_t i=1; i<DCD_QTD_MAX; i++)
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{
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if ( dcd_data_ptr[rhport]->qtd[i].used == 0) return i;
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}
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return 0;
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return &(LPC_USB[rhport]->ENDPTCTRL0) + ep_idx/2;
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}
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//--------------------------------------------------------------------+
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// DCD Endpoint Port
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//--------------------------------------------------------------------+
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static inline volatile uint32_t * get_endpt_ctrl_reg(uint8_t rhport, uint8_t physical_endpoint)
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{
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return &(LPC_USB[rhport]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
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}
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void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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{
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uint8_t ep_idx = edpt_addr2phy(ep_addr);
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volatile uint32_t * reg_control = get_endpt_ctrl_reg(rhport, ep_idx);
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const ep_idx = 2*epnum + dir;
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if ( ep_addr == 0)
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volatile uint32_t * endpt_ctrl = get_endpt_ctrl_reg(rhport, ep_idx);
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if ( epnum == 0)
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{
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// Stall both Control IN and OUT
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(*reg_control) |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
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(*endpt_ctrl) |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
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}else
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{
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(*reg_control) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
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(*endpt_ctrl) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
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}
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}
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@ -267,11 +235,15 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
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void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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{
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volatile uint32_t * reg_control = get_endpt_ctrl_reg(rhport, edpt_addr2phy(ep_addr));
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const ep_idx = 2*epnum + dir;
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volatile uint32_t * endpt_ctrl = get_endpt_ctrl_reg(rhport, ep_idx);
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// data toggle also need to be reset
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(*reg_control) |= ENDPTCTRL_MASK_TOGGLE_RESET << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0);
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(*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0));
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(*endpt_ctrl) |= ENDPTCTRL_MASK_TOGGLE_RESET << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0);
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(*endpt_ctrl) &= ~(ENDPTCTRL_MASK_STALL << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0));
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}
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bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
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@ -339,7 +311,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
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// start transfer
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LPC_USB[rhport]->ENDPTPRIME = BIT_( edpt_phy2pos(ep_idx) ) ;
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LPC_USB[rhport]->ENDPTPRIME = BIT_( ep_idx2bit(ep_idx) ) ;
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return true;
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}
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@ -412,7 +384,7 @@ void hal_dcd_isr(uint8_t rhport)
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{
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for(uint8_t ep_idx = 0; ep_idx < DCD_QHD_MAX; ep_idx++)
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{
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if ( BIT_TEST_(edpt_complete, edpt_phy2pos(ep_idx)) )
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if ( BIT_TEST_(edpt_complete, ep_idx2bit(ep_idx)) )
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{
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// 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
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dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
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@ -421,7 +393,7 @@ void hal_dcd_isr(uint8_t rhport)
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uint8_t result = p_qtd->halted ? DCD_XFER_STALLED :
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( p_qtd->xact_err ||p_qtd->buffer_err ) ? DCD_XFER_FAILED : DCD_XFER_SUCCESS;
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uint8_t ep_addr = edpt_phy2addr(ep_idx);
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uint8_t ep_addr = (ep_idx/2) | ( (ep_idx & 0x01) ? TUSB_DIR_IN_MASK : 0 );
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dcd_event_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, result, true); // only number of bytes in the IOC qtd
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}
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}
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@ -54,7 +54,6 @@
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//--------------------------------------------------------------------+
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#define DCD_QHD_MAX 12
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#define DCD_QTD_MAX 12
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#define DCD_QTD_PER_QHD_MAX 2 // maximum number of qtd that are linked into one queue head at a time
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#define QTD_NEXT_INVALID 0x01
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@ -91,7 +90,6 @@ enum {
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PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0),
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PORTSC_FORCE_PORT_RESUME_MASK = BIT_(6),
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PORTSC_SUSPEND_MASK = BIT_(7)
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};
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typedef struct
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@ -118,8 +116,7 @@ typedef struct
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//------------- DCD Area -------------//
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uint16_t expected_bytes;
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uint8_t used;
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uint8_t reserved;
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uint8_t reserved[2];
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} dcd_qtd_t;
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TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct");
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@ -148,9 +145,7 @@ typedef struct
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/// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes
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/// thus there are 16 bytes padding free that we can make use of.
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//--------------------------------------------------------------------+
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volatile uint8_t list_qtd_idx[DCD_QTD_PER_QHD_MAX];
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uint8_t reserved[16-DCD_QTD_PER_QHD_MAX];
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uint8_t reserved[16];
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} dcd_qhd_t;
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TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
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