mimxrt1170_evkb: add M4 build support.

This commit is contained in:
HiFiPhile 2024-11-02 15:13:08 +01:00
parent 56f53a6132
commit 54df3b2e94
4 changed files with 52 additions and 18 deletions

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@ -1,8 +1,17 @@
set(MCU_VARIANT MIMXRT1176)
set(MCU_CORE _cm7)
set(JLINK_DEVICE MIMXRT1176xxxA_M7)
set(PYOCD_TARGET mimxrt1170_cm7)
if (M4 STREQUAL "1")
set(MCU_CORE _cm4)
set(JLINK_CORE _M4)
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
else ()
set(MCU_CORE _cm7)
set(JLINK_CORE _M7)
endif()
set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
set(PYOCD_TARGET mimxrt1170${MCU_CORE})
set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)
function(update_board TARGET)
@ -10,7 +19,7 @@ function(update_board TARGET)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1176DVMAA_cm7
CPU_MIMXRT1176DVMAA${MCU_CORE}
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)

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@ -1,12 +1,22 @@
CFLAGS += -DCPU_MIMXRT1176DVMAA_cm7
MCU_VARIANT = MIMXRT1176
MCU_CORE = _cm7
ifeq ($(M4), 1)
MCU_CORE = _cm4
JLINK_CORE = _M4
CPU_CORE = cortex-m4
LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx${MCU_CORE}_ram.ld
else
MCU_CORE = _cm7
JLINK_CORE = _M7
endif
CFLAGS += -DCPU_MIMXRT1176DVMAA$(MCU_CORE)
# For flash-jlink target
JLINK_DEVICE = MIMXRT1176xxxA_M7
JLINK_DEVICE = MIMXRT1176xxxA$(JLINK_CORE)
# For flash-pyocd target
PYOCD_TARGET = mimxrt1170_cm7
PYOCD_TARGET = mimxrt1170$(MCU_CORE)
BOARD_TUD_RHPORT = 0
BOARD_TUH_RHPORT = 1

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@ -8,7 +8,9 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
set(MCU_VARIANT_WITH_CORE ${MCU_VARIANT}${MCU_CORE})
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
if (NOT DEFINED CMAKE_SYSTEM_PROCESSOR)
set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
endif ()
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
@ -58,14 +60,21 @@ function(add_board_target BOARD_TARGET)
endif()
endforeach()
target_compile_definitions(${BOARD_TARGET} PUBLIC
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
__STARTUP_CLEAR_BSS
CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))
CFG_TUSB_MEM_SECTION=__attribute__\(\(section\(\"NonCacheable\"\)\)\)
)
if (NOT M4 STREQUAL "1")
target_compile_definitions(${BOARD_TARGET} PUBLIC
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
)
endif ()
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
@ -140,6 +149,8 @@ function(family_configure_example TARGET RTOS)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
family_add_bin_hex(${TARGET})
# Flashing
family_flash_jlink(${TARGET})
#family_flash_nxplink(${TARGET})

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@ -8,14 +8,18 @@ CPU_CORE ?= cortex-m7
MCU_VARIANT_WITH_CORE = ${MCU_VARIANT}${MCU_CORE}
MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
CFLAGS += \
-D__STARTUP_CLEAR_BSS \
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section("NonCacheable")))' \
ifneq ($(M4), 1)
CFLAGS += \
-D__ARMVFP__=0 \
-D__ARMFPV5__=0 \
-D__STARTUP_CLEAR_BSS \
-DXIP_EXTERNAL_FLASH=1 \
-DXIP_BOOT_HEADER_ENABLE=1 \
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
-DCFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable"))) \
-DXIP_BOOT_HEADER_ENABLE=1
endif
ifdef BOARD_TUD_RHPORT
CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)