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https://github.com/hathach/tinyusb.git
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mimxrt1170_evkb: add M4 build support.
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parent
56f53a6132
commit
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@ -1,8 +1,17 @@
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set(MCU_VARIANT MIMXRT1176)
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set(MCU_CORE _cm7)
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set(JLINK_DEVICE MIMXRT1176xxxA_M7)
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set(PYOCD_TARGET mimxrt1170_cm7)
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if (M4 STREQUAL "1")
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set(MCU_CORE _cm4)
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set(JLINK_CORE _M4)
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set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
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set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
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else ()
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set(MCU_CORE _cm7)
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set(JLINK_CORE _M7)
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endif()
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set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
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set(PYOCD_TARGET mimxrt1170${MCU_CORE})
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set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)
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function(update_board TARGET)
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@ -10,7 +19,7 @@ function(update_board TARGET)
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
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)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_MIMXRT1176DVMAA_cm7
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CPU_MIMXRT1176DVMAA${MCU_CORE}
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BOARD_TUD_RHPORT=0
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BOARD_TUH_RHPORT=1
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)
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@ -1,12 +1,22 @@
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CFLAGS += -DCPU_MIMXRT1176DVMAA_cm7
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MCU_VARIANT = MIMXRT1176
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MCU_CORE = _cm7
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ifeq ($(M4), 1)
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MCU_CORE = _cm4
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JLINK_CORE = _M4
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CPU_CORE = cortex-m4
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LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx${MCU_CORE}_ram.ld
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else
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MCU_CORE = _cm7
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JLINK_CORE = _M7
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endif
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CFLAGS += -DCPU_MIMXRT1176DVMAA$(MCU_CORE)
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# For flash-jlink target
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JLINK_DEVICE = MIMXRT1176xxxA_M7
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JLINK_DEVICE = MIMXRT1176xxxA$(JLINK_CORE)
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# For flash-pyocd target
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PYOCD_TARGET = mimxrt1170_cm7
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PYOCD_TARGET = mimxrt1170$(MCU_CORE)
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BOARD_TUD_RHPORT = 0
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BOARD_TUH_RHPORT = 1
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@ -8,7 +8,9 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
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set(MCU_VARIANT_WITH_CORE ${MCU_VARIANT}${MCU_CORE})
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# toolchain set up
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set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
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if (NOT DEFINED CMAKE_SYSTEM_PROCESSOR)
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set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
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endif ()
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set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
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set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
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@ -58,14 +60,21 @@ function(add_board_target BOARD_TARGET)
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endif()
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endforeach()
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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__ARMVFP__=0
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__ARMFPV5__=0
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XIP_EXTERNAL_FLASH=1
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XIP_BOOT_HEADER_ENABLE=1
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__STARTUP_CLEAR_BSS
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CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))
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CFG_TUSB_MEM_SECTION=__attribute__\(\(section\(\"NonCacheable\"\)\)\)
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)
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if (NOT M4 STREQUAL "1")
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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__ARMVFP__=0
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__ARMFPV5__=0
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XIP_EXTERNAL_FLASH=1
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XIP_BOOT_HEADER_ENABLE=1
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)
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endif ()
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target_include_directories(${BOARD_TARGET} PUBLIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
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@ -140,6 +149,8 @@ function(family_configure_example TARGET RTOS)
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# Link dependencies
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target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
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family_add_bin_hex(${TARGET})
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# Flashing
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family_flash_jlink(${TARGET})
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#family_flash_nxplink(${TARGET})
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@ -8,14 +8,18 @@ CPU_CORE ?= cortex-m7
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MCU_VARIANT_WITH_CORE = ${MCU_VARIANT}${MCU_CORE}
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MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
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CFLAGS += \
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-D__STARTUP_CLEAR_BSS \
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-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section("NonCacheable")))' \
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ifneq ($(M4), 1)
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CFLAGS += \
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-D__ARMVFP__=0 \
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-D__ARMFPV5__=0 \
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-D__STARTUP_CLEAR_BSS \
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-DXIP_EXTERNAL_FLASH=1 \
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-DXIP_BOOT_HEADER_ENABLE=1 \
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-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
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-DCFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable"))) \
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-DXIP_BOOT_HEADER_ENABLE=1
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endif
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ifdef BOARD_TUD_RHPORT
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CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)
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