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dcd_msp430x5xx: Improve comments regarding SETUP packet handling.
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@ -515,12 +515,9 @@ static void handle_setup_packet(void)
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_setup_packet[i] = setup_buf[i];
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}
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// The EP0 NAK bits must be clear to receive a SETUP packet, according to the
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// manual (we don't do this right now- see below comments).
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// Race conditions where the hardware STALLs can occur if the NAK bits aren't
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// set for both IN/OUT EP0. Clearing SETUPIFG by reading USBVECINT does not
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// set NAK, so now that we have a SETUP packet, force NAKs.
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// FIXME: Explain more accurately why the STALL occurs.
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// Clearing SETUPIFG by reading USBVECINT does not set NAK, so now that we
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// have a SETUP packet, force NAKs until tinyusb can handle the SETUP
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// packet and prepare for a new xfer.
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USBIEPCNT_0 |= NAK;
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USBOEPCNT_0 |= NAK;
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dcd_event_setup_received(0, (uint8_t*) &_setup_packet[0], true);
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@ -547,13 +544,31 @@ void __attribute__ ((interrupt(USB_UBM_VECTOR))) USB_UBM_ISR(void)
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break;
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// Clear the (hardware-enforced) NAK on EP 0 after a SETUP packet
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// is received. The NAK bits for EP0 should still be set because it's
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// possible for the hardware to STALL in the middle of a control xfer
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// if the EP0 NAK bits aren't set properly.
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// is received. At this point, even though the hardware is no longer
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// forcing NAKs, the EP0 NAK bits should still be set to avoid
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// sending/receiving data before tinyusb is ready.
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//
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// Furthermore, it's possible for the hardware to STALL in the middle of
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// a control xfer if the EP0 NAK bits aren't set properly.
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// See: https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/845259
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// From my testing, if all of the following hold:
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// * OUT EP0 NAK is cleared.
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// * IN EP0 NAK is set.
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// * DIR bit in USBCTL is clear.
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// and an IN packet is received on EP0, the USB core will STALL. Setting
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// both EP0 NAKs manually when a SETUP packet is received, as is done
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// in handle_setup_packet(), avoids meeting STALL conditions.
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//
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// TODO: Figure out/explain why the STALL condition can be reached in the
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// first place. When I first noticed the STALL, the only two places I
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// touched the NAK bits were in dcd_edpt_xfer() and to _set_ (sic) them in
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// bus_reset(). SETUP packet handling should've been unaffected.
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//
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// FIXME: Per manual, we should be clearing the NAK bits of EP0 after the
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// Status Phase of a control xfer is done, in preparation of another
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// possible setup packet. No clean way to do this right now.
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// possible SETUP packet. We don't do this right now, as there is no
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// "Status Phase done" callback the driver can use. However, SETUP packets
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// _are_ correctly handled by the USB core without clearing the NAKs.
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case USBVECINT_SETUP_PACKET_RECEIVED:
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break;
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