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add 'set_EP0_max_pkt_size(...)' and fix EP0 size to 64 bytes after reset
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@ -206,11 +206,10 @@ static void bus_reset(uint8_t rhport)
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// are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to
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// overwrite this.
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#if TUD_OPT_HIGH_SPEED
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_allocated_fifo_words = 271 + 2*EP_MAX;
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#else
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_allocated_fifo_words = 47 + 2*EP_MAX;
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#endif
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// We rework this here and initialize the FIFOs here only for the USB reset case. The rest is done once a
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// configuration was set from the host. For this initialization phase we use 64 bytes as FIFO size.
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_allocated_fifo_words = 16 + 2 + 10; // 64 bytes max packet size + 2 words (for the status of the control OUT data packet) + 10 words (for setup packets)
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usb_otg->GRXFSIZ = _allocated_fifo_words;
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@ -219,15 +218,98 @@ static void bus_reset(uint8_t rhport)
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_allocated_fifo_words += 16;
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// TU_LOG2_INT(_allocated_fifo_words);
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// Fixed control EP0 size to 64 bytes
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in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64;
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// Set SETUP packet count to 3
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out_ep[0].DOEPTSIZ |= (3 << USB_OTG_DOEPTSIZ_STUPCNT_Pos);
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usb_otg->GINTMSK |= USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IEPINT;
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//#if TUD_OPT_HIGH_SPEED
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// _allocated_fifo_words = 271 + 2*EP_MAX;
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//#else
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// _allocated_fifo_words = 47 + 2*EP_MAX;
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//#endif
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//
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// usb_otg->GRXFSIZ = _allocated_fifo_words;
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//
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// // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
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// usb_otg->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | _allocated_fifo_words;
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//
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// _allocated_fifo_words += 16;
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//
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// // TU_LOG2_INT(_allocated_fifo_words);
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//
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// // Fixed control EP0 size to 64 bytes
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//// in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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//// xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64;
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//
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// // Set SETUP packet count to 3
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// out_ep[0].DOEPTSIZ |= (3 << USB_OTG_DOEPTSIZ_STUPCNT_Pos);
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//
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// usb_otg->GINTMSK |= USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IEPINT;
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}
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// Required after new configuration received in case EP0 max packet size has changed
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static bool set_EP0_max_pkt_size(uint8_t maxPktSize)
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{
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USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport);
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USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport);
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uint32_t enum_spd = (dev->DSTS & USB_OTG_DSTS_ENUMSPD_Msk) >> USB_OTG_DSTS_ENUMSPD_Pos;
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// Maximum packet size for EP 0 is set for both directions by writing DIEPCTL.
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switch (enum_spd)
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{
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case 0x00: // High speed - always 64 byte
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if (maxPktSize == 64)
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{
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in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64;
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return true;
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}
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return false; // Only 64 bytes are valid
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case 0x03: // Full speed
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switch (maxPktSize)
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{
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case 8:
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in_ep[0].DIEPCTL |= (0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 8;
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break;
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case 16:
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in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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in_ep[0].DIEPCTL |= (0x02 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 16;
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break;
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case 32:
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in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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in_ep[0].DIEPCTL |= (0x01 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 32;
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break;
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case 64:
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in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64;
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break;
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default:
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return false; // Other sizes are not valid
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}
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return true;
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default: // Low speed - always 8 bytes
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in_ep[0].DIEPCTL |= (0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos);
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xfer_status[0][TUSB_DIR_OUT].max_size = 8;
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xfer_status[0][TUSB_DIR_IN].max_size = 8;
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return true;
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}
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}
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// Set turn-around timeout according to link speed
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@ -939,6 +1021,7 @@ void dcd_int_handler(uint8_t rhport)
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tusb_speed_t const speed = get_speed(rhport);
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set_turnaround(usb_otg, speed);
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dcd_event_bus_reset(rhport, speed, true);
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}
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