Check tud ready check for OUT xfer.

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HiFiPhile 2024-05-08 14:05:58 +02:00 committed by hathach
parent ad3c49ca43
commit 60b3d14d19
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@ -81,8 +81,13 @@ typedef struct {
CFG_TUD_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
static bool _prep_out_transaction (cdcd_interface_t* p_cdc) {
static bool _prep_out_transaction (cdcd_interface_t* p_cdc, bool itf_open)
{
uint8_t const rhport = 0;
// Skip if usb is not ready yet
TU_VERIFY(tud_ready() || itf_open);
uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
// Prepare for incoming data but only allow what we can store in the ring buffer.
@ -143,7 +148,7 @@ uint32_t tud_cdc_n_available(uint8_t itf) {
uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) {
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
_prep_out_transaction(p_cdc);
_prep_out_transaction(p_cdc, false);
return num_read;
}
@ -154,7 +159,7 @@ bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr) {
void tud_cdc_n_read_flush(uint8_t itf) {
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
tu_fifo_clear(&p_cdc->rx_ff);
_prep_out_transaction(p_cdc);
_prep_out_transaction(p_cdc, false);
}
//--------------------------------------------------------------------+
@ -336,7 +341,7 @@ uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
}
// Prepare for incoming data
_prep_out_transaction(p_cdc);
_prep_out_transaction(p_cdc, true);
return drv_len;
}
@ -445,7 +450,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff)) tud_cdc_rx_cb(itf);
// prepare for OUT transaction
_prep_out_transaction(p_cdc);
_prep_out_transaction(p_cdc, false);
}
// Data sent to host, we continue to fetch from tx fifo to send.