mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
rename CFG_TUSB_MEM_SECTION to CFG_TUSB_MEM_SECTION
This commit is contained in:
parent
b20cb8852a
commit
60d8cde695
@ -10,13 +10,13 @@
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#define CFG_TUSB_RHPORT0_MODE
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/** USB controller in MCU often has limited access to specific RAM section. The Stack will use this macro to place internal variables
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into the USB RAM section as follows. if your mcu's usb controller has no such limit, define CFG_TUSB_ATTR_USBRAM as empty macro.
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into the USB RAM section as follows. if your mcu's usb controller has no such limit, define CFG_TUSB_MEM_SECTION as empty macro.
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@code
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CFG_TUSB_ATTR_USBRAM uint8_t usb_xfer_buffer[10];
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CFG_TUSB_MEM_SECTION uint8_t usb_xfer_buffer[10];
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@endcode
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*/
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_SECTION
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#define CFG_TUSB_MCU ///< Select one of the supported MCU, the value must be from \ref group_mcu
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#define CFG_TUSB_OS ///< Select one of the supported RTOS, the value must be from \ref group_supported_os.
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@ -58,6 +58,12 @@
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#define CFG_TUSB_DEBUG 2
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#define CFG_TUSB_OS OPT_OS_NONE
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//--------------------------------------------------------------------
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// USB RAM PLACEMENT
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//--------------------------------------------------------------------
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
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//--------------------------------------------------------------------
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// DEVICE CONFIGURATION
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//--------------------------------------------------------------------
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@ -132,12 +138,6 @@
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*/
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#define CFG_TUD_HID_ASCII_TO_KEYCODE_LOOKUP 1
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//--------------------------------------------------------------------
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// USB RAM PLACEMENT
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//--------------------------------------------------------------------
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
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#ifdef __cplusplus
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}
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@ -140,7 +140,7 @@
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//--------------------------------------------------------------------
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// USB RAM PLACEMENT
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//--------------------------------------------------------------------
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_SECTION
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
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@ -93,36 +93,36 @@
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#ifdef __CODE_RED // compiled with lpcxpresso
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#elif CFG_TUSB_MCU == OPT_MCU_LPC175X_6X
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM3)
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM3)
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#endif
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#elif defined __CC_ARM // Compiled with Keil armcc, USBRAM_SECTION is defined in scatter files
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM // Use keil tool configure to have AHB SRAM as default memory
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#define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory
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#endif
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#elif defined __ICCARM__ // compiled with IAR
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64)
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64)
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_SECTION
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".ahb_sram1\"")
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"")
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#endif
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#elif defined __SES_ARM
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.bss2)
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.bss2)
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#else
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@ -80,6 +80,9 @@
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<option id="com.crt.advproject.link.crpenable.983788363" name="Enable automatic placement of Code Read Protection field in image" superClass="com.crt.advproject.link.crpenable" useByScannerDiscovery="false" value="false" valueType="boolean"/>
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<option id="com.crt.advproject.link.gcc.multicore.slave.312914823" name="Multicore configuration" superClass="com.crt.advproject.link.gcc.multicore.slave" useByScannerDiscovery="false"/>
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<option defaultValue="com.crt.advproject.heapAndStack.lpcXpressoStyle" id="com.crt.advproject.link.memory.heapAndStack.style.848801259" name="Heap and Stack placement" superClass="com.crt.advproject.link.memory.heapAndStack.style" useByScannerDiscovery="false" valueType="enumerated"/>
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<option id="com.crt.advproject.link.memory.load.image.959137799" superClass="com.crt.advproject.link.memory.load.image" value="" valueType="string"/>
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<option id="com.crt.advproject.link.memory.data.296058697" superClass="com.crt.advproject.link.memory.data" value="" valueType="string"/>
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<option id="com.crt.advproject.link.memory.sections.459230125" superClass="com.crt.advproject.link.memory.sections" valueType="stringList"/>
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<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1952169203" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
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<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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@ -87,15 +90,6 @@
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</tool>
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</toolChain>
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</folderInfo>
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<folderInfo id="com.crt.advproject.config.exe.debug.1203173668.586387399.181780209" name="/" resourcePath="tinyusb">
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<toolChain id="com.crt.advproject.toolchain.exe.debug.1275173732" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug" unusedChildren="">
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<tool id="com.crt.advproject.cpp.exe.debug.193507715" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug.1902983438"/>
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<tool id="com.crt.advproject.gcc.exe.debug.1649905087" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.1115700323"/>
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<tool id="com.crt.advproject.gas.exe.debug.857784671" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug.922965957"/>
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<tool id="com.crt.advproject.link.cpp.exe.debug.1802949954" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug.844358431"/>
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<tool id="com.crt.advproject.link.exe.debug.238323235" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug.1844250132"/>
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</toolChain>
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</folderInfo>
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<sourceEntries>
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<entry excluding="hw/bsp/hitex|hw/bsp/keil|hw/mcu/nordic|hw/bsp/lpcxpresso|hw/mcu/nxp/lpc13uxx|hw/bsp/lpcxpresso1347|hw/mcu/nxp/lpc11uxx|hw/bsp/lpcxpresso1769|hw/mcu/nxp/lpc175x_6x|hw/bsp/pca10056|hw/bsp/ngx|hw/bsp/lpcxpresso11u68" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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</sourceEntries>
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@ -114,7 +108,7 @@
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<storageModule moduleId="com.crt.config">
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<projectStorage><?xml version="1.0" encoding="UTF-8"?>
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<TargetConfig>
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<Properties property_0="None" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="70200"/>
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<Properties property_0="None" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="100200"/>
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<infoList vendor="NXP"><info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" resetscript="LPC18LPC43InternalFLASHBootResetscript.scp" stub="crt_emu_lpc18_43_nxp"><chip><name>LPC4357</name>
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<family>LPC43xx</family>
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<vendor>NXP (formerly Philips)</vendor>
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_ATTR_USBRAM hid_keyboard_report_t keyboard_report;
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CFG_TUSB_MEM_SECTION hid_keyboard_report_t keyboard_report;
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_ATTR_USBRAM hid_mouse_report_t mouse_report;
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CFG_TUSB_MEM_SECTION hid_mouse_report_t mouse_report;
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_ATTR_USBRAM
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CFG_TUSB_MEM_SECTION
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uint8_t msc_device_ramdisk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
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{
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//------------- Boot Sector -------------//
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#ifdef __CODE_RED // compiled with lpcxpresso
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#elif CFG_TUSB_MCU == OPT_MCU_LPC175X_6X
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM3)
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM3)
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#endif
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#elif defined __CC_ARM // Compiled with Keil armcc, USBRAM_SECTION is defined in scatter files
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM // Use keil tool configure to have AHB SRAM as default memory
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#define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory
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#endif
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#elif defined __ICCARM__ // compiled with IAR
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#if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX)
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64)
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64)
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_SECTION
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".ahb_sram1\"")
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"")
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#endif
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#else
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static osal_semaphore_t sem_hdl;
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enum { SERIAL_BUFFER_SIZE = 64 };
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CFG_TUSB_ATTR_USBRAM static uint8_t serial_in_buffer[SERIAL_BUFFER_SIZE];
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CFG_TUSB_ATTR_USBRAM static uint8_t serial_out_buffer[SERIAL_BUFFER_SIZE];
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CFG_TUSB_MEM_SECTION static uint8_t serial_in_buffer[SERIAL_BUFFER_SIZE];
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CFG_TUSB_MEM_SECTION static uint8_t serial_out_buffer[SERIAL_BUFFER_SIZE];
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static uint8_t received_bytes; // set by transfer complete callback
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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static osal_queue_t queue_kbd_hdl;
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CFG_TUSB_ATTR_USBRAM static hid_keyboard_report_t usb_keyboard_report;
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CFG_TUSB_MEM_SECTION static hid_keyboard_report_t usb_keyboard_report;
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static inline uint8_t keycode_to_ascii(uint8_t modifier, uint8_t keycode) ATTR_CONST ATTR_ALWAYS_INLINE;
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static inline void process_kbd_report(hid_keyboard_report_t const * report);
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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static osal_queue_t queue_mouse_hdl;
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CFG_TUSB_ATTR_USBRAM static hid_mouse_report_t usb_mouse_report;
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CFG_TUSB_MEM_SECTION static hid_mouse_report_t usb_mouse_report;
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static inline void process_mouse_report(hid_mouse_report_t const * p_report);
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_ATTR_USBRAM uint8_t fileread_buffer[CLI_FILE_READ_BUFFER];
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CFG_TUSB_MEM_SECTION uint8_t fileread_buffer[CLI_FILE_READ_BUFFER];
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static char cli_buffer[CLI_MAX_BUFFER];
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static char volume_label[20];
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_ATTR_USBRAM static FATFS fatfs[CFG_TUSB_HOST_DEVICE_MAX];
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CFG_TUSB_MEM_SECTION static FATFS fatfs[CFG_TUSB_HOST_DEVICE_MAX];
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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@ -77,26 +77,26 @@
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#ifdef __CODE_RED // make use of code red's support for ram region macros
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#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM3)
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#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM3)
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#endif
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#elif defined __CC_ARM // Compiled with Keil armcc
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#if (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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#define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address
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#define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM // Use keil tool configure to have AHB SRAM as default memory
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#define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory
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#endif
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#elif defined __ICCARM__ // compiled with IAR
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#if (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X)
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// LP175x_6x can access all but CMSIS-RTX causes overflow in 32KB SRAM --> move to AHB ram
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".sram\"")
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\".sram\"")
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#elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX)
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#define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".ahb_sram1\"")
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#define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"")
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#endif
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#else
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@ -120,6 +120,7 @@ void board_init(void)
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GPIO_SetDir(buttons[i].gpio_port, BIT_(buttons[i].gpio_pin), 0);
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}
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#if 0
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//------------- UART -------------//
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scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1);
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scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1);
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@ -131,6 +132,7 @@ void board_init(void)
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UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
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UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
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#endif
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//------------- NAND Flash (K9FXX) Size = 128M, Page Size = 2K, Block Size = 128K, Number of Block = 1024 -------------//
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// nand_init();
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@ -168,11 +170,11 @@ uint32_t board_buttons(void)
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//--------------------------------------------------------------------+
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uint8_t board_uart_getchar(void)
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{
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return UART_ReceiveByte(BOARD_UART_PORT);
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//return UART_ReceiveByte(BOARD_UART_PORT);
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}
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void board_uart_putchar(uint8_t c)
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{
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UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
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//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
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}
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||||
|
||||
#endif
|
||||
|
@ -87,7 +87,7 @@ typedef struct
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
|
||||
CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION API
|
||||
|
@ -77,27 +77,27 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) ATTR_PURE ATTR_WARN
|
||||
|
||||
/** \brief Perform USB OUT transfer to device
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in] p_data Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in] p_data Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] length Number of bytes to be transferred via USB bus
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
* \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
|
||||
* \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
|
||||
* \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct
|
||||
* \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the
|
||||
* interface's callback function. \a p_data must be declared with \ref CFG_TUSB_ATTR_USBRAM.
|
||||
* interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION.
|
||||
*/
|
||||
tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify);
|
||||
|
||||
/** \brief Perform USB IN transfer to get data from device
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in] p_buffer Buffer containing received data. Must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in] p_buffer Buffer containing received data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] length Number of bytes to be transferred via USB bus
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
* \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
|
||||
* \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
|
||||
* \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct
|
||||
* \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the
|
||||
* interface's callback function. \a p_data must be declared with \ref CFG_TUSB_ATTR_USBRAM.
|
||||
* interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION.
|
||||
*/
|
||||
tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify);
|
||||
|
||||
|
@ -54,8 +54,8 @@
|
||||
//--------------------------------------------------------------------+
|
||||
#define RNDIS_MSG_PAYLOAD_MAX (1024*4)
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM static uint8_t msg_notification[CFG_TUSB_HOST_DEVICE_MAX][8];
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX];
|
||||
CFG_TUSB_MEM_SECTION static uint8_t msg_notification[CFG_TUSB_HOST_DEVICE_MAX][8];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX];
|
||||
|
||||
STATIC_VAR rndish_data_t rndish_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
|
||||
|
@ -91,7 +91,7 @@ typedef struct
|
||||
hidd_interface_t* itf;
|
||||
} hidd_report_t ;
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM static hidd_interface_t _hidd_itf[ITF_COUNT];
|
||||
CFG_TUSB_MEM_SECTION static hidd_interface_t _hidd_itf[ITF_COUNT];
|
||||
|
||||
|
||||
#if CFG_TUD_HID_KEYBOARD
|
||||
|
@ -110,7 +110,7 @@ extern const hid_ascii_to_keycode_entry_t HID_ASCII_TO_KEYCODE[128];
|
||||
|
||||
/** Callback invoked when USB host request \ref HID_REQ_CONTROL_GET_REPORT.
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[out] buffer data that application need to update, value must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[out] buffer data that application need to update, value must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] reqlen number of bytes that host requested
|
||||
* \retval non-zero Actual number of bytes in the response's buffer.
|
||||
* \retval zero indicates the current request is not supported. Tinyusb device stack will reject the request by
|
||||
@ -173,7 +173,7 @@ static inline bool tud_hid_mouse_button_release(void)
|
||||
/**
|
||||
* Callback function that is invoked when USB host request \ref HID_REQ_CONTROL_GET_REPORT.
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[out] buffer buffer that application need to update, value must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[out] buffer buffer that application need to update, value must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] reqlen number of bytes that host requested
|
||||
* \retval non-zero Actual number of bytes in the response's buffer.
|
||||
* \retval zero indicates the current request is not supported. Tinyusb device stack will reject the request by
|
||||
|
@ -177,7 +177,7 @@ void hidh_init(void)
|
||||
}
|
||||
|
||||
#if 0
|
||||
CFG_TUSB_ATTR_USBRAM uint8_t report_descriptor[256];
|
||||
CFG_TUSB_MEM_SECTION uint8_t report_descriptor[256];
|
||||
#endif
|
||||
|
||||
tusb_error_t hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
|
||||
|
@ -80,7 +80,7 @@ bool tuh_hid_keyboard_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNU
|
||||
|
||||
/** \brief Perform a get report from Keyboard interface
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \returns \ref tusb_error_t type to indicate success or error condition.
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
* \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
|
||||
@ -145,7 +145,7 @@ bool tuh_hid_mouse_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED
|
||||
|
||||
/** \brief Perform a get report from Mouse interface
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \returns \ref tusb_error_t type to indicate success or error condition.
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
* \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
|
||||
|
@ -83,8 +83,8 @@ typedef struct {
|
||||
uint8_t add_sense_qualifier;
|
||||
}mscd_interface_t;
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN static mscd_interface_t _mscd_itf;
|
||||
CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN static uint8_t _mscd_buf[CFG_TUD_MSC_BUFSIZE];
|
||||
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static mscd_interface_t _mscd_itf;
|
||||
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t _mscd_buf[CFG_TUD_MSC_BUFSIZE];
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
|
@ -51,13 +51,13 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO CONSTANT TYPEDEF
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM STATIC_VAR msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
CFG_TUSB_MEM_SECTION STATIC_VAR msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
|
||||
//------------- Initalization Data -------------//
|
||||
static osal_semaphore_t msch_sem_hdl;
|
||||
|
||||
// buffer used to read scsi information when mounted, largest response data currently is inquiry
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4) STATIC_VAR uint8_t msch_buffer[sizeof(scsi_inquiry_data_t)];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t msch_buffer[sizeof(scsi_inquiry_data_t)];
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
|
@ -104,7 +104,7 @@ tusb_error_t tuh_msc_get_capacity(uint8_t dev_addr, uint32_t* p_last_lba, uint32
|
||||
/** \brief Perform SCSI READ 10 command to read data from MassStorage device
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] lba Starting Logical Block Address to be read
|
||||
* \param[in] block_count Number of Block to be read
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
@ -118,7 +118,7 @@ tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uin
|
||||
/** \brief Perform SCSI WRITE 10 command to write data to MassStorage device
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \param[in] lba Starting Logical Block Address to be written
|
||||
* \param[in] block_count Number of Block to be written
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
@ -132,7 +132,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe
|
||||
/** \brief Perform SCSI REQUEST SENSE command, used to retrieve sense data from MassStorage device
|
||||
* \param[in] dev_addr device address
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[in] p_data Buffer to store response's data from device. Must be accessible by USB controller (see \ref CFG_TUSB_ATTR_USBRAM)
|
||||
* \param[in] p_data Buffer to store response's data from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION)
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
* \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
|
||||
* \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
|
||||
|
@ -64,7 +64,7 @@ typedef struct
|
||||
|
||||
static usbd_control_xfer_t _control_state;
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDOINT0_SIZE];
|
||||
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDOINT0_SIZE];
|
||||
|
||||
void usbd_control_reset (uint8_t rhport)
|
||||
{
|
||||
|
@ -56,12 +56,12 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
|
||||
CFG_TUSB_MEM_SECTION STATIC_VAR ehci_data_t ehci_data;
|
||||
|
||||
#if EHCI_PERIODIC_LIST
|
||||
|
||||
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE];
|
||||
|
||||
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
|
||||
TU_VERIFY_STATIC( ALIGN_OF(period_frame_list0) == 4096, "Period Framelist must be 4k alginment"); // validation
|
||||
@ -69,7 +69,7 @@ CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
|
||||
#endif
|
||||
|
||||
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE];
|
||||
|
||||
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
|
||||
TU_VERIFY_STATIC( ALIGN_OF(period_frame_list1) == 4096, "Period Framelist must be 4k alginment"); // validation
|
||||
|
@ -58,8 +58,8 @@ typedef struct {
|
||||
uint8_t status_change; // data from status change interrupt endpoint
|
||||
}usbh_hub_t;
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM STATIC_VAR usbh_hub_t hub_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
ATTR_ALIGNED(4) CFG_TUSB_ATTR_USBRAM STATIC_VAR uint8_t hub_enum_buffer[sizeof(descriptor_hub_desc_t)];
|
||||
CFG_TUSB_MEM_SECTION STATIC_VAR usbh_hub_t hub_data[CFG_TUSB_HOST_DEVICE_MAX];
|
||||
ATTR_ALIGNED(4) CFG_TUSB_MEM_SECTION STATIC_VAR uint8_t hub_enum_buffer[sizeof(descriptor_hub_desc_t)];
|
||||
|
||||
//OSAL_SEM_DEF(hub_enum_semaphore);
|
||||
//static osal_semaphore_handle_t hub_enum_sem_hdl;
|
||||
|
@ -142,7 +142,7 @@ enum {
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(256) STATIC_VAR ohci_data_t ohci_data;
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(256) STATIC_VAR ohci_data_t ohci_data;
|
||||
|
||||
static ohci_ed_t * const p_ed_head[] =
|
||||
{
|
||||
|
@ -109,13 +109,13 @@ enum { USBH_CLASS_DRIVER_COUNT = sizeof(usbh_class_drivers) / sizeof(host_class_
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address
|
||||
CFG_TUSB_MEM_SECTION usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address
|
||||
|
||||
//------------- Enumeration Task Data -------------/
|
||||
enum { ENUM_QUEUE_DEPTH = 16 };
|
||||
|
||||
STATIC_VAR osal_queue_t enum_queue_hdl;
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4) STATIC_VAR uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE];
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE];
|
||||
|
||||
//------------- Reporter Task Data -------------//
|
||||
|
||||
|
@ -141,11 +141,11 @@ typedef struct {
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
// CFG_TUSB_ATTR_USBRAM must have ATTR_ALIGNED(64) for lpc11u & lpc13u
|
||||
// CFG_TUSB_MEM_SECTION must have ATTR_ALIGNED(64) for lpc11u & lpc13u
|
||||
#ifdef __ICCARM__
|
||||
ATTR_ALIGNED(256) CFG_TUSB_ATTR_USBRAM // for IAR the first ATTR_ALIGNED takes effect
|
||||
ATTR_ALIGNED(256) CFG_TUSB_MEM_SECTION // for IAR the first ATTR_ALIGNED takes effect
|
||||
#else
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(256) // GCC & Keil the last ATTR_ALIGNED takes effect
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(256) // GCC & Keil the last ATTR_ALIGNED takes effect
|
||||
#endif
|
||||
STATIC_VAR dcd_11u_13u_data_t dcd_data;
|
||||
|
||||
|
@ -68,7 +68,7 @@ typedef struct {
|
||||
|
||||
}dcd_data_t;
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(128) STATIC_VAR dcd_data_t dcd_data;
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(128) STATIC_VAR dcd_data_t dcd_data;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
|
@ -66,19 +66,30 @@ typedef struct {
|
||||
dcd_qtd_t qtd[DCD_QTD_MAX] ATTR_ALIGNED(32);
|
||||
}dcd_data_t;
|
||||
|
||||
extern ATTR_WEAK dcd_data_t dcd_data0;
|
||||
extern ATTR_WEAK dcd_data_t dcd_data1;
|
||||
|
||||
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data0;
|
||||
#endif
|
||||
|
||||
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data1;
|
||||
#endif
|
||||
|
||||
static LPC_USB0_Type * const LPC_USB[2] = { LPC_USB0, ((LPC_USB0_Type*) LPC_USB1_BASE) };
|
||||
static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
|
||||
|
||||
static dcd_data_t* const dcd_data_ptr[2] =
|
||||
{
|
||||
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
|
||||
&dcd_data0,
|
||||
#else
|
||||
NULL,
|
||||
#endif
|
||||
|
||||
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
|
||||
&dcd_data1
|
||||
#else
|
||||
NULL
|
||||
#endif
|
||||
};
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROLLER API
|
||||
@ -104,12 +115,11 @@ static void bus_reset(uint8_t rhport)
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
|
||||
|
||||
// The reset value for all endpoint types is the control endpoint. If one endpoint
|
||||
//direction is enabled and the paired endpoint of opposite direction is disabled, then the
|
||||
//endpoint type of the unused direction must bechanged from the control type to any other
|
||||
//type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
|
||||
//for the data PID tracking on the active endpoint.
|
||||
lpc_usb->ENDPTCTRL1 = lpc_usb->ENDPTCTRL2 = lpc_usb->ENDPTCTRL3 =
|
||||
(TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
|
||||
// direction is enabled and the paired endpoint of opposite direction is disabled, then the
|
||||
// endpoint type of the unused direction must bechanged from the control type to any other
|
||||
// type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
|
||||
// for the data PID tracking on the active endpoint.
|
||||
lpc_usb->ENDPTCTRL1 = lpc_usb->ENDPTCTRL2 = lpc_usb->ENDPTCTRL3 = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
|
||||
|
||||
// USB1 only has 3 non-control endpoints
|
||||
if ( rhport == 0)
|
||||
@ -282,6 +292,12 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
}
|
||||
}
|
||||
|
||||
// TOOD implement later
|
||||
bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(rhport, edpt_addr2phy(ep_addr));
|
||||
@ -375,7 +391,9 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
|
||||
return true;
|
||||
}
|
||||
|
||||
//------------- Device Controller Driver's Interrupt Handler -------------//
|
||||
//--------------------------------------------------------------------+
|
||||
// ISR
|
||||
//--------------------------------------------------------------------+
|
||||
void xfer_complete_isr(uint8_t rhport, uint32_t reg_complete)
|
||||
{
|
||||
for(uint8_t ep_idx = 2; ep_idx < DCD_QHD_MAX; ep_idx++)
|
||||
@ -504,7 +522,4 @@ void hal_dcd_isr(uint8_t rhport)
|
||||
if (int_status & INT_MASK_ERROR) TU_ASSERT(false, );
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// HELPER
|
||||
//--------------------------------------------------------------------+
|
||||
#endif
|
||||
|
@ -131,8 +131,9 @@
|
||||
#warning CFG_TUSB_DEBUG is not defined, default value is 0
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUSB_ATTR_USBRAM
|
||||
#error CFG_TUSB_ATTR_USBRAM is not defined, please help me know how to place data in accessible RAM for usb controller
|
||||
// place data in accessible RAM for usb controller
|
||||
#ifndef CFG_TUSB_MEM_SECTION
|
||||
#define CFG_TUSB_MEM_SECTION
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUSB_OS
|
||||
|
@ -42,7 +42,7 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// CDC Serials
|
||||
//--------------------------------------------------------------------+
|
||||
CFG_TUSB_ATTR_USBRAM
|
||||
CFG_TUSB_MEM_SECTION
|
||||
const cdc_configuration_desc_t cdc_config_descriptor =
|
||||
{
|
||||
.configuration =
|
||||
@ -168,7 +168,7 @@ const cdc_configuration_desc_t cdc_config_descriptor =
|
||||
// CDC RNSID
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM
|
||||
CFG_TUSB_MEM_SECTION
|
||||
const cdc_configuration_desc_t rndis_config_descriptor =
|
||||
{
|
||||
.configuration =
|
||||
|
@ -39,7 +39,7 @@
|
||||
#include "tusb_option.h"
|
||||
#include "descriptor_test.h"
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4)
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4)
|
||||
const uint8_t keyboard_report_descriptor[] = {
|
||||
HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP ),
|
||||
HID_USAGE ( HID_USAGE_DESKTOP_KEYBOARD ),
|
||||
@ -81,7 +81,7 @@ const uint8_t keyboard_report_descriptor[] = {
|
||||
HID_COLLECTION_END
|
||||
};
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4)
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4)
|
||||
const uint8_t mouse_report_descriptor[] = {
|
||||
HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP ),
|
||||
HID_USAGE ( HID_USAGE_DESKTOP_MOUSE ),
|
||||
@ -118,7 +118,7 @@ const uint8_t mouse_report_descriptor[] = {
|
||||
};
|
||||
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4)
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4)
|
||||
tusb_desc_device_t const desc_device =
|
||||
{
|
||||
.bLength = sizeof(tusb_desc_device_t),
|
||||
@ -142,7 +142,7 @@ tusb_desc_device_t const desc_device =
|
||||
} ;
|
||||
|
||||
|
||||
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4)
|
||||
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4)
|
||||
const app_configuration_desc_t desc_configuration =
|
||||
{
|
||||
.configuration =
|
||||
|
@ -86,7 +86,7 @@
|
||||
#define CFG_TUSB_DEBUG 3
|
||||
|
||||
#define CFG_TUSB_OS OPT_OS_NONE
|
||||
#define CFG_TUSB_ATTR_USBRAM
|
||||
#define CFG_TUSB_MEM_SECTION
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user