mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
gsnxp
GitHub
commit
616562a48a
25
.gitattributes
vendored
Normal file
25
.gitattributes
vendored
Normal file
@ -0,0 +1,25 @@
|
||||
# Set the default behavior, in case people don't have core.autocrlf set.
|
||||
* text=auto
|
||||
|
||||
*.c text
|
||||
*.cpp text
|
||||
*.h text
|
||||
*.icf text
|
||||
*.js text
|
||||
*.json text
|
||||
*.ld text
|
||||
*.md text
|
||||
*.mk text
|
||||
*.py text
|
||||
*.rst text
|
||||
*.s text
|
||||
*.txt text
|
||||
*.xml text
|
||||
*.yml text
|
||||
|
||||
Makefile text
|
||||
|
||||
# Windows-only Visual Studio things
|
||||
|
||||
*.sln text eol=crlf
|
||||
*.csproj text eol=crlf
|
||||
4
.github/workflows/build.yml
vendored
4
.github/workflows/build.yml
vendored
@ -24,7 +24,8 @@ jobs:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
example: ['board_test', 'cdc_msc', 'dfu_rt', 'hid_composite', 'hid_generic_inout', 'midi_test', 'msc_dual_lun', 'usbtmc', 'webusb_serial']
|
||||
example: ['board_test', 'cdc_dual_ports', 'cdc_msc', 'dfu_rt', 'hid_composite',
|
||||
'hid_generic_inout', 'midi_test', 'msc_dual_lun', 'usbtmc', 'webusb_serial']
|
||||
steps:
|
||||
- name: Setup Python
|
||||
uses: actions/setup-python@v1
|
||||
@ -52,3 +53,4 @@ jobs:
|
||||
|
||||
- name: Build
|
||||
run: python3 tools/build_all.py ${{ matrix.example }}
|
||||
|
||||
|
||||
14
.github/workflows/trigger.yml
vendored
Normal file
14
.github/workflows/trigger.yml
vendored
Normal file
@ -0,0 +1,14 @@
|
||||
name: Trigger Repos
|
||||
|
||||
on:
|
||||
push:
|
||||
branches: master
|
||||
|
||||
jobs:
|
||||
trigger:
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: mynewt-tinyusb-example
|
||||
shell: bash
|
||||
run: |
|
||||
curl -X POST -H "Authorization: token ${{ secrets.GH_REPO_TOKEN }}" -H "Accept: application/vnd.github.everest-preview+json" -H "Content-Type: application/json" --data '{"event_type": "rebuild"}' https://api.github.com/repos/hathach/mynewt-tinyusb-example/dispatches
|
||||
3
.gitmodules
vendored
3
.gitmodules
vendored
@ -19,3 +19,6 @@
|
||||
[submodule "hw/mcu/microchip"]
|
||||
path = hw/mcu/microchip
|
||||
url = https://github.com/hathach/microchip_driver.git
|
||||
[submodule "hw/mcu/nuvoton"]
|
||||
path = hw/mcu/nuvoton
|
||||
url = https://github.com/majbthrd/nuc_driver.git
|
||||
@ -24,6 +24,11 @@
|
||||
* Various improvement e.g Zero-length packet, Lint setup
|
||||
* Board support for STM32F070RB Nucleo, STM32F303 Discovery
|
||||
|
||||
* **[Peter Lawrence](https://github.com/majbthrd)**
|
||||
* Nuvoton NUC 121, 125, 126 device driver port
|
||||
* Board support for NuTiny NUC121s, NUC125s, NUC126V
|
||||
* Complete multiple class interfaces & add cdc_dual_ports example
|
||||
|
||||
* **[Scott Shawcroft](https://github.com/tannewt)**
|
||||
* SAMD21 and SAMD51 device driver port
|
||||
* MIDI device class driver support
|
||||
|
||||
23
README.md
23
README.md
@ -2,7 +2,7 @@
|
||||
|
||||
|
||||
|
||||
[](https://travis-ci.org/hathach/tinyusb) [](https://opensource.org/licenses/MIT) [](https://scan.coverity.com/projects/tinyusb)
|
||||
[](https://github.com/hathach/tinyusb/actions) [](https://opensource.org/licenses/MIT) [](https://scan.coverity.com/projects/tinyusb)
|
||||
|
||||
TinyUSB is an open-source cross-platform USB Host/Device stack for embedded system, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events are deferred then handled in the non-ISR task function.
|
||||
|
||||
@ -23,12 +23,12 @@ TinyUSB is an open-source cross-platform USB Host/Device stack for embedded syst
|
||||
|
||||
## Contributors
|
||||
|
||||
Special thanks for all the people who had spent their precious time and effort to helped this project so far. Check out
|
||||
Special thanks to all the people who spent their precious time and effort to help this project so far. Check out the
|
||||
[CONTRIBUTORS.md](CONTRIBUTORS.md) file for the list of all contributors and their awesome work for the stack.
|
||||
|
||||
## Supported MCUs
|
||||
|
||||
The stack supports the following MCUs
|
||||
The stack supports the following MCUs:
|
||||
|
||||
- **MicroChip:** SAMD21, SAMD51 (device only)
|
||||
- **Nordic:** nRF52840, nRF52833
|
||||
@ -38,12 +38,13 @@ The stack supports the following MCUs
|
||||
- **Sony:** CXD56
|
||||
- **ST:** STM32 series: L0, F0, F1, F2, F3, F4, F7, H7 (device only)
|
||||
- **[ValentyUSB](https://github.com/im-tomu/valentyusb)** eptri
|
||||
- **Nuvoton:** NUC121/NUC125, NUC126
|
||||
|
||||
[Here is the list of supported Boards](docs/boards.md) that can be used with provided examples.
|
||||
|
||||
## Device Stack
|
||||
|
||||
Support multiple device configurations by dynamically changing usb descriptors. Low power functions such as suspend, resume and remote wakeup. Following device classes are supported:
|
||||
Supports multiple device configurations by dynamically changing usb descriptors. Low power functions such like suspend, resume, and remote wakeup. Following device classes are supported:
|
||||
|
||||
- Communication Class (CDC)
|
||||
- Human Interface Device (HID): Generic (In & Out), Keyboard, Mouse, Gamepad etc ...
|
||||
@ -58,11 +59,11 @@ Support multiple device configurations by dynamically changing usb descriptors.
|
||||
|
||||
- Human Interface Device (HID): Keyboard, Mouse, Generic
|
||||
- Mass Storage Class (MSC)
|
||||
- Hub currently only support 1 level of hub (due to my laziness)
|
||||
- Hub currently only supports 1 level of hub (due to my laziness)
|
||||
|
||||
## OS Abtraction layer
|
||||
## OS Abstraction layer
|
||||
|
||||
TinyUSB is completely thread-safe by pushing all ISR events into a central queue, then process it later in the non-ISR context task function. It also uses semphore/mutex to access shared resource such as CDC FIFO. Therefore the stack needs to use some of OS's basic APIs. Following OSes are already supported out of the box.
|
||||
TinyUSB is completely thread-safe by pushing all ISR events into a central queue, then process it later in the non-ISR context task function. It also uses semaphore/mutex to access shared resources such as CDC FIFO. Therefore the stack needs to use some of OS's basic APIs. Following OSes are already supported out of the box.
|
||||
|
||||
- **No OS** : Disabling USB IRQ is used as way to provide mutex
|
||||
- **FreeRTOS**
|
||||
@ -70,11 +71,11 @@ TinyUSB is completely thread-safe by pushing all ISR events into a central queue
|
||||
|
||||
## Compiler & IDE
|
||||
|
||||
The stack is developed with GCC compiler, and should be compilable with others. Folder `examples` provide Makefile and Segger Embedded Studio build support. [Here is instruction to build example](examples/readme.md).
|
||||
The stack is developed with GCC compiler and should be compilable with others. The `examples` folder provides Makefile and Segger Embedded Studio build support. [Here are example build instructions](examples/readme.md).
|
||||
|
||||
## Getting Started
|
||||
|
||||
[Here is the details for getting started](docs/getting_started.md) with the stack.
|
||||
[Here are the details for getting started](docs/getting_started.md) with the stack.
|
||||
|
||||
## Porting
|
||||
|
||||
@ -82,7 +83,7 @@ Want to help add TinyUSB support for a new MCU? Read [here](docs/porting.md) for
|
||||
|
||||
## License
|
||||
|
||||
MIT license for all TinyUSB sources `src` folder, [Full license is here](LICENSE). However each file is individually licensed especially those in `lib` and `hw/mcu` folder. Please make sure you understand all the license term for files you use in your project.
|
||||
MIT license for all TinyUSB sources `src` folder, [Full license is here](LICENSE). However, each file is individually licensed especially those in `lib` and `hw/mcu` folder. Please make sure you understand all the license term for files you use in your project.
|
||||
|
||||
## Uses
|
||||
|
||||
@ -95,4 +96,4 @@ TinyUSB is currently used by these other projects:
|
||||
* [MicroPython](https://github.com/micropython/micropython)
|
||||
* [TinyUSB Arduino Library](https://github.com/adafruit/Adafruit_TinyUSB_Arduino)
|
||||
|
||||
Let's me know if your project also uses TinyUSB and want to share.
|
||||
Let me know if your project also uses TinyUSB and want to share.
|
||||
|
||||
@ -7,7 +7,7 @@ The board support code is only used for self-contained examples and testing. It
|
||||
|
||||
## Supported Boards
|
||||
|
||||
This code base already had supported for a handful of following boards
|
||||
This code base already had supported for a handful of following boards (sorted alphabetically)
|
||||
|
||||
### MicroChip SAMD
|
||||
|
||||
@ -25,6 +25,13 @@ This code base already had supported for a handful of following boards
|
||||
- [Nordic nRF52840 Development Kit (aka pca10056)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK)
|
||||
- [Nordic nRF52840 Dongle (aka pca10059)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle)
|
||||
- [Nordic nRF52833 Development Kit (aka pca10100)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK)
|
||||
- [Raytac MDBT50Q-RX Dongle](https://www.raytac.com/product/ins.php?index_id=89)
|
||||
|
||||
### Nuvoton
|
||||
|
||||
- [NuTiny NUC121S](https://direct.nuvoton.com/en/nutiny-nuc121s)
|
||||
- [NuTiny NUC125S](https://direct.nuvoton.com/en/nutiny-nuc125s)
|
||||
- [NuTiny NUC126V](https://direct.nuvoton.com/en/nutiny-nuc126v)
|
||||
|
||||
### NXP iMX RT
|
||||
|
||||
@ -34,6 +41,7 @@ This code base already had supported for a handful of following boards
|
||||
- [MIMX RT1050 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK)
|
||||
- [MIMX RT1060 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/mimxrt1060-evk-i.mx-rt1060-evaluation-kit:MIMXRT1060-EVK)
|
||||
- [MIMX RT1064 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/mimxrt1064-evk-i.mx-rt1064-evaluation-kit:MIMXRT1064-EVK)
|
||||
- [Teensy 4.0 Development Board](https://www.pjrc.com/store/teensy40.html)
|
||||
|
||||
### NXP LPC
|
||||
|
||||
@ -64,7 +72,9 @@ This code base already had supported for a handful of following boards
|
||||
- STM32 F103c Blue Pill
|
||||
- [STM32 F207zg Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f207zg.html)
|
||||
- [STM32 F303vc Discovery](https://www.st.com/en/evaluation-tools/stm32f3discovery.html)
|
||||
- STM32 F401cc Black Pill
|
||||
- [STM32 F407vg Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html)
|
||||
- STM32 F411ce Black Pill
|
||||
- [STM32 F411ve Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html)
|
||||
- [STM32 F412zg Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html)
|
||||
- [STM32 F767zi Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f767zi.html)
|
||||
|
||||
12
examples/device/cdc_dual_ports/Makefile
Normal file
12
examples/device/cdc_dual_ports/Makefile
Normal file
@ -0,0 +1,12 @@
|
||||
include ../../../tools/top.mk
|
||||
include ../../make.mk
|
||||
|
||||
INC += \
|
||||
src \
|
||||
$(TOP)/hw \
|
||||
|
||||
# Example source
|
||||
EXAMPLE_SOURCE += $(wildcard src/*.c)
|
||||
SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
|
||||
|
||||
include ../../rules.mk
|
||||
100
examples/device/cdc_dual_ports/src/main.c
Normal file
100
examples/device/cdc_dual_ports/src/main.c
Normal file
@ -0,0 +1,100 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <ctype.h>
|
||||
|
||||
#include "bsp/board.h"
|
||||
#include "tusb.h"
|
||||
|
||||
//------------- prototypes -------------//
|
||||
static void cdc_task(void);
|
||||
|
||||
/*------------- MAIN -------------*/
|
||||
int main(void)
|
||||
{
|
||||
board_init();
|
||||
|
||||
tusb_init();
|
||||
|
||||
while (1)
|
||||
{
|
||||
tud_task(); // tinyusb device task
|
||||
cdc_task();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// echo to either Serial0 or Serial1
|
||||
// with Serial0 as all lower case, Serial1 as all upper case
|
||||
static void echo_serial_port(uint8_t itf, uint8_t buf[], uint32_t count)
|
||||
{
|
||||
for(uint32_t i=0; i<count; i++)
|
||||
{
|
||||
if (itf == 0)
|
||||
{
|
||||
// echo back 1st port as lower case
|
||||
if (isupper(buf[i])) buf[i] += 'a' - 'A';
|
||||
}
|
||||
else
|
||||
{
|
||||
// echo back additional ports as upper case
|
||||
if (islower(buf[i])) buf[i] -= 'a' - 'A';
|
||||
}
|
||||
|
||||
tud_cdc_n_write_char(itf, buf[i]);
|
||||
|
||||
if ( buf[i] == '\r' ) tud_cdc_n_write_char(itf, '\n');
|
||||
}
|
||||
tud_cdc_n_write_flush(itf);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// USB CDC
|
||||
//--------------------------------------------------------------------+
|
||||
static void cdc_task(void)
|
||||
{
|
||||
uint8_t itf;
|
||||
|
||||
for (itf = 0; itf < CFG_TUD_CDC; itf++)
|
||||
{
|
||||
if ( tud_cdc_n_connected(itf) )
|
||||
{
|
||||
if ( tud_cdc_n_available(itf) )
|
||||
{
|
||||
uint8_t buf[64];
|
||||
|
||||
uint32_t count = tud_cdc_n_read(itf, buf, sizeof(buf));
|
||||
|
||||
// echo back to both serial ports
|
||||
echo_serial_port(0, buf, count);
|
||||
echo_serial_port(1, buf, count);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
92
examples/device/cdc_dual_ports/src/tusb_config.h
Normal file
92
examples/device/cdc_dual_ports/src/tusb_config.h
Normal file
@ -0,0 +1,92 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_CONFIG_H_
|
||||
#define _TUSB_CONFIG_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------
|
||||
// COMMON CONFIGURATION
|
||||
//--------------------------------------------------------------------
|
||||
|
||||
// defined by compiler flags for flexibility
|
||||
#ifndef CFG_TUSB_MCU
|
||||
#error CFG_TUSB_MCU must be defined
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
|
||||
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_HIGH_SPEED)
|
||||
#else
|
||||
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
|
||||
#endif
|
||||
|
||||
#define CFG_TUSB_OS OPT_OS_NONE
|
||||
|
||||
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
|
||||
// #define CFG_TUSB_DEBUG 0
|
||||
|
||||
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
|
||||
* Tinyusb use follows macros to declare transferring memory so that they can be put
|
||||
* into those specific section.
|
||||
* e.g
|
||||
* - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
|
||||
* - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
|
||||
*/
|
||||
#ifndef CFG_TUSB_MEM_SECTION
|
||||
#define CFG_TUSB_MEM_SECTION
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUSB_MEM_ALIGN
|
||||
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------
|
||||
// DEVICE CONFIGURATION
|
||||
//--------------------------------------------------------------------
|
||||
|
||||
#ifndef CFG_TUD_ENDPOINT0_SIZE
|
||||
#define CFG_TUD_ENDPOINT0_SIZE 64
|
||||
#endif
|
||||
|
||||
//------------- CLASS -------------//
|
||||
#define CFG_TUD_CDC 2
|
||||
#define CFG_TUD_MSC 0
|
||||
#define CFG_TUD_HID 0
|
||||
#define CFG_TUD_MIDI 0
|
||||
#define CFG_TUD_VENDOR 0
|
||||
|
||||
// CDC FIFO size of TX and RX
|
||||
#define CFG_TUD_CDC_RX_BUFSIZE 64
|
||||
#define CFG_TUD_CDC_TX_BUFSIZE 64
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _TUSB_CONFIG_H_ */
|
||||
163
examples/device/cdc_dual_ports/src/usb_descriptors.c
Normal file
163
examples/device/cdc_dual_ports/src/usb_descriptors.c
Normal file
@ -0,0 +1,163 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "tusb.h"
|
||||
|
||||
/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
|
||||
* Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
|
||||
*
|
||||
* Auto ProductID layout's Bitmap:
|
||||
* [MSB] MIDI | HID | MSC | CDC [LSB]
|
||||
*/
|
||||
#define _PID_MAP(itf, n) ( (CFG_TUD_##itf) << (n) )
|
||||
#define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
|
||||
_PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Device Descriptors
|
||||
//--------------------------------------------------------------------+
|
||||
tusb_desc_device_t const desc_device =
|
||||
{
|
||||
.bLength = sizeof(tusb_desc_device_t),
|
||||
.bDescriptorType = TUSB_DESC_DEVICE,
|
||||
.bcdUSB = 0x0200,
|
||||
|
||||
// Use Interface Association Descriptor (IAD) for CDC
|
||||
// As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
|
||||
.bDeviceClass = TUSB_CLASS_MISC,
|
||||
.bDeviceSubClass = MISC_SUBCLASS_COMMON,
|
||||
.bDeviceProtocol = MISC_PROTOCOL_IAD,
|
||||
.bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
|
||||
|
||||
.idVendor = 0xCafe,
|
||||
.idProduct = USB_PID,
|
||||
.bcdDevice = 0x0100,
|
||||
|
||||
.iManufacturer = 0x01,
|
||||
.iProduct = 0x02,
|
||||
.iSerialNumber = 0x03,
|
||||
|
||||
.bNumConfigurations = 0x01
|
||||
};
|
||||
|
||||
// Invoked when received GET DEVICE DESCRIPTOR
|
||||
// Application return pointer to descriptor
|
||||
uint8_t const * tud_descriptor_device_cb(void)
|
||||
{
|
||||
return (uint8_t const *) &desc_device;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Configuration Descriptor
|
||||
//--------------------------------------------------------------------+
|
||||
enum
|
||||
{
|
||||
ITF_NUM_CDC1 = 0,
|
||||
ITF_NUM_CDC_DATA1,
|
||||
ITF_NUM_CDC2,
|
||||
ITF_NUM_CDC_DATA2,
|
||||
ITF_NUM_TOTAL
|
||||
};
|
||||
|
||||
#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + CFG_TUD_CDC * TUD_CDC_DESC_LEN)
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
|
||||
// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
|
||||
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
|
||||
#define EPNUM_CDC 2
|
||||
#else
|
||||
#define EPNUM_CDC 2
|
||||
#endif
|
||||
|
||||
uint8_t const desc_configuration[] =
|
||||
{
|
||||
// Interface count, string index, total length, attribute, power in mA
|
||||
TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
|
||||
|
||||
// 1st CDC: Interface number, string index, EP notification address and size, EP data address (out, in) and size.
|
||||
TUD_CDC_DESCRIPTOR(ITF_NUM_CDC1, 4, 0x81, 8, EPNUM_CDC, 0x80 | EPNUM_CDC, 64),
|
||||
|
||||
// 2nd CDC: Interface number, string index, EP notification address and size, EP data address (out, in) and size.
|
||||
TUD_CDC_DESCRIPTOR(ITF_NUM_CDC2, 4, 0x83, 8, EPNUM_CDC + 2, 0x80 | (EPNUM_CDC + 2), 64),
|
||||
};
|
||||
|
||||
// Invoked when received GET CONFIGURATION DESCRIPTOR
|
||||
// Application return pointer to descriptor
|
||||
// Descriptor contents must exist long enough for transfer to complete
|
||||
uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
|
||||
{
|
||||
(void) index; // for multiple configurations
|
||||
return desc_configuration;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// String Descriptors
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// array of pointer to string descriptors
|
||||
char const* string_desc_arr [] =
|
||||
{
|
||||
(const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
|
||||
"TinyUSB", // 1: Manufacturer
|
||||
"TinyUSB Device", // 2: Product
|
||||
"123456", // 3: Serials, should use chip ID
|
||||
"TinyUSB CDC", // 4: CDC Interface
|
||||
};
|
||||
|
||||
static uint16_t _desc_str[32];
|
||||
|
||||
// Invoked when received GET STRING DESCRIPTOR request
|
||||
// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
|
||||
uint16_t const* tud_descriptor_string_cb(uint8_t index)
|
||||
{
|
||||
uint8_t chr_count;
|
||||
|
||||
if ( index == 0)
|
||||
{
|
||||
memcpy(&_desc_str[1], string_desc_arr[0], 2);
|
||||
chr_count = 1;
|
||||
}else
|
||||
{
|
||||
// Convert ASCII string into UTF-16
|
||||
|
||||
if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
|
||||
|
||||
const char* str = string_desc_arr[index];
|
||||
|
||||
// Cap at max char
|
||||
chr_count = strlen(str);
|
||||
if ( chr_count > 31 ) chr_count = 31;
|
||||
|
||||
for(uint8_t i=0; i<chr_count; i++)
|
||||
{
|
||||
_desc_str[1+i] = str[i];
|
||||
}
|
||||
}
|
||||
|
||||
// first byte is length (including header), second byte is string type
|
||||
_desc_str[0] = (TUSB_DESC_STRING << 8 ) | (2*chr_count + 2);
|
||||
|
||||
return _desc_str;
|
||||
}
|
||||
@ -12,7 +12,7 @@ $ cd tinyusb
|
||||
TinyUSB examples includes external repos aka submodules to provide low-level MCU peripheral's driver to compile with. Therefore we will firstly fetch those mcu driver repo by running this command in the top folder repo
|
||||
|
||||
```
|
||||
$ git submodule update --init --rescursive
|
||||
$ git submodule update --init --recursive
|
||||
```
|
||||
|
||||
It will takes a bit of time due to the number of supported MCUs, luckily we only need to do this once.
|
||||
|
||||
@ -120,8 +120,13 @@ endif
|
||||
# Flash using jlink
|
||||
flash-jlink: $(BUILD)/$(BOARD)-firmware.hex
|
||||
@echo halt > $(BUILD)/$(BOARD).jlink
|
||||
@echo r > $(BUILD)/$(BOARD).jlink
|
||||
@echo loadfile $^ >> $(BUILD)/$(BOARD).jlink
|
||||
@echo r >> $(BUILD)/$(BOARD).jlink
|
||||
@echo go >> $(BUILD)/$(BOARD).jlink
|
||||
@echo exit >> $(BUILD)/$(BOARD).jlink
|
||||
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
|
||||
|
||||
# flash STM32 MCU using stlink with STM32 Cube Programmer CLI
|
||||
flash-stlink: $(BUILD)/$(BOARD)-firmware.elf
|
||||
STM32_Programmer_CLI --connect port=swd --write $< --go
|
||||
|
||||
@ -25,7 +25,7 @@ INC += \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/pm/ \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
|
||||
|
||||
@ -46,6 +46,6 @@ JLINK_IF = swd
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
# flash target ROM bootloader
|
||||
flash: $(BUILD)/$(BOARD)-firmware.bin
|
||||
dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
|
||||
|
||||
@ -67,7 +67,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 4
|
||||
* APB2 Prescaler = 2
|
||||
* HSE Frequency(Hz) = 12000000
|
||||
* PLL_M = 12
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 7
|
||||
@ -95,7 +95,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 12;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
@ -25,7 +25,7 @@ INC += \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/pm/ \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
|
||||
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
|
||||
|
||||
@ -11,7 +11,8 @@ CFLAGS += \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX
|
||||
|
||||
# mcu driver cause following warnings
|
||||
CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough=
|
||||
# CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough=
|
||||
CFLAGS += -Wno-error=unused-parameter
|
||||
|
||||
MCU_DIR = hw/mcu/nxp/sdk/devices/MIMXRT1011
|
||||
|
||||
|
||||
57
hw/bsp/nutiny_nuc121s/board.mk
Normal file
57
hw/bsp/nutiny_nuc121s/board.mk
Normal file
@ -0,0 +1,57 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m0 \
|
||||
-D__ARM_FEATURE_DSP=0 \
|
||||
-DUSE_ASSERT=0 \
|
||||
-DCFG_EXAMPLE_MSC_READONLY \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NUC121
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/nutiny_nuc121s/nuc121_flash.ld
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/adc.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/bpwm.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/i2c.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/pdma.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/pwm.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/spi_i2s.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/uart.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/usbd.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_i2c.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_spi.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_uart.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/wdt.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/wwdt.c
|
||||
|
||||
SRC_S += \
|
||||
hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nuvoton
|
||||
CHIP_FAMILY = nuc121
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM0
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = NUC121SC2AE
|
||||
JLINK_IF = swd
|
||||
|
||||
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
|
||||
# Please compile and install it from github source
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
|
||||
195
hw/bsp/nutiny_nuc121s/nuc121_flash.ld
Normal file
195
hw/bsp/nutiny_nuc121s/nuc121_flash.ld
Normal file
@ -0,0 +1,195 @@
|
||||
/* Linker script to configure memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000 /* 32k */
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x2000 /* 8k */
|
||||
}
|
||||
|
||||
/* Library configurations */
|
||||
GROUP(libgcc.a libc.a libm.a libnosys.a)
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
* __Vectors_End
|
||||
* __Vectors_Size
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
__Vectors_End = .;
|
||||
__Vectors_Size = __Vectors_End - __Vectors;
|
||||
__end__ = .;
|
||||
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__HeapBase = .;
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
KEEP(*(.heap*))
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
KEEP(*(.stack*))
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
110
hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
Normal file
110
hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
Normal file
@ -0,0 +1,110 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board.h"
|
||||
#include "NuMicro.h"
|
||||
#include "clk.h"
|
||||
#include "sys.h"
|
||||
|
||||
#define LED_PORT PB
|
||||
#define LED_PIN 4
|
||||
#define LED_PIN_IO PB4
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Unlock protected registers */
|
||||
SYS_UnlockReg();
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Init System Clock */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
/* Enable Internal HIRC 48 MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
|
||||
|
||||
/* Waiting for Internal RC clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
|
||||
|
||||
/* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
|
||||
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
|
||||
|
||||
/* Enable module clock */
|
||||
CLK_EnableModuleClock(USBD_MODULE);
|
||||
|
||||
/* Select module clock source */
|
||||
CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
|
||||
|
||||
/* Enable module clock */
|
||||
CLK_EnableModuleClock(USBD_MODULE);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(48000000 / 1000);
|
||||
#endif
|
||||
|
||||
// LED
|
||||
GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
41
hw/bsp/nutiny_nuc125s/board.mk
Normal file
41
hw/bsp/nutiny_nuc125s/board.mk
Normal file
@ -0,0 +1,41 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m0 \
|
||||
-D__ARM_FEATURE_DSP=0 \
|
||||
-DUSE_ASSERT=0 \
|
||||
-DCFG_EXAMPLE_MSC_READONLY \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NUC121
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/nutiny_nuc125s/nuc125_flash.ld
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
|
||||
hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c
|
||||
|
||||
SRC_S += \
|
||||
hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nuvoton
|
||||
CHIP_FAMILY = nuc121
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM0
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = NUC125SC2AE
|
||||
JLINK_IF = swd
|
||||
|
||||
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
|
||||
# Please compile and install it from github source
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
|
||||
195
hw/bsp/nutiny_nuc125s/nuc125_flash.ld
Normal file
195
hw/bsp/nutiny_nuc125s/nuc125_flash.ld
Normal file
@ -0,0 +1,195 @@
|
||||
/* Linker script to configure memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000 /* 32k */
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x2000 /* 8k */
|
||||
}
|
||||
|
||||
/* Library configurations */
|
||||
GROUP(libgcc.a libc.a libm.a libnosys.a)
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
* __Vectors_End
|
||||
* __Vectors_Size
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
__Vectors_End = .;
|
||||
__Vectors_Size = __Vectors_End - __Vectors;
|
||||
__end__ = .;
|
||||
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__HeapBase = .;
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
KEEP(*(.heap*))
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
KEEP(*(.stack*))
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
110
hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
Normal file
110
hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
Normal file
@ -0,0 +1,110 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board.h"
|
||||
#include "NuMicro.h"
|
||||
#include "clk.h"
|
||||
#include "sys.h"
|
||||
|
||||
#define LED_PORT PB
|
||||
#define LED_PIN 4
|
||||
#define LED_PIN_IO PB4
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Unlock protected registers */
|
||||
SYS_UnlockReg();
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Init System Clock */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
/* Enable Internal HIRC 48 MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
|
||||
|
||||
/* Waiting for Internal RC clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
|
||||
|
||||
/* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
|
||||
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
|
||||
|
||||
/* Enable module clock */
|
||||
CLK_EnableModuleClock(USBD_MODULE);
|
||||
|
||||
/* Select module clock source */
|
||||
CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
|
||||
|
||||
/* Enable module clock */
|
||||
CLK_EnableModuleClock(USBD_MODULE);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(48000000 / 1000);
|
||||
#endif
|
||||
|
||||
// LED
|
||||
GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
61
hw/bsp/nutiny_nuc126v/board.mk
Normal file
61
hw/bsp/nutiny_nuc126v/board.mk
Normal file
@ -0,0 +1,61 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs-linux \
|
||||
-mcpu=cortex-m0 \
|
||||
-D__ARM_FEATURE_DSP=0 \
|
||||
-DUSE_ASSERT=0 \
|
||||
-D__CORTEX_SC=0 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NUC126
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/nutiny_nuc126v/nuc126_flash.ld
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/system_NUC126.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/acmp.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/adc.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/clk.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/crc.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/ebi.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/fmc.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/gpio.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/pdma.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/pwm.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/rtc.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/sc.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/scuart.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/spi.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/sys.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/timer.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/timer_pwm.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/uart.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/usbd.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/usci_spi.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/usci_uart.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/wdt.c \
|
||||
hw/mcu/nuvoton/nuc126/StdDriver/src/wwdt.c
|
||||
|
||||
SRC_S += \
|
||||
hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Include \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc126/StdDriver/inc \
|
||||
$(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nuvoton
|
||||
CHIP_FAMILY = nuc121
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM0
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = NUC126VG4AE
|
||||
JLINK_IF = swd
|
||||
|
||||
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
|
||||
# Please compile and install it from github source
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
|
||||
195
hw/bsp/nutiny_nuc126v/nuc126_flash.ld
Normal file
195
hw/bsp/nutiny_nuc126v/nuc126_flash.ld
Normal file
@ -0,0 +1,195 @@
|
||||
/* Linker script to configure memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000 /* 256k */
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x5000 /* 20k */
|
||||
}
|
||||
|
||||
/* Library configurations */
|
||||
GROUP(libgcc.a libc.a libm.a libnosys.a)
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
* __Vectors_End
|
||||
* __Vectors_Size
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
__Vectors_End = .;
|
||||
__Vectors_Size = __Vectors_End - __Vectors;
|
||||
__end__ = .;
|
||||
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__HeapBase = .;
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
KEEP(*(.heap*))
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
KEEP(*(.stack*))
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
141
hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
Normal file
141
hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
Normal file
@ -0,0 +1,141 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board.h"
|
||||
#include "NuMicro.h"
|
||||
#include "clk.h"
|
||||
#include "sys.h"
|
||||
|
||||
#define LED_PORT PC
|
||||
#define LED_PIN 9
|
||||
#define LED_PIN_IO PC9
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
#define CRYSTAL_LESS /* system will be 48MHz when defined, otherwise, system is 72MHz */
|
||||
#define HIRC48_AUTO_TRIM SYS_IRCTCTL1_REFCKSEL_Msk | (1UL << SYS_IRCTCTL1_LOOPSEL_Pos) | (2UL << SYS_IRCTCTL1_FREQSEL_Pos)
|
||||
#define TRIM_INIT (SYS_BASE+0x118)
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Unlock protected registers */
|
||||
SYS_UnlockReg();
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Init System Clock */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
/* Enable Internal RC 22.1184 MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
|
||||
|
||||
/* Waiting for Internal RC clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
|
||||
|
||||
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
|
||||
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
|
||||
|
||||
#ifndef CRYSTAL_LESS
|
||||
/* Enable external XTAL 12 MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
|
||||
|
||||
/* Waiting for external XTAL clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
|
||||
|
||||
/* Set core clock */
|
||||
CLK_SetCoreClock(72000000);
|
||||
|
||||
/* Use HIRC as UART clock source */
|
||||
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
|
||||
|
||||
/* Use PLL as USB clock source */
|
||||
CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_PLL, CLK_CLKDIV0_USB(3));
|
||||
|
||||
#else
|
||||
/* Enable Internal RC 48MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
|
||||
|
||||
/* Waiting for Internal RC clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
|
||||
|
||||
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
|
||||
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1));
|
||||
|
||||
/* Use HIRC as UART clock source */
|
||||
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
|
||||
|
||||
/* Use HIRC48 as USB clock source */
|
||||
CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC48, CLK_CLKDIV0_USB(1));
|
||||
#endif
|
||||
|
||||
/* Enable module clock */
|
||||
CLK_EnableModuleClock(USBD_MODULE);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(48000000 / 1000);
|
||||
#endif
|
||||
|
||||
// LED
|
||||
GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
@ -42,9 +42,5 @@ FREERTOS_PORT = ARM_CM4F
|
||||
JLINK_DEVICE = stm32f405rg
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -56,7 +56,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 4
|
||||
* APB2 Prescaler = 2
|
||||
* HSE Frequency(Hz) = 12000000
|
||||
* PLL_M = 12
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 7
|
||||
@ -84,7 +84,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 12;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
54
hw/bsp/raytac_mdbt50q_rx/board.mk
Normal file
54
hw/bsp/raytac_mdbt50q_rx/board.mk
Normal file
@ -0,0 +1,54 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-DNRF52840_XXAA \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_NRF5X
|
||||
|
||||
# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
|
||||
CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
|
||||
|
||||
# due to tusb_hal_nrf_power_event
|
||||
GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
|
||||
ifeq ($(shell expr $(GCCVERSION) \>= 8), 1)
|
||||
CFLAGS += -Wno-error=cast-function-type
|
||||
endif
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52840_xxaa.ld
|
||||
|
||||
LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk
|
||||
|
||||
SRC_C += \
|
||||
hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \
|
||||
hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/nordic/cmsis/Include \
|
||||
$(TOP)/hw/mcu/nordic \
|
||||
$(TOP)/hw/mcu/nordic/nrfx \
|
||||
$(TOP)/hw/mcu/nordic/nrfx/mdk \
|
||||
$(TOP)/hw/mcu/nordic/nrfx/hal \
|
||||
$(TOP)/hw/mcu/nordic/nrfx/drivers/include \
|
||||
$(TOP)/hw/mcu/nordic/nrfx/drivers/src \
|
||||
|
||||
SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S
|
||||
|
||||
ASFLAGS += -D__HEAP_SIZE=0
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nordic
|
||||
CHIP_FAMILY = nrf5x
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = nRF52840_xxAA
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
||||
190
hw/bsp/raytac_mdbt50q_rx/raytac_mdbt50q_rx.c
Normal file
190
hw/bsp/raytac_mdbt50q_rx/raytac_mdbt50q_rx.c
Normal file
@ -0,0 +1,190 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board.h"
|
||||
|
||||
#include "nrfx.h"
|
||||
#include "nrfx/hal/nrf_gpio.h"
|
||||
#include "nrfx/drivers/include/nrfx_power.h"
|
||||
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
#include "nrf_sdm.h"
|
||||
#include "nrf_soc.h"
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* MACRO TYPEDEF CONSTANT ENUM
|
||||
*------------------------------------------------------------------*/
|
||||
#define LED_PIN (32+13) // P1.13
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
// Button 1
|
||||
#define BUTTON_PIN 15 // P0.15
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
// tinyusb function that handles power event (detected, ready, removed)
|
||||
// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
|
||||
extern void tusb_hal_nrf_power_event(uint32_t event);
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
// Config clock source: XTAL or RC in sdk_config.h
|
||||
NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
|
||||
NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
|
||||
|
||||
// LED
|
||||
nrf_gpio_cfg_output(LED_PIN);
|
||||
board_led_write(false);
|
||||
|
||||
// Button
|
||||
nrf_gpio_cfg_input(BUTTON_PIN, NRF_GPIO_PIN_PULLUP);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock/1000);
|
||||
#endif
|
||||
|
||||
#if TUSB_OPT_DEVICE_ENABLED
|
||||
// Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice
|
||||
// 2 is highest for application
|
||||
NVIC_SetPriority(USBD_IRQn, 2);
|
||||
|
||||
// USB power may already be ready at this time -> no event generated
|
||||
// We need to invoke the handler based on the status initially
|
||||
uint32_t usb_reg;
|
||||
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
uint8_t sd_en = false;
|
||||
sd_softdevice_is_enabled(&sd_en);
|
||||
|
||||
if ( sd_en ) {
|
||||
sd_power_usbdetected_enable(true);
|
||||
sd_power_usbpwrrdy_enable(true);
|
||||
sd_power_usbremoved_enable(true);
|
||||
|
||||
sd_power_usbregstatus_get(&usb_reg);
|
||||
}else
|
||||
#endif
|
||||
{
|
||||
// Power module init
|
||||
const nrfx_power_config_t pwr_cfg = { 0 };
|
||||
nrfx_power_init(&pwr_cfg);
|
||||
|
||||
// Register tusb function as USB power handler
|
||||
const nrfx_power_usbevt_config_t config = { .handler = (nrfx_power_usb_event_handler_t) tusb_hal_nrf_power_event };
|
||||
nrfx_power_usbevt_init(&config);
|
||||
|
||||
nrfx_power_usbevt_enable();
|
||||
|
||||
usb_reg = NRF_POWER->USBREGSTATUS;
|
||||
}
|
||||
|
||||
if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED);
|
||||
if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
// process SOC event from SD
|
||||
uint32_t proc_soc(void)
|
||||
{
|
||||
uint32_t soc_evt;
|
||||
uint32_t err = sd_evt_get(&soc_evt);
|
||||
|
||||
if (NRF_SUCCESS == err)
|
||||
{
|
||||
/*------------- usb power event handler -------------*/
|
||||
int32_t usbevt = (soc_evt == NRF_EVT_POWER_USB_DETECTED ) ? NRFX_POWER_USB_EVT_DETECTED:
|
||||
(soc_evt == NRF_EVT_POWER_USB_POWER_READY) ? NRFX_POWER_USB_EVT_READY :
|
||||
(soc_evt == NRF_EVT_POWER_USB_REMOVED ) ? NRFX_POWER_USB_EVT_REMOVED : -1;
|
||||
|
||||
if ( usbevt >= 0) tusb_hal_nrf_power_event(usbevt);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
uint32_t proc_ble(void)
|
||||
{
|
||||
// do nothing with ble
|
||||
return NRF_ERROR_NOT_FOUND;
|
||||
}
|
||||
|
||||
void SD_EVT_IRQHandler(void)
|
||||
{
|
||||
// process BLE and SOC until there is no more events
|
||||
while( (NRF_ERROR_NOT_FOUND != proc_ble()) || (NRF_ERROR_NOT_FOUND != proc_soc()) )
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info)
|
||||
{
|
||||
(void) id;
|
||||
(void) pc;
|
||||
(void) info;
|
||||
}
|
||||
#endif
|
||||
@ -46,9 +46,5 @@ FREERTOS_PORT = ARM_CM0
|
||||
JLINK_DEVICE = stm32f070rb
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -47,9 +47,5 @@ FREERTOS_PORT = ARM_CM0
|
||||
JLINK_DEVICE = stm32f072rb
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -42,12 +42,9 @@ CHIP_FAMILY = stm32_fsdev
|
||||
FREERTOS_PORT = ARM_CM3
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32f303vc
|
||||
JLINK_DEVICE = stm32f103c8
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
# flash target ROM bootloader
|
||||
flash: $(BUILD)/$(BOARD)-firmware.bin
|
||||
dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
|
||||
|
||||
@ -45,9 +45,5 @@ FREERTOS_PORT = ARM_CM3
|
||||
JLINK_DEVICE = stm32f207zg
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -56,7 +56,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 4
|
||||
* APB2 Prescaler = 2
|
||||
* HSE Frequency(Hz) = 8000000
|
||||
* PLL_M = 8
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 240
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 5
|
||||
@ -75,7 +75,7 @@ void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 240;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 5;
|
||||
|
||||
@ -46,9 +46,5 @@ FREERTOS_PORT = ARM_CM4F
|
||||
JLINK_DEVICE = stm32f303vc
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
169
hw/bsp/stm32f401blackpill/STM32F401VCTx_FLASH.ld
Normal file
169
hw/bsp/stm32f401blackpill/STM32F401VCTx_FLASH.ld
Normal file
@ -0,0 +1,169 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F401VCTx Device with
|
||||
** 256KByte FLASH, 64KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
** (c)Copyright Ac6.
|
||||
** You may use this file as-is or modify it according to the needs of your
|
||||
** project. Distribution of this file (unmodified or modified) is not
|
||||
** permitted. Ac6 permit registered System Workbench for MCU users the
|
||||
** rights to distribute the assembled, compiled & linked contents of this
|
||||
** file as part of an application binary file, provided that it is built
|
||||
** using the System Workbench for MCU toolchain.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200;; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400;; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
47
hw/bsp/stm32f401blackpill/board.mk
Normal file
47
hw/bsp/stm32f401blackpill/board.mk
Normal file
@ -0,0 +1,47 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles \
|
||||
-DSTM32F401xC \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_STM32F4
|
||||
|
||||
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
|
||||
ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/$(BOARD)/STM32F401VCTx_FLASH.ld
|
||||
|
||||
SRC_C += \
|
||||
$(ST_CMSIS)/Source/Templates/system_stm32f4xx.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_cortex.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_rcc.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_gpio.c
|
||||
|
||||
SRC_S += \
|
||||
$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/st/st_driver/CMSIS/Include \
|
||||
$(TOP)/$(ST_CMSIS)/Include \
|
||||
$(TOP)/$(ST_HAL_DRIVER)/Inc \
|
||||
$(TOP)/hw/bsp/$(BOARD)
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = st
|
||||
CHIP_FAMILY = synopsys
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32f401cc
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash target ROM bootloader
|
||||
flash: $(BUILD)/$(BOARD)-firmware.bin
|
||||
dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
|
||||
215
hw/bsp/stm32f401blackpill/stm32f401blackpill.c
Normal file
215
hw/bsp/stm32f401blackpill/stm32f401blackpill.c
Normal file
@ -0,0 +1,215 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "../board.h"
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "stm32f4xx_hal_conf.h"
|
||||
|
||||
#define LED_PORT GPIOC
|
||||
#define LED_PIN GPIO_PIN_13
|
||||
#define LED_STATE_ON 1
|
||||
|
||||
#define BUTTON_PORT GPIOA
|
||||
#define BUTTON_PIN GPIO_PIN_0
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
// enable all LED, Button, Uart, USB clock
|
||||
static void all_rcc_clk_enable(void)
|
||||
{
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-, Button
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE(); // LED
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* The system Clock is configured as follow :
|
||||
* System Clock source = PLL (HSE)
|
||||
* SYSCLK(Hz) = 84000000
|
||||
* HCLK(Hz) = 84000000
|
||||
* AHB Prescaler = 1
|
||||
* APB1 Prescaler = 2
|
||||
* APB2 Prescaler = 1
|
||||
* HSE Frequency(Hz) = 25000000
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 4
|
||||
* PLL_Q = 7
|
||||
* VDD(V) = 3.3
|
||||
* Main regulator output voltage = Scale2 mode
|
||||
* Flash Latency(WS) = 2
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable Power Control clock */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||
clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
|
||||
}
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
SystemClock_Config();
|
||||
SystemCoreClockUpdate();
|
||||
all_rcc_clk_enable();
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
// LED
|
||||
GPIO_InitStruct.Pin = LED_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
|
||||
|
||||
board_led_write(false);
|
||||
|
||||
// Button
|
||||
GPIO_InitStruct.Pin = BUTTON_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||
HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
|
||||
|
||||
/* Configure USB FS GPIOs */
|
||||
/* Configure USB D+ D- Pins */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* Configure VBUS Pin */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* This for ID line debug */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
// Enable USB OTG clock
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
|
||||
// Blackpill doens't use VBUS sense (B device)
|
||||
// explicitly disable it
|
||||
USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
|
||||
USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
|
||||
USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
void HardFault_Handler (void)
|
||||
{
|
||||
asm("bkpt");
|
||||
}
|
||||
|
||||
// Required by __libc_init_array in startup code if we are compiling using
|
||||
// -nostdlib/-nostartfiles.
|
||||
void _init(void)
|
||||
{
|
||||
|
||||
}
|
||||
394
hw/bsp/stm32f401blackpill/stm32f4xx_hal_conf.h
Normal file
394
hw/bsp/stm32f401blackpill/stm32f4xx_hal_conf.h
Normal file
@ -0,0 +1,394 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file GPIO/GPIO_EXTI/Inc/stm32f4xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_H
|
||||
#define __STM32F4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
// #define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
// #define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_TIM_MODULE_ENABLED */
|
||||
/* #define HAL_UART_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE (32000U)
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE (32768U) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT (5000U) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE (3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 1U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -42,9 +42,5 @@ FREERTOS_PORT = ARM_CM4F
|
||||
JLINK_DEVICE = stm32f407vg
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -55,7 +55,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 4
|
||||
* APB2 Prescaler = 2
|
||||
* HSE Frequency(Hz) = 8000000
|
||||
* PLL_M = 8
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 7
|
||||
@ -83,7 +83,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
169
hw/bsp/stm32f411blackpill/STM32F411CEUx_FLASH.ld
Normal file
169
hw/bsp/stm32f411blackpill/STM32F411CEUx_FLASH.ld
Normal file
@ -0,0 +1,169 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F411CEUx Device with
|
||||
** 512KByte FLASH, 128KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
** (c)Copyright Ac6.
|
||||
** You may use this file as-is or modify it according to the needs of your
|
||||
** project. Distribution of this file (unmodified or modified) is not
|
||||
** permitted. Ac6 permit registered System Workbench for MCU users the
|
||||
** rights to distribute the assembled, compiled & linked contents of this
|
||||
** file as part of an application binary file, provided that it is built
|
||||
** using the System Workbench for MCU toolchain.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20020000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200;; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400;; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
47
hw/bsp/stm32f411blackpill/board.mk
Normal file
47
hw/bsp/stm32f411blackpill/board.mk
Normal file
@ -0,0 +1,47 @@
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-nostdlib -nostartfiles \
|
||||
-DSTM32F411xE \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_STM32F4
|
||||
|
||||
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
|
||||
ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/bsp/$(BOARD)/STM32F411CEUx_FLASH.ld
|
||||
|
||||
SRC_C += \
|
||||
$(ST_CMSIS)/Source/Templates/system_stm32f4xx.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_cortex.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_rcc.c \
|
||||
$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_gpio.c
|
||||
|
||||
SRC_S += \
|
||||
$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/mcu/st/st_driver/CMSIS/Include \
|
||||
$(TOP)/$(ST_CMSIS)/Include \
|
||||
$(TOP)/$(ST_HAL_DRIVER)/Inc \
|
||||
$(TOP)/hw/bsp/$(BOARD)
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = st
|
||||
CHIP_FAMILY = synopsys
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32f411ce
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash target ROM bootloader
|
||||
flash: $(BUILD)/$(BOARD)-firmware.bin
|
||||
dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
|
||||
215
hw/bsp/stm32f411blackpill/stm32f411blackpill.c
Normal file
215
hw/bsp/stm32f411blackpill/stm32f411blackpill.c
Normal file
@ -0,0 +1,215 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "../board.h"
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "stm32f4xx_hal_conf.h"
|
||||
|
||||
#define LED_PORT GPIOC
|
||||
#define LED_PIN GPIO_PIN_13
|
||||
#define LED_STATE_ON 1
|
||||
|
||||
#define BUTTON_PORT GPIOA
|
||||
#define BUTTON_PIN GPIO_PIN_0
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
// enable all LED, Button, Uart, USB clock
|
||||
static void all_rcc_clk_enable(void)
|
||||
{
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-, Button
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE(); // LED
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* The system Clock is configured as follow :
|
||||
* System Clock source = PLL (HSE)
|
||||
* SYSCLK(Hz) = 84000000
|
||||
* HCLK(Hz) = 84000000
|
||||
* AHB Prescaler = 1
|
||||
* APB1 Prescaler = 2
|
||||
* APB2 Prescaler = 1
|
||||
* HSE Frequency(Hz) = 25000000
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 4
|
||||
* PLL_Q = 7
|
||||
* VDD(V) = 3.3
|
||||
* Main regulator output voltage = Scale2 mode
|
||||
* Flash Latency(WS) = 2
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable Power Control clock */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||
clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
|
||||
}
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
SystemClock_Config();
|
||||
SystemCoreClockUpdate();
|
||||
all_rcc_clk_enable();
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
// LED
|
||||
GPIO_InitStruct.Pin = LED_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
|
||||
|
||||
board_led_write(false);
|
||||
|
||||
// Button
|
||||
GPIO_InitStruct.Pin = BUTTON_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||
HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
|
||||
|
||||
/* Configure USB FS GPIOs */
|
||||
/* Configure USB D+ D- Pins */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* Configure VBUS Pin */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* This for ID line debug */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
// Enable USB OTG clock
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
|
||||
// Blackpill doens't use VBUS sense (B device)
|
||||
// explicitly disable it
|
||||
USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
|
||||
USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
|
||||
USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
void HardFault_Handler (void)
|
||||
{
|
||||
asm("bkpt");
|
||||
}
|
||||
|
||||
// Required by __libc_init_array in startup code if we are compiling using
|
||||
// -nostdlib/-nostartfiles.
|
||||
void _init(void)
|
||||
{
|
||||
|
||||
}
|
||||
394
hw/bsp/stm32f411blackpill/stm32f4xx_hal_conf.h
Normal file
394
hw/bsp/stm32f411blackpill/stm32f4xx_hal_conf.h
Normal file
@ -0,0 +1,394 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file GPIO/GPIO_EXTI/Inc/stm32f4xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_H
|
||||
#define __STM32F4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
// #define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
// #define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_TIM_MODULE_ENABLED */
|
||||
/* #define HAL_UART_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE (32000U)
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE (32768U) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT (5000U) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE (3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 1U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -39,12 +39,8 @@ CHIP_FAMILY = synopsys
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32f41ve
|
||||
JLINK_DEVICE = stm32f411ve
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -54,7 +54,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 2
|
||||
* APB2 Prescaler = 1
|
||||
* HSE Frequency(Hz) = 8000000
|
||||
* PLL_M = 8
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 336
|
||||
* PLL_P = 4
|
||||
* PLL_Q = 7
|
||||
@ -82,7 +82,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
@ -46,9 +46,5 @@ FREERTOS_PORT = ARM_CM4F
|
||||
JLINK_DEVICE = stm32f41zx
|
||||
JLINK_IF = swd
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -56,7 +56,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 2
|
||||
* APB2 Prescaler = 1
|
||||
* HSE Frequency(Hz) = 8000000
|
||||
* PLL_M = 8
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 200
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 7
|
||||
@ -91,7 +91,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 200;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
@ -41,9 +41,5 @@ INC += \
|
||||
VENDOR = st
|
||||
CHIP_FAMILY = synopsys
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -66,7 +66,7 @@ static void all_rcc_clk_enable(void)
|
||||
* APB1 Prescaler = 4
|
||||
* APB2 Prescaler = 2
|
||||
* HSE Frequency(Hz) = 8000000
|
||||
* PLL_M = 8
|
||||
* PLL_M = HSE_VALUE/1000000
|
||||
* PLL_N = 432
|
||||
* PLL_P = 2
|
||||
* PLL_Q = 9
|
||||
@ -99,7 +99,7 @@ void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
|
||||
@ -40,9 +40,5 @@ INC += \
|
||||
VENDOR = st
|
||||
CHIP_FAMILY = synopsys
|
||||
|
||||
# Path to STM32 Cube Programmer CLI, should be added into system path
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
flash: flash-stlink
|
||||
|
||||
@ -94,7 +94,7 @@ static void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
|
||||
36
hw/bsp/teensy_40/board.h
Normal file
36
hw/bsp/teensy_40/board.h
Normal file
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
|
||||
// required since iMX RT10xx SDK include this file for board size
|
||||
#define BOARD_FLASH_SIZE (2 * 1024 * 1024)
|
||||
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
54
hw/bsp/teensy_40/board.mk
Normal file
54
hw/bsp/teensy_40/board.mk
Normal file
@ -0,0 +1,54 @@
|
||||
CFLAGS += \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m7 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv5-d16 \
|
||||
-D__ARMVFP__=0 -D__ARMFPV5__=0\
|
||||
-DCPU_MIMXRT1062DVL6A \
|
||||
-DXIP_EXTERNAL_FLASH=1 \
|
||||
-DXIP_BOOT_HEADER_ENABLE=1 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX
|
||||
|
||||
# mcu driver cause following warnings
|
||||
#CFLAGS += -Wno-error=float-equal -Wno-error=nested-externs
|
||||
CFLAGS += -Wno-error=unused-parameter
|
||||
|
||||
MCU_DIR = hw/mcu/nxp/sdk/devices/MIMXRT1062
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(MCU_DIR)/gcc/MIMXRT1062xxxxx_flexspi_nor.ld
|
||||
|
||||
SRC_C += \
|
||||
$(MCU_DIR)/system_MIMXRT1062.c \
|
||||
$(MCU_DIR)/xip/fsl_flexspi_nor_boot.c \
|
||||
$(MCU_DIR)/project_template/clock_config.c \
|
||||
$(MCU_DIR)/drivers/fsl_clock.c \
|
||||
$(MCU_DIR)/drivers/fsl_gpio.c \
|
||||
$(MCU_DIR)/drivers/fsl_common.c \
|
||||
$(MCU_DIR)/drivers/fsl_lpuart.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/hw/bsp/$(BOARD) \
|
||||
$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
|
||||
$(TOP)/$(MCU_DIR) \
|
||||
$(TOP)/$(MCU_DIR)/drivers \
|
||||
$(TOP)/$(MCU_DIR)/project_template \
|
||||
|
||||
SRC_S += $(MCU_DIR)/gcc/startup_MIMXRT1062.S
|
||||
|
||||
# For TinyUSB port source
|
||||
VENDOR = nxp
|
||||
CHIP_FAMILY = transdimension
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM7
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = MIMXRT1062xxx6A
|
||||
JLINK_IF = swd
|
||||
|
||||
# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
|
||||
# Make sure it is in your PATH
|
||||
flash: $(BUILD)/$(BOARD)-firmware.hex
|
||||
teensy_loader_cli --mcu=imxrt1062 -v -w $<
|
||||
185
hw/bsp/teensy_40/teensy40.c
Normal file
185
hw/bsp/teensy_40/teensy40.c
Normal file
@ -0,0 +1,185 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "../board.h"
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "fsl_iomuxc.h"
|
||||
#include "fsl_clock.h"
|
||||
#include "fsl_lpuart.h"
|
||||
|
||||
#include "clock_config.h"
|
||||
|
||||
#define LED_PINMUX IOMUXC_GPIO_B0_03_GPIO2_IO03 // D13
|
||||
#define LED_PORT GPIO2
|
||||
#define LED_PIN 3
|
||||
#define LED_STATE_ON 0
|
||||
|
||||
// no button
|
||||
#define BUTTON_PINMUX IOMUXC_GPIO_B0_01_GPIO2_IO01 // D12
|
||||
#define BUTTON_PORT GPIO2
|
||||
#define BUTTON_PIN 1
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
// UART
|
||||
#define UART_PORT LPUART6
|
||||
#define UART_RX_PINMUX IOMUXC_GPIO_AD_B0_03_LPUART6_RX // D0
|
||||
#define UART_TX_PINMUX IOMUXC_GPIO_AD_B0_02_LPUART6_TX // D1
|
||||
|
||||
const uint8_t dcd_data[] = { 0x00 };
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
// Init clock
|
||||
BOARD_BootClockRUN();
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
// Enable IOCON clock
|
||||
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
// NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
// LED
|
||||
IOMUXC_SetPinMux( LED_PINMUX, 0U);
|
||||
IOMUXC_SetPinConfig( LED_PINMUX, 0x10B0U);
|
||||
|
||||
gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0, kGPIO_NoIntmode };
|
||||
GPIO_PinInit(LED_PORT, LED_PIN, &led_config);
|
||||
board_led_write(true);
|
||||
|
||||
// Button
|
||||
IOMUXC_SetPinMux( BUTTON_PINMUX, 0U);
|
||||
IOMUXC_SetPinConfig(BUTTON_PINMUX, 0x01B0A0U);
|
||||
gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode };
|
||||
GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config);
|
||||
|
||||
// UART
|
||||
IOMUXC_SetPinMux( UART_TX_PINMUX, 0U);
|
||||
IOMUXC_SetPinMux( UART_RX_PINMUX, 0U);
|
||||
IOMUXC_SetPinConfig( UART_TX_PINMUX, 0x10B0u);
|
||||
IOMUXC_SetPinConfig( UART_RX_PINMUX, 0x10B0u);
|
||||
|
||||
lpuart_config_t uart_config;
|
||||
LPUART_GetDefaultConfig(&uart_config);
|
||||
uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
|
||||
uart_config.enableTx = true;
|
||||
uart_config.enableRx = true;
|
||||
LPUART_Init(UART_PORT, &uart_config, (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U));
|
||||
|
||||
//------------- USB0 -------------//
|
||||
// Clock
|
||||
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
|
||||
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
|
||||
|
||||
USBPHY_Type* usb_phy = USBPHY1;
|
||||
|
||||
// Enable PHY support for Low speed device + LS via FS Hub
|
||||
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
|
||||
|
||||
// Enable all power for normal operation
|
||||
usb_phy->PWD = 0;
|
||||
|
||||
// TX Timing
|
||||
uint32_t phytx = usb_phy->TX;
|
||||
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
|
||||
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
|
||||
usb_phy->TX = phytx;
|
||||
|
||||
// USB1
|
||||
// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
|
||||
// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// USB Interrupt Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB_OTG1_IRQHandler(void)
|
||||
{
|
||||
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
|
||||
tuh_isr(0);
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
|
||||
tud_isr(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void USB_OTG2_IRQHandler(void)
|
||||
{
|
||||
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST
|
||||
tuh_isr(1);
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE
|
||||
tud_isr(1);
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
GPIO_PinWrite(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
// active low
|
||||
return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
LPUART_ReadBlocking(UART_PORT, buf, len);
|
||||
return len;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
LPUART_WriteBlocking(UART_PORT, (uint8_t*)buf, len);
|
||||
return len;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
49
hw/bsp/teensy_40/teensy40_flexspi_nor_config.c
Normal file
49
hw/bsp/teensy_40/teensy40_flexspi_nor_config.c
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Copyright 2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "teensy40_flexspi_nor_config.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.xip_board"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.conf")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location = ".boot_hdr.conf"
|
||||
#endif
|
||||
|
||||
const flexspi_nor_config_t qspiflash_config = {
|
||||
.memConfig =
|
||||
{
|
||||
.tag = FLEXSPI_CFG_BLK_TAG,
|
||||
.version = FLEXSPI_CFG_BLK_VERSION,
|
||||
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
|
||||
.csHoldTime = 3u,
|
||||
.csSetupTime = 3u,
|
||||
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
|
||||
.sflashPadType = kSerialFlash_4Pads,
|
||||
.serialClkFreq = kFlexSpiSerialClk_100MHz,
|
||||
.sflashA1Size = 2u * 1024u * 1024u,
|
||||
.lookupTable =
|
||||
{
|
||||
// Read LUTs
|
||||
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
|
||||
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
|
||||
},
|
||||
},
|
||||
.pageSize = 256u,
|
||||
.sectorSize = 4u * 1024u,
|
||||
.blockSize = 256u * 1024u,
|
||||
.isUniformBlockSize = false,
|
||||
};
|
||||
#endif /* XIP_BOOT_HEADER_ENABLE */
|
||||
268
hw/bsp/teensy_40/teensy40_flexspi_nor_config.h
Normal file
268
hw/bsp/teensy_40/teensy40_flexspi_nor_config.h
Normal file
@ -0,0 +1,268 @@
|
||||
/*
|
||||
* Copyright 2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __TEENSY40_FLEXSPI_NOR_CONFIG__
|
||||
#define __TEENSY40_FLEXSPI_NOR_CONFIG__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief XIP_BOARD driver version 2.0.0. */
|
||||
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
|
||||
/*@}*/
|
||||
|
||||
/* FLEXSPI memory config block related defintions */
|
||||
#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
|
||||
#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
|
||||
#define FLEXSPI_CFG_BLK_SIZE (512)
|
||||
|
||||
/* FLEXSPI Feature related definitions */
|
||||
#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
|
||||
|
||||
/* Lookup table related defintions */
|
||||
#define CMD_INDEX_READ 0
|
||||
#define CMD_INDEX_READSTATUS 1
|
||||
#define CMD_INDEX_WRITEENABLE 2
|
||||
#define CMD_INDEX_WRITE 4
|
||||
|
||||
#define CMD_LUT_SEQ_IDX_READ 0
|
||||
#define CMD_LUT_SEQ_IDX_READSTATUS 1
|
||||
#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
|
||||
#define CMD_LUT_SEQ_IDX_WRITE 9
|
||||
|
||||
#define CMD_SDR 0x01
|
||||
#define CMD_DDR 0x21
|
||||
#define RADDR_SDR 0x02
|
||||
#define RADDR_DDR 0x22
|
||||
#define CADDR_SDR 0x03
|
||||
#define CADDR_DDR 0x23
|
||||
#define MODE1_SDR 0x04
|
||||
#define MODE1_DDR 0x24
|
||||
#define MODE2_SDR 0x05
|
||||
#define MODE2_DDR 0x25
|
||||
#define MODE4_SDR 0x06
|
||||
#define MODE4_DDR 0x26
|
||||
#define MODE8_SDR 0x07
|
||||
#define MODE8_DDR 0x27
|
||||
#define WRITE_SDR 0x08
|
||||
#define WRITE_DDR 0x28
|
||||
#define READ_SDR 0x09
|
||||
#define READ_DDR 0x29
|
||||
#define LEARN_SDR 0x0A
|
||||
#define LEARN_DDR 0x2A
|
||||
#define DATSZ_SDR 0x0B
|
||||
#define DATSZ_DDR 0x2B
|
||||
#define DUMMY_SDR 0x0C
|
||||
#define DUMMY_DDR 0x2C
|
||||
#define DUMMY_RWDS_SDR 0x0D
|
||||
#define DUMMY_RWDS_DDR 0x2D
|
||||
#define JMP_ON_CS 0x1F
|
||||
#define STOP 0
|
||||
|
||||
#define FLEXSPI_1PAD 0
|
||||
#define FLEXSPI_2PAD 1
|
||||
#define FLEXSPI_4PAD 2
|
||||
#define FLEXSPI_8PAD 3
|
||||
|
||||
#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
|
||||
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
|
||||
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
|
||||
|
||||
//!@brief Definitions for FlexSPI Serial Clock Frequency
|
||||
typedef enum _FlexSpiSerialClockFreq
|
||||
{
|
||||
kFlexSpiSerialClk_30MHz = 1,
|
||||
kFlexSpiSerialClk_50MHz = 2,
|
||||
kFlexSpiSerialClk_60MHz = 3,
|
||||
kFlexSpiSerialClk_75MHz = 4,
|
||||
kFlexSpiSerialClk_80MHz = 5,
|
||||
kFlexSpiSerialClk_100MHz = 6,
|
||||
kFlexSpiSerialClk_120MHz = 7,
|
||||
kFlexSpiSerialClk_133MHz = 8,
|
||||
kFlexSpiSerialClk_166MHz = 9,
|
||||
} flexspi_serial_clk_freq_t;
|
||||
|
||||
//!@brief FlexSPI clock configuration type
|
||||
enum
|
||||
{
|
||||
kFlexSpiClk_SDR, //!< Clock configure for SDR mode
|
||||
kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Read Sample Clock Source definition
|
||||
typedef enum _FlashReadSampleClkSource
|
||||
{
|
||||
kFlexSPIReadSampleClk_LoopbackInternally = 0,
|
||||
kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1,
|
||||
kFlexSPIReadSampleClk_LoopbackFromSckPad = 2,
|
||||
kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
|
||||
} flexspi_read_sample_clk_t;
|
||||
|
||||
//!@brief Misc feature bit definitions
|
||||
enum
|
||||
{
|
||||
kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable
|
||||
kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable
|
||||
kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable
|
||||
kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable
|
||||
kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable
|
||||
kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
|
||||
kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication.
|
||||
};
|
||||
|
||||
//!@brief Flash Type Definition
|
||||
enum
|
||||
{
|
||||
kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR
|
||||
kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND
|
||||
kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH
|
||||
kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
|
||||
kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs
|
||||
};
|
||||
|
||||
//!@brief Flash Pad Definitions
|
||||
enum
|
||||
{
|
||||
kSerialFlash_1Pad = 1,
|
||||
kSerialFlash_2Pads = 2,
|
||||
kSerialFlash_4Pads = 4,
|
||||
kSerialFlash_8Pads = 8,
|
||||
};
|
||||
|
||||
//!@brief FlexSPI LUT Sequence structure
|
||||
typedef struct _lut_sequence
|
||||
{
|
||||
uint8_t seqNum; //!< Sequence Number, valid number: 1-16
|
||||
uint8_t seqId; //!< Sequence Index, valid number: 0-15
|
||||
uint16_t reserved;
|
||||
} flexspi_lut_seq_t;
|
||||
|
||||
//!@brief Flash Configuration Command Type
|
||||
enum
|
||||
{
|
||||
kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc
|
||||
kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
|
||||
kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode
|
||||
kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode
|
||||
kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode
|
||||
kDeviceConfigCmdType_Reset, //!< Reset device command
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Memory Configuration Block
|
||||
typedef struct _FlexSPIConfig
|
||||
{
|
||||
uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL
|
||||
uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
|
||||
uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use
|
||||
uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
|
||||
uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3
|
||||
uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3
|
||||
uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
|
||||
//! Serial NAND, need to refer to datasheet
|
||||
uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
|
||||
uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
|
||||
//! Generic configuration, etc.
|
||||
uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
|
||||
//! DPI/QPI/OPI switch or reset command
|
||||
flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
|
||||
//! sequence number, [31:16] Reserved
|
||||
uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration
|
||||
uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
|
||||
uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
|
||||
flexspi_lut_seq_t
|
||||
configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
|
||||
uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use
|
||||
uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
|
||||
uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use
|
||||
uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
|
||||
//! details
|
||||
uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details
|
||||
uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
|
||||
uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
|
||||
//! Chapter for more details
|
||||
uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
|
||||
//! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
|
||||
uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use
|
||||
uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1
|
||||
uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2
|
||||
uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1
|
||||
uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2
|
||||
uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value
|
||||
uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
|
||||
uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
|
||||
uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value
|
||||
uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command
|
||||
uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands
|
||||
uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
|
||||
uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31
|
||||
uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
|
||||
//! busy flag is 0 when flash device is busy
|
||||
uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences
|
||||
flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
|
||||
uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use
|
||||
} flexspi_mem_config_t;
|
||||
|
||||
/* */
|
||||
#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0
|
||||
#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1
|
||||
#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
|
||||
#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3
|
||||
#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4
|
||||
#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5
|
||||
#define NOR_CMD_INDEX_DUMMY 6 //!< 6
|
||||
#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7
|
||||
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
|
||||
CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
|
||||
2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
|
||||
CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
|
||||
4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
|
||||
CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
|
||||
14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
|
||||
15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
|
||||
|
||||
/*
|
||||
* Serial NOR configuration block
|
||||
*/
|
||||
typedef struct _flexspi_nor_config
|
||||
{
|
||||
flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
|
||||
uint32_t pageSize; //!< Page size of Serial NOR
|
||||
uint32_t sectorSize; //!< Sector size of Serial NOR
|
||||
uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command
|
||||
uint8_t isUniformBlockSize; //!< Sector/Block size is the same
|
||||
uint8_t reserved0[2]; //!< Reserved for future use
|
||||
uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3
|
||||
uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command
|
||||
uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false
|
||||
uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution
|
||||
uint32_t blockSize; //!< Block size
|
||||
uint32_t reserve2[11]; //!< Reserved for future use
|
||||
} flexspi_nor_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* __EVKMIMXRT1060_FLEXSPI_NOR_CONFIG__ */
|
||||
1
hw/mcu/nuvoton
Submodule
1
hw/mcu/nuvoton
Submodule
@ -0,0 +1 @@
|
||||
Subproject commit dc96fff794d14818c93ea1d4d760d51a014d70c5
|
||||
@ -294,9 +294,16 @@ bool cdcd_control_complete(uint8_t rhport, tusb_control_request_t const * reques
|
||||
//------------- Class Specific Request -------------//
|
||||
TU_VERIFY (request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS);
|
||||
|
||||
// TODO Support multiple interfaces
|
||||
uint8_t const itf = 0;
|
||||
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
cdcd_interface_t* p_cdc = _cdcd_itf;
|
||||
|
||||
// Identify which interface to use
|
||||
for ( ; ; itf++, p_cdc++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_cdcd_itf)) return false;
|
||||
|
||||
if ( p_cdc->itf_num == request->wIndex ) break;
|
||||
}
|
||||
|
||||
// Invoke callback
|
||||
if ( CDC_REQUEST_SET_LINE_CODING == request->bRequest )
|
||||
@ -314,9 +321,16 @@ bool cdcd_control_request(uint8_t rhport, tusb_control_request_t const * request
|
||||
// Handle class request only
|
||||
TU_VERIFY(request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS);
|
||||
|
||||
// TODO Support multiple interfaces
|
||||
uint8_t const itf = 0;
|
||||
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
cdcd_interface_t* p_cdc = _cdcd_itf;
|
||||
|
||||
// Identify which interface to use
|
||||
for ( ; ; itf++, p_cdc++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_cdcd_itf)) return false;
|
||||
|
||||
if ( p_cdc->itf_num == request->wIndex ) break;
|
||||
}
|
||||
|
||||
switch ( request->bRequest )
|
||||
{
|
||||
@ -353,9 +367,16 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
|
||||
(void) rhport;
|
||||
(void) result;
|
||||
|
||||
// TODO Support multiple interfaces
|
||||
uint8_t const itf = 0;
|
||||
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
cdcd_interface_t* p_cdc = _cdcd_itf;
|
||||
|
||||
// Identify which interface to use
|
||||
for ( ; ; itf++, p_cdc++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_cdcd_itf)) return false;
|
||||
|
||||
if ( ( ep_addr == p_cdc->ep_out ) || ( ep_addr == p_cdc->ep_in ) ) break;
|
||||
}
|
||||
|
||||
// Received new data
|
||||
if ( ep_addr == p_cdc->ep_out )
|
||||
|
||||
@ -162,9 +162,18 @@ bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t
|
||||
{
|
||||
uint8_t const *p_desc = (uint8_t const *) desc_itf;
|
||||
|
||||
// TODO support multiple HID interface
|
||||
uint8_t const itf = 0;
|
||||
hidd_interface_t * p_hid = &_hidd_itf[itf];
|
||||
// Find available interface
|
||||
hidd_interface_t * p_hid = NULL;
|
||||
uint8_t hid_id;
|
||||
for(hid_id=0; hid_id<CFG_TUD_HID; hid_id++)
|
||||
{
|
||||
if ( _hidd_itf[hid_id].ep_in == 0 )
|
||||
{
|
||||
p_hid = &_hidd_itf[hid_id];
|
||||
break;
|
||||
}
|
||||
}
|
||||
TU_ASSERT(p_hid);
|
||||
|
||||
//------------- HID descriptor -------------//
|
||||
p_desc = tu_desc_next(p_desc);
|
||||
@ -309,9 +318,15 @@ bool hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
|
||||
{
|
||||
(void) result;
|
||||
|
||||
// TODO support multiple HID interface
|
||||
uint8_t const itf = 0;
|
||||
hidd_interface_t * p_hid = &_hidd_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
hidd_interface_t * p_hid = _hidd_itf;
|
||||
|
||||
for ( ; ; itf++, p_hid++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_hidd_itf)) return false;
|
||||
|
||||
if ( ep_addr == p_hid->ep_out ) break;
|
||||
}
|
||||
|
||||
if (ep_addr == p_hid->ep_out)
|
||||
{
|
||||
|
||||
@ -332,9 +332,15 @@ bool midid_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32
|
||||
{
|
||||
(void) result;
|
||||
|
||||
// TODO Support multiple interfaces
|
||||
uint8_t const itf = 0;
|
||||
midid_interface_t* p_midi = &_midid_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
midid_interface_t* p_midi = _midid_itf;
|
||||
|
||||
for ( ; ; itf++, p_midi++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_midid_itf)) return false;
|
||||
|
||||
if ( ep_addr == p_midi->ep_out ) break;
|
||||
}
|
||||
|
||||
// receive new data
|
||||
if ( ep_addr == p_midi->ep_out )
|
||||
@ -349,7 +355,7 @@ bool midid_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32
|
||||
|
||||
// nothing to do with in and notif endpoint
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
return true;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
12
src/class/vendor/vendor_device.c
vendored
12
src/class/vendor/vendor_device.c
vendored
@ -197,9 +197,15 @@ bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
|
||||
(void) rhport;
|
||||
(void) result;
|
||||
|
||||
// TODO Support multiple interfaces
|
||||
uint8_t const itf = 0;
|
||||
vendord_interface_t* p_itf = &_vendord_itf[itf];
|
||||
uint8_t itf = 0;
|
||||
vendord_interface_t* p_itf = _vendord_itf;
|
||||
|
||||
for ( ; ; itf++, p_itf++)
|
||||
{
|
||||
if (itf >= TU_ARRAY_SIZE(_vendord_itf)) return false;
|
||||
|
||||
if ( ( ep_addr == p_itf->ep_out ) || ( ep_addr == p_itf->ep_in ) ) break;
|
||||
}
|
||||
|
||||
if ( ep_addr == p_itf->ep_out )
|
||||
{
|
||||
|
||||
@ -519,9 +519,11 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
|
||||
uint8_t const cfg_num = (uint8_t) p_request->wValue;
|
||||
|
||||
dcd_set_config(rhport, cfg_num);
|
||||
|
||||
if ( !_usbd_dev.configured && cfg_num ) TU_ASSERT( process_set_config(rhport, cfg_num) );
|
||||
|
||||
_usbd_dev.configured = cfg_num ? 1 : 0;
|
||||
|
||||
if ( cfg_num ) TU_ASSERT( process_set_config(rhport, cfg_num) );
|
||||
tud_control_status(rhport, p_request);
|
||||
}
|
||||
break;
|
||||
|
||||
449
src/portable/nuvoton/nuc121/dcd_nuc121.c
Normal file
449
src/portable/nuvoton/nuc121/dcd_nuc121.c
Normal file
@ -0,0 +1,449 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Peter Lawrence
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/*
|
||||
Theory of operation:
|
||||
|
||||
The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex,
|
||||
so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to
|
||||
implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for
|
||||
EP0_IN and EP0_OUT respectively. This leaves up to six for user usage.
|
||||
*/
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if TUSB_OPT_DEVICE_ENABLED && ( (CFG_TUSB_MCU == OPT_MCU_NUC121) || (CFG_TUSB_MCU == OPT_MCU_NUC126) )
|
||||
|
||||
#include "device/dcd.h"
|
||||
#include "NuMicro.h"
|
||||
|
||||
/* allocation of USBD RAM for Setup, EP0_IN, and and EP_OUT */
|
||||
#define PERIPH_SETUP_BUF_BASE 0
|
||||
#define PERIPH_SETUP_BUF_LEN 8
|
||||
#define PERIPH_EP0_BUF_BASE (PERIPH_SETUP_BUF_BASE + PERIPH_SETUP_BUF_LEN)
|
||||
#define PERIPH_EP0_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
|
||||
#define PERIPH_EP1_BUF_BASE (PERIPH_EP0_BUF_BASE + PERIPH_EP0_BUF_LEN)
|
||||
#define PERIPH_EP1_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
|
||||
#define PERIPH_EP2_BUF_BASE (PERIPH_EP1_BUF_BASE + PERIPH_EP1_BUF_LEN)
|
||||
|
||||
/* rather important info unfortunately not provided by device include files: how much there is */
|
||||
#define USBD_BUF_SIZE ((CFG_TUSB_MCU == OPT_MCU_NUC121) ? 768 : 512)
|
||||
|
||||
enum ep_enum
|
||||
{
|
||||
PERIPH_EP0 = 0,
|
||||
PERIPH_EP1 = 1,
|
||||
PERIPH_EP2 = 2,
|
||||
PERIPH_EP3 = 3,
|
||||
PERIPH_EP4 = 4,
|
||||
PERIPH_EP5 = 5,
|
||||
PERIPH_EP6 = 6,
|
||||
PERIPH_EP7 = 7,
|
||||
PERIPH_MAX_EP,
|
||||
};
|
||||
|
||||
/* set by dcd_set_address() */
|
||||
static volatile uint8_t assigned_address;
|
||||
|
||||
/* reset by dcd_init(), this is used by dcd_edpt_open() to assign USBD peripheral buffer addresses */
|
||||
static uint32_t bufseg_addr;
|
||||
|
||||
/* used by dcd_edpt_xfer() and the ISR to reset the data sync (DATA0/DATA1) in an EP0_IN transfer */
|
||||
static bool active_ep0_xfer;
|
||||
|
||||
/* RAM table needed to track ongoing transfers performed by dcd_edpt_xfer(), dcd_in_xfer(), and the ISR */
|
||||
static struct xfer_ctl_t
|
||||
{
|
||||
uint8_t *data_ptr; /* data_ptr tracks where to next copy data to (for OUT) or from (for IN) */
|
||||
union {
|
||||
uint16_t in_remaining_bytes; /* for IN endpoints, we track how many bytes are left to transfer */
|
||||
uint16_t out_bytes_so_far; /* but for OUT endpoints, we track how many bytes we've transferred so far */
|
||||
};
|
||||
uint16_t max_packet_size; /* needed since device driver only finds out this at runtime */
|
||||
uint16_t total_bytes; /* quantity needed to pass as argument to dcd_event_xfer_complete() (for IN endpoints) */
|
||||
} xfer_table[PERIPH_MAX_EP];
|
||||
|
||||
/*
|
||||
local helper functions
|
||||
*/
|
||||
|
||||
static void usb_attach(void)
|
||||
{
|
||||
USBD->SE0 &= ~USBD_SE0_SE0_Msk;
|
||||
}
|
||||
|
||||
static void usb_detach(void)
|
||||
{
|
||||
USBD->SE0 |= USBD_SE0_SE0_Msk;
|
||||
}
|
||||
|
||||
static void usb_control_send_zlp(void)
|
||||
{
|
||||
USBD->EP[PERIPH_EP0].CFG |= USBD_CFG_DSQSYNC_Msk;
|
||||
USBD->EP[PERIPH_EP0].MXPLD = 0;
|
||||
}
|
||||
|
||||
/* reconstruct ep_addr from particular USB Configuration Register */
|
||||
static uint8_t decode_ep_addr(USBD_EP_T *ep)
|
||||
{
|
||||
uint8_t ep_addr = ep->CFG & USBD_CFG_EPNUM_Msk;
|
||||
if ( USBD_CFG_EPMODE_IN == (ep->CFG & USBD_CFG_STATE_Msk) )
|
||||
ep_addr |= TUSB_DIR_IN_MASK;
|
||||
return ep_addr;
|
||||
}
|
||||
|
||||
/* map 8-bit ep_addr into peripheral endpoint index (PERIPH_EP0...) */
|
||||
static USBD_EP_T *ep_entry(uint8_t ep_addr, bool add)
|
||||
{
|
||||
USBD_EP_T *ep;
|
||||
enum ep_enum ep_index;
|
||||
|
||||
for (ep_index = PERIPH_EP0, ep = USBD->EP; ep_index < PERIPH_MAX_EP; ep_index++, ep++)
|
||||
{
|
||||
if (add)
|
||||
{
|
||||
/* take first peripheral endpoint that is unused */
|
||||
if (0 == (ep->CFG & USBD_CFG_STATE_Msk)) return ep;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* find a peripheral endpoint that matches ep_addr */
|
||||
uint8_t candidate_ep_addr = decode_ep_addr(ep);
|
||||
if (candidate_ep_addr == ep_addr) return ep;
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* perform an IN endpoint transfer; this is called by dcd_edpt_xfer() and the ISR */
|
||||
static void dcd_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
|
||||
{
|
||||
uint16_t bytes_now = tu_min16(xfer->in_remaining_bytes, xfer->max_packet_size);
|
||||
|
||||
memcpy((uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), xfer->data_ptr, bytes_now);
|
||||
ep->MXPLD = bytes_now;
|
||||
}
|
||||
|
||||
/* called by dcd_init() as well as by the ISR during a USB bus reset */
|
||||
static void bus_reset(void)
|
||||
{
|
||||
USBD->STBUFSEG = PERIPH_SETUP_BUF_BASE;
|
||||
|
||||
for (enum ep_enum ep_index = PERIPH_EP0; ep_index < PERIPH_MAX_EP; ep_index++)
|
||||
{
|
||||
USBD->EP[ep_index].CFG = 0;
|
||||
USBD->EP[ep_index].CFGP = 0;
|
||||
}
|
||||
|
||||
/* allocate the default EP0 endpoints */
|
||||
|
||||
USBD->EP[PERIPH_EP0].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_IN;
|
||||
USBD->EP[PERIPH_EP0].BUFSEG = PERIPH_EP0_BUF_BASE;
|
||||
xfer_table[PERIPH_EP0].max_packet_size = PERIPH_EP0_BUF_LEN;
|
||||
|
||||
USBD->EP[PERIPH_EP1].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_OUT;
|
||||
USBD->EP[PERIPH_EP1].BUFSEG = PERIPH_EP1_BUF_BASE;
|
||||
xfer_table[PERIPH_EP1].max_packet_size = PERIPH_EP1_BUF_LEN;
|
||||
|
||||
/* USB RAM beyond what we've allocated above is available to the user */
|
||||
bufseg_addr = PERIPH_EP2_BUF_BASE;
|
||||
|
||||
/* Reset USB device address */
|
||||
USBD->FADDR = 0;
|
||||
|
||||
/* reset EP0_IN flag */
|
||||
active_ep0_xfer = false;
|
||||
}
|
||||
|
||||
/* centralized location for USBD interrupt enable bit mask */
|
||||
static const uint32_t enabled_irqs = USBD_INTSTS_VBDETIF_Msk | USBD_INTSTS_BUSIF_Msk | USBD_INTSTS_SETUP_Msk | USBD_INTSTS_USBIF_Msk | USBD_INTSTS_SOFIF_Msk;
|
||||
|
||||
/*
|
||||
NUC121/NUC125/NUC126 TinyUSB API driver implementation
|
||||
*/
|
||||
|
||||
void dcd_init(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
#ifdef SUPPORT_LPM
|
||||
USBD->ATTR = 0x7D0 | USBD_LPMACK;
|
||||
#else
|
||||
USBD->ATTR = 0x7D0;
|
||||
#endif
|
||||
|
||||
usb_detach();
|
||||
|
||||
bus_reset();
|
||||
|
||||
usb_attach();
|
||||
|
||||
USBD->INTSTS = enabled_irqs;
|
||||
USBD->INTEN = enabled_irqs;
|
||||
}
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USBD_IRQn);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USBD_IRQn);
|
||||
}
|
||||
|
||||
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
usb_control_send_zlp(); /* SET_ADDRESS is the one exception where TinyUSB doesn't use dcd_edpt_xfer() to generate a ZLP */
|
||||
assigned_address = dev_addr;
|
||||
}
|
||||
|
||||
void dcd_set_config(uint8_t rhport, uint8_t config_num)
|
||||
{
|
||||
(void) rhport;
|
||||
(void) config_num;
|
||||
}
|
||||
|
||||
void dcd_remote_wakeup(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
USBD->ATTR = USBD_ATTR_RWAKEUP_Msk;
|
||||
}
|
||||
|
||||
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
USBD_EP_T *ep = ep_entry(p_endpoint_desc->bEndpointAddress, true);
|
||||
TU_ASSERT(ep);
|
||||
|
||||
/* mine the data for the information we need */
|
||||
int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
|
||||
int const size = p_endpoint_desc->wMaxPacketSize.size;
|
||||
tusb_xfer_type_t const type = p_endpoint_desc->bmAttributes.xfer;
|
||||
struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
|
||||
|
||||
/* allocate buffer from USB RAM */
|
||||
ep->BUFSEG = bufseg_addr;
|
||||
bufseg_addr += size;
|
||||
TU_ASSERT(bufseg_addr <= USBD_BUF_SIZE);
|
||||
|
||||
/* construct USB Configuration Register value and then write it */
|
||||
uint32_t cfg = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
|
||||
cfg |= (TUSB_DIR_IN == dir) ? USBD_CFG_EPMODE_IN : USBD_CFG_EPMODE_OUT;
|
||||
if (TUSB_XFER_ISOCHRONOUS == type)
|
||||
cfg |= USBD_CFG_TYPE_ISO;
|
||||
ep->CFG = cfg;
|
||||
|
||||
/* make a note of the endpoint size */
|
||||
xfer->max_packet_size = size;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
/* mine the data for the information we need */
|
||||
tusb_dir_t dir = tu_edpt_dir(ep_addr);
|
||||
USBD_EP_T *ep = ep_entry(ep_addr, false);
|
||||
struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
|
||||
|
||||
/* store away the information we'll needing now and later */
|
||||
xfer->data_ptr = buffer;
|
||||
xfer->in_remaining_bytes = total_bytes;
|
||||
xfer->total_bytes = total_bytes;
|
||||
|
||||
/* for the first of one or more EP0_IN packets in a message, the first must be DATA1 */
|
||||
if ( (0x80 == ep_addr) && !active_ep0_xfer ) ep->CFG |= USBD_CFG_DSQSYNC_Msk;
|
||||
|
||||
if (TUSB_DIR_IN == dir)
|
||||
{
|
||||
dcd_in_xfer(xfer, ep);
|
||||
}
|
||||
else
|
||||
{
|
||||
xfer->out_bytes_so_far = 0;
|
||||
ep->MXPLD = xfer->max_packet_size;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
USBD_EP_T *ep = ep_entry(ep_addr, false);
|
||||
ep->CFGP |= USBD_CFGP_SSTALL_Msk;
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
USBD_EP_T *ep = ep_entry(ep_addr, false);
|
||||
ep->CFG |= USBD_CFG_CSTALL_Msk;
|
||||
}
|
||||
|
||||
void USBD_IRQHandler(void)
|
||||
{
|
||||
uint32_t status = USBD->INTSTS;
|
||||
#ifdef SUPPORT_LPM
|
||||
uint32_t state = USBD->ATTR & 0x300f;
|
||||
#else
|
||||
uint32_t state = USBD->ATTR & 0xf;
|
||||
#endif
|
||||
|
||||
if(status & USBD_INTSTS_VBDETIF_Msk)
|
||||
{
|
||||
if(USBD->VBUSDET & USBD_VBUSDET_VBUSDET_Msk)
|
||||
{
|
||||
/* USB connect */
|
||||
USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USB disconnect */
|
||||
USBD->ATTR &= ~USBD_ATTR_USBEN_Msk;
|
||||
}
|
||||
}
|
||||
|
||||
if(status & USBD_INTSTS_BUSIF_Msk)
|
||||
{
|
||||
if(state & USBD_ATTR_USBRST_Msk)
|
||||
{
|
||||
/* USB bus reset */
|
||||
USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
|
||||
|
||||
bus_reset();
|
||||
|
||||
dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
|
||||
}
|
||||
|
||||
if(state & USBD_ATTR_SUSPEND_Msk)
|
||||
{
|
||||
/* Enable USB but disable PHY */
|
||||
USBD->ATTR &= ~USBD_ATTR_PHYEN_Msk;
|
||||
dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
|
||||
}
|
||||
|
||||
if(state & USBD_ATTR_RESUME_Msk)
|
||||
{
|
||||
/* Enable USB and enable PHY */
|
||||
USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
|
||||
dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
|
||||
}
|
||||
}
|
||||
|
||||
if(status & USBD_INTSTS_SETUP_Msk)
|
||||
{
|
||||
/* clear the data ready flag of control endpoints */
|
||||
USBD->EP[PERIPH_EP0].CFGP |= USBD_CFGP_CLRRDY_Msk;
|
||||
USBD->EP[PERIPH_EP1].CFGP |= USBD_CFGP_CLRRDY_Msk;
|
||||
|
||||
/* get SETUP packet from USB buffer */
|
||||
dcd_event_setup_received(0, (uint8_t *)USBD_BUF_BASE, true);
|
||||
}
|
||||
|
||||
if(status & USBD_INTSTS_USBIF_Msk)
|
||||
{
|
||||
if (status & USBD_INTSTS_EPEVT0_Msk) /* PERIPH_EP0 (EP0_IN) event: this is treated separately from the rest */
|
||||
{
|
||||
/* given ACK from host has happened, we can now set the address (if not already done) */
|
||||
if((USBD->FADDR != assigned_address) && (USBD->FADDR == 0)) USBD->FADDR = assigned_address;
|
||||
|
||||
uint16_t const available_bytes = USBD->EP[PERIPH_EP0].MXPLD;
|
||||
|
||||
active_ep0_xfer = (available_bytes == xfer_table[PERIPH_EP0].max_packet_size);
|
||||
|
||||
dcd_event_xfer_complete(0, 0x80, available_bytes, XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
|
||||
/* service PERIPH_EP1 through PERIPH_EP7 */
|
||||
enum ep_enum ep_index;
|
||||
uint32_t mask;
|
||||
struct xfer_ctl_t *xfer;
|
||||
USBD_EP_T *ep;
|
||||
for (ep_index = PERIPH_EP1, mask = USBD_INTSTS_EPEVT1_Msk, xfer = &xfer_table[PERIPH_EP1], ep = &USBD->EP[PERIPH_EP1]; ep_index <= PERIPH_EP7; ep_index++, mask <<= 1, xfer++, ep++)
|
||||
{
|
||||
if(status & mask)
|
||||
{
|
||||
USBD->INTSTS = mask;
|
||||
|
||||
uint16_t const available_bytes = ep->MXPLD;
|
||||
uint8_t const ep_addr = decode_ep_addr(ep);
|
||||
bool const out_ep = !(ep_addr & TUSB_DIR_IN_MASK);
|
||||
|
||||
if (out_ep)
|
||||
{
|
||||
/* copy the data from the PC to the previously provided buffer */
|
||||
memcpy(xfer->data_ptr, (uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), available_bytes);
|
||||
xfer->out_bytes_so_far += available_bytes;
|
||||
xfer->data_ptr += available_bytes;
|
||||
|
||||
/* when the transfer is finished, alert TinyUSB; otherwise, accept more data */
|
||||
if ( (xfer->total_bytes == xfer->out_bytes_so_far) || (available_bytes < xfer->max_packet_size) )
|
||||
dcd_event_xfer_complete(0, ep_addr, xfer->out_bytes_so_far, XFER_RESULT_SUCCESS, true);
|
||||
else
|
||||
ep->MXPLD = xfer->max_packet_size;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* update the bookkeeping to reflect the data that has now been sent to the PC */
|
||||
xfer->in_remaining_bytes -= available_bytes;
|
||||
xfer->data_ptr += available_bytes;
|
||||
|
||||
/* if more data to send, send it; otherwise, alert TinyUSB that we've finished */
|
||||
if (xfer->in_remaining_bytes)
|
||||
dcd_in_xfer(xfer, ep);
|
||||
else
|
||||
dcd_event_xfer_complete(0, ep_addr, xfer->total_bytes, XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(status & USBD_INTSTS_SOFIF_Msk)
|
||||
{
|
||||
/* Start-Of-Frame event */
|
||||
dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
|
||||
}
|
||||
|
||||
/* acknowledge all interrupts */
|
||||
USBD->INTSTS = status & enabled_irqs;
|
||||
}
|
||||
|
||||
void dcd_isr(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
USBD_IRQHandler();
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -38,22 +38,15 @@
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
// RT1010 and RT1020 only has 1 USB controller
|
||||
#if FSL_FEATURE_SOC_USBHS_COUNT == 1
|
||||
#define DCD_REGS_BASE { (dcd_registers_t*) USB_BASE }
|
||||
IRQn_Type DCD_IRQn[] = { USB_OTG1_IRQn };
|
||||
|
||||
// RT1050, RT1060 has 2 USB controllers
|
||||
#else
|
||||
#define DCD_REGS_BASE { (dcd_registers_t*) USB1_BASE, (dcd_registers_t*) USB2_BASE }
|
||||
IRQn_Type DCD_IRQn[] = { USB_OTG1_IRQn, USB_OTG2_IRQn };
|
||||
// LPCOpen for 18xx & 43xx
|
||||
#include "chip.h"
|
||||
#endif
|
||||
|
||||
#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1
|
||||
#define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr
|
||||
#else
|
||||
#include "chip.h"
|
||||
#define DCD_REGS_BASE { (dcd_registers_t*) LPC_USB0_BASE, (dcd_registers_t*) LPC_USB1_BASE }
|
||||
IRQn_Type DCD_IRQn[] = { USB0_IRQn, USB1_IRQn };
|
||||
#define CleanInvalidateDCache_by_Addr(_addr, _dsize)
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
@ -130,48 +123,48 @@ enum {
|
||||
typedef struct
|
||||
{
|
||||
//------------- ID + HW Parameter Registers-------------//
|
||||
__I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
|
||||
__I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
|
||||
|
||||
//------------- Capability Registers-------------//
|
||||
__I uint8_t CAPLENGTH; ///< Capability Registers Length
|
||||
__I uint8_t CAPLENGTH; ///< Capability Registers Length
|
||||
__I uint8_t TU_RESERVED[1];
|
||||
__I uint16_t HCIVERSION; ///< Host Controller Interface Version
|
||||
__I uint16_t HCIVERSION; ///< Host Controller Interface Version
|
||||
|
||||
__I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters
|
||||
__I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters
|
||||
__I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters
|
||||
__I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters
|
||||
__I uint32_t TU_RESERVED[5];
|
||||
|
||||
__I uint16_t DCIVERSION; ///< Device Controller Interface Version
|
||||
__I uint16_t DCIVERSION; ///< Device Controller Interface Version
|
||||
__I uint8_t TU_RESERVED[2];
|
||||
|
||||
__I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters
|
||||
__I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters
|
||||
__I uint32_t TU_RESERVED[6];
|
||||
|
||||
//------------- Operational Registers -------------//
|
||||
__IO uint32_t USBCMD; ///< USB Command Register
|
||||
__IO uint32_t USBSTS; ///< USB Status Register
|
||||
__IO uint32_t USBINTR; ///< Interrupt Enable Register
|
||||
__IO uint32_t FRINDEX; ///< USB Frame Index
|
||||
__IO uint32_t USBCMD; ///< USB Command Register
|
||||
__IO uint32_t USBSTS; ///< USB Status Register
|
||||
__IO uint32_t USBINTR; ///< Interrupt Enable Register
|
||||
__IO uint32_t FRINDEX; ///< USB Frame Index
|
||||
__I uint32_t TU_RESERVED;
|
||||
__IO uint32_t DEVICEADDR; ///< Device Address
|
||||
__IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address
|
||||
__IO uint32_t DEVICEADDR; ///< Device Address
|
||||
__IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address
|
||||
__I uint32_t TU_RESERVED;
|
||||
__IO uint32_t BURSTSIZE; ///< Programmable Burst Size
|
||||
__IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning
|
||||
__IO uint32_t BURSTSIZE; ///< Programmable Burst Size
|
||||
__IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning
|
||||
uint32_t TU_RESERVED[4];
|
||||
__IO uint32_t ENDPTNAK; ///< Endpoint NAK
|
||||
__IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable
|
||||
__IO uint32_t ENDPTNAK; ///< Endpoint NAK
|
||||
__IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable
|
||||
__I uint32_t TU_RESERVED;
|
||||
__IO uint32_t PORTSC1; ///< Port Status & Control
|
||||
__IO uint32_t PORTSC1; ///< Port Status & Control
|
||||
__I uint32_t TU_RESERVED[7];
|
||||
__IO uint32_t OTGSC; ///< On-The-Go Status & control
|
||||
__IO uint32_t USBMODE; ///< USB Device Mode
|
||||
__IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status
|
||||
__IO uint32_t ENDPTPRIME; ///< Endpoint Prime
|
||||
__IO uint32_t ENDPTFLUSH; ///< Endpoint Flush
|
||||
__I uint32_t ENDPTSTAT; ///< Endpoint Status
|
||||
__IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete
|
||||
__IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7
|
||||
__IO uint32_t OTGSC; ///< On-The-Go Status & control
|
||||
__IO uint32_t USBMODE; ///< USB Device Mode
|
||||
__IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status
|
||||
__IO uint32_t ENDPTPRIME; ///< Endpoint Prime
|
||||
__IO uint32_t ENDPTFLUSH; ///< Endpoint Flush
|
||||
__I uint32_t ENDPTSTAT; ///< Endpoint Status
|
||||
__IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete
|
||||
__IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7
|
||||
} dcd_registers_t;
|
||||
|
||||
|
||||
@ -218,20 +211,20 @@ typedef struct
|
||||
uint32_t : 0 ;
|
||||
|
||||
// Word 1: Current qTD Pointer
|
||||
volatile uint32_t qtd_addr;
|
||||
volatile uint32_t qtd_addr;
|
||||
|
||||
// Word 2-9: Transfer Overlay
|
||||
volatile dcd_qtd_t qtd_overlay;
|
||||
// Word 2-9: Transfer Overlay
|
||||
volatile dcd_qtd_t qtd_overlay;
|
||||
|
||||
// Word 10-11: Setup request (control OUT only)
|
||||
volatile tusb_control_request_t setup_request;
|
||||
// Word 10-11: Setup request (control OUT only)
|
||||
volatile tusb_control_request_t setup_request;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
/// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes
|
||||
/// thus there are 16 bytes padding free that we can make use of.
|
||||
//--------------------------------------------------------------------+
|
||||
uint8_t reserved[16];
|
||||
} dcd_qhd_t;
|
||||
/// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes
|
||||
/// thus there are 16 bytes padding free that we can make use of.
|
||||
//--------------------------------------------------------------------+
|
||||
uint8_t reserved[16];
|
||||
} dcd_qhd_t;
|
||||
|
||||
TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
|
||||
|
||||
@ -239,17 +232,48 @@ TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
|
||||
// Variables
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#define QHD_MAX 12
|
||||
typedef struct
|
||||
{
|
||||
dcd_registers_t* regs; // registers
|
||||
const IRQn_Type irqnum; // IRQ number
|
||||
const uint8_t ep_count; // Max bi-directional Endpoints
|
||||
}dcd_controller_t;
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
|
||||
// Each endpoint with direction (IN/OUT) occupies a queue head
|
||||
// Therefore QHD_MAX is 2 x max endpoint count
|
||||
#define QHD_MAX (8*2)
|
||||
|
||||
dcd_controller_t _dcd_controller[] =
|
||||
{
|
||||
// RT1010 and RT1020 only has 1 USB controller
|
||||
#if FSL_FEATURE_SOC_USBHS_COUNT == 1
|
||||
{ .regs = (dcd_registers_t*) USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 }
|
||||
#else
|
||||
{ .regs = (dcd_registers_t*) USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 },
|
||||
{ .regs = (dcd_registers_t*) USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 }
|
||||
#endif
|
||||
};
|
||||
|
||||
#else
|
||||
#define QHD_MAX (6*2)
|
||||
|
||||
dcd_controller_t _dcd_controller[] =
|
||||
{
|
||||
{ .regs = (dcd_registers_t*) LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 },
|
||||
{ .regs = (dcd_registers_t*) LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
|
||||
};
|
||||
#endif
|
||||
|
||||
#define QTD_NEXT_INVALID 0x01
|
||||
|
||||
typedef struct {
|
||||
// Must be at 2K alignment
|
||||
dcd_qhd_t qhd[QHD_MAX] TU_ATTR_ALIGNED(64);
|
||||
dcd_qtd_t qtd[QHD_MAX] TU_ATTR_ALIGNED(32);
|
||||
dcd_qtd_t qtd[QHD_MAX] TU_ATTR_ALIGNED(32); // for portability, TinyUSB only queue 1 TD for each Qhd
|
||||
}dcd_data_t;
|
||||
|
||||
static dcd_data_t _dcd_data CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048);
|
||||
static dcd_registers_t* DCD_REGS[] = DCD_REGS_BASE;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROLLER API
|
||||
@ -258,16 +282,14 @@ static dcd_registers_t* DCD_REGS[] = DCD_REGS_BASE;
|
||||
/// follows LPC43xx User Manual 23.10.3
|
||||
static void bus_reset(uint8_t rhport)
|
||||
{
|
||||
dcd_registers_t* dcd_reg = DCD_REGS[rhport];
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
|
||||
// The reset value for all endpoint types is the control endpoint. If one endpoint
|
||||
// direction is enabled and the paired endpoint of opposite direction is disabled, then the
|
||||
// endpoint type of the unused direction must bechanged from the control type to any other
|
||||
// type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
|
||||
// endpoint type of the unused direction must be changed from the control type to any other
|
||||
// type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior
|
||||
// for the data PID tracking on the active endpoint.
|
||||
|
||||
// USB0 has 5 but USB1 only has 3 non-control endpoints
|
||||
for( int i=1; i < (rhport ? 6 : 4); i++)
|
||||
for( int i=1; i < _dcd_controller[rhport].ep_count; i++)
|
||||
{
|
||||
dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
|
||||
}
|
||||
@ -279,9 +301,9 @@ static void bus_reset(uint8_t rhport)
|
||||
dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;
|
||||
dcd_reg->ENDPTCOMPLETE = dcd_reg->ENDPTCOMPLETE;
|
||||
|
||||
while (dcd_reg->ENDPTPRIME);
|
||||
while (dcd_reg->ENDPTPRIME) {}
|
||||
dcd_reg->ENDPTFLUSH = 0xFFFFFFFF;
|
||||
while (dcd_reg->ENDPTFLUSH);
|
||||
while (dcd_reg->ENDPTFLUSH) {}
|
||||
|
||||
// read reset bit in portsc
|
||||
|
||||
@ -289,18 +311,18 @@ static void bus_reset(uint8_t rhport)
|
||||
tu_memclr(&_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
//------------- Set up Control Endpoints (0 OUT, 1 IN) -------------//
|
||||
_dcd_data.qhd[0].zero_length_termination = _dcd_data.qhd[1].zero_length_termination = 1;
|
||||
_dcd_data.qhd[0].max_package_size = _dcd_data.qhd[1].max_package_size = CFG_TUD_ENDPOINT0_SIZE;
|
||||
_dcd_data.qhd[0].qtd_overlay.next = _dcd_data.qhd[1].qtd_overlay.next = QTD_NEXT_INVALID;
|
||||
_dcd_data.qhd[0].zero_length_termination = _dcd_data.qhd[1].zero_length_termination = 1;
|
||||
_dcd_data.qhd[0].max_package_size = _dcd_data.qhd[1].max_package_size = CFG_TUD_ENDPOINT0_SIZE;
|
||||
_dcd_data.qhd[0].qtd_overlay.next = _dcd_data.qhd[1].qtd_overlay.next = QTD_NEXT_INVALID;
|
||||
|
||||
_dcd_data.qhd[0].int_on_setup = 1; // OUT only
|
||||
_dcd_data.qhd[0].int_on_setup = 1; // OUT only
|
||||
}
|
||||
|
||||
void dcd_init(uint8_t rhport)
|
||||
{
|
||||
tu_memclr(&_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
dcd_registers_t* const dcd_reg = DCD_REGS[rhport];
|
||||
dcd_registers_t* const dcd_reg = _dcd_controller[rhport].regs;
|
||||
|
||||
// Reset controller
|
||||
dcd_reg->USBCMD |= USBCMD_RESET;
|
||||
@ -313,9 +335,11 @@ void dcd_init(uint8_t rhport)
|
||||
// TODO Force fullspeed on non-highspeed port
|
||||
// dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
|
||||
|
||||
CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment
|
||||
dcd_reg->USBSTS = dcd_reg->USBSTS;
|
||||
dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_RESET | INTR_SUSPEND | INTR_SOF;
|
||||
dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_RESET | INTR_SUSPEND /*| INTR_SOF*/;
|
||||
|
||||
dcd_reg->USBCMD &= ~0x00FF0000; // Interrupt Threshold Interval = 0
|
||||
dcd_reg->USBCMD |= TU_BIT(0); // connect
|
||||
@ -323,12 +347,12 @@ void dcd_init(uint8_t rhport)
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
NVIC_EnableIRQ(DCD_IRQn[rhport]);
|
||||
NVIC_EnableIRQ(_dcd_controller[rhport].irqnum);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
NVIC_DisableIRQ(DCD_IRQn[rhport]);
|
||||
NVIC_DisableIRQ(_dcd_controller[rhport].irqnum);
|
||||
}
|
||||
|
||||
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
@ -336,7 +360,8 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
// Response with status first before changing device address
|
||||
dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
|
||||
|
||||
DCD_REGS[rhport]->DEVICEADDR = (dev_addr << 25) | TU_BIT(24);
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
dcd_reg->DEVICEADDR = (dev_addr << 25) | TU_BIT(24);
|
||||
}
|
||||
|
||||
void dcd_set_config(uint8_t rhport, uint8_t config_num)
|
||||
@ -386,7 +411,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
DCD_REGS[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0);
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0);
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
@ -395,8 +421,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
// data toggle also need to be reset
|
||||
DCD_REGS[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 );
|
||||
DCD_REGS[rhport]->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir ? 16 : 0));
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 );
|
||||
dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir ? 16 : 0));
|
||||
}
|
||||
|
||||
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
@ -408,8 +435,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const ep_idx = 2*epnum + dir;
|
||||
|
||||
// USB0 has 5, USB1 has 3 non-control endpoints
|
||||
TU_ASSERT( epnum <= (rhport ? 3 : 5) );
|
||||
// Must not exceed max endpoint number
|
||||
TU_ASSERT( epnum < _dcd_controller[rhport].ep_count );
|
||||
|
||||
//------------- Prepare Queue Head -------------//
|
||||
dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx];
|
||||
@ -419,14 +446,18 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
p_qhd->max_package_size = p_endpoint_desc->wMaxPacketSize.size;
|
||||
p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
|
||||
|
||||
CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
// Enable EP Control
|
||||
DCD_REGS[rhport]->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET) << (dir ? 16 : 0);
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
dcd_reg->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET) << (dir ? 16 : 0);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
uint8_t const ep_idx = 2*epnum + dir;
|
||||
@ -435,19 +466,25 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
|
||||
{
|
||||
// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
|
||||
// wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out
|
||||
while(DCD_REGS[rhport]->ENDPTSETUPSTAT & TU_BIT(0)) {}
|
||||
while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {}
|
||||
}
|
||||
|
||||
dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx];
|
||||
dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_idx];
|
||||
|
||||
// Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the
|
||||
// address to 32-byte boundaries.
|
||||
CleanInvalidateDCache_by_Addr((uint32_t*) buffer, total_bytes + 31);
|
||||
|
||||
//------------- Prepare qtd -------------//
|
||||
qtd_init(p_qtd, buffer, total_bytes);
|
||||
p_qtd->int_on_complete = true;
|
||||
p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
|
||||
|
||||
CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
// start transfer
|
||||
DCD_REGS[rhport]->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ;
|
||||
dcd_reg->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ;
|
||||
|
||||
return true;
|
||||
}
|
||||
@ -457,7 +494,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
|
||||
//--------------------------------------------------------------------+
|
||||
void dcd_isr(uint8_t rhport)
|
||||
{
|
||||
dcd_registers_t* const dcd_reg = DCD_REGS[rhport];
|
||||
dcd_registers_t* const dcd_reg = _dcd_controller[rhport].regs;
|
||||
|
||||
uint32_t const int_enable = dcd_reg->USBINTR;
|
||||
uint32_t const int_status = dcd_reg->USBSTS & int_enable;
|
||||
@ -484,6 +521,9 @@ void dcd_isr(uint8_t rhport)
|
||||
}
|
||||
}
|
||||
|
||||
// Make sure we read the latest version of _dcd_data.
|
||||
CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
|
||||
|
||||
// TODO disconnection does not generate interrupt !!!!!!
|
||||
// if (int_status & INTR_PORT_CHANGE)
|
||||
// {
|
||||
|
||||
@ -75,13 +75,13 @@ uint8_t queue_log_offset;
|
||||
#define EP_SIZE 64
|
||||
|
||||
uint16_t volatile rx_buffer_offset[16];
|
||||
uint8_t volatile * rx_buffer[16];
|
||||
uint8_t* volatile rx_buffer[16];
|
||||
uint16_t volatile rx_buffer_max[16];
|
||||
|
||||
volatile uint8_t tx_ep;
|
||||
volatile bool tx_active;
|
||||
volatile uint16_t tx_buffer_offset[16];
|
||||
uint8_t volatile * tx_buffer[16];
|
||||
uint8_t* volatile tx_buffer[16];
|
||||
volatile uint16_t tx_buffer_max[16];
|
||||
volatile uint8_t reset_count;
|
||||
|
||||
|
||||
@ -77,6 +77,9 @@
|
||||
|
||||
#define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx
|
||||
|
||||
#define OPT_MCU_NUC121 800
|
||||
#define OPT_MCU_NUC126 801
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \defgroup group_supported_os Supported RTOS
|
||||
|
||||
@ -4,10 +4,6 @@ import sys
|
||||
import subprocess
|
||||
import time
|
||||
|
||||
travis = False
|
||||
if "TRAVIS" in os.environ and os.environ["TRAVIS"] == "true":
|
||||
travis = True
|
||||
|
||||
success_count = 0
|
||||
fail_count = 0
|
||||
exit_status = 0
|
||||
@ -59,16 +55,10 @@ for example in all_examples:
|
||||
success = "\033[31mfailed\033[0m "
|
||||
fail_count += 1
|
||||
|
||||
if travis:
|
||||
print('travis_fold:start:build-{}-{}\\r'.format(example, board))
|
||||
|
||||
print((build_format + '| {:.2f}s |').format(example, board, success, build_duration))
|
||||
if build_result.returncode != 0:
|
||||
print(build_result.stdout.decode("utf-8"))
|
||||
|
||||
if travis:
|
||||
print('travis_fold:end:build-{}-{}\\r'.format(example, board))
|
||||
|
||||
# FreeRTOS example
|
||||
# example = 'cdc_msc_hid_freertos'
|
||||
# board = 'pca10056'
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user