fix nrfx v3 spim freq when init

fix clang build with nrf

examples/host/cdc_msc_hid/src/msc_app.c

@@ -48,8 +48,8 @@ bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_da
   uint32_t const block_count = tuh_msc_get_block_count(dev_addr, cbw->lun);
   uint32_t const block_size = tuh_msc_get_block_size(dev_addr, cbw->lun);
 
-  printf("Disk Size: %lu MB\r\n", block_count / ((1024*1024)/block_size));
+  printf("Disk Size: %" PRIu32 " MB\r\n", block_count / ((1024*1024)/block_size));
-  printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size);
+  printf("Block Count = %" PRIu32 ", Block Size: %" PRIu32 "\r\n", block_count, block_size);
 
   return true;
 }

hw/bsp/nrf/boards/pca10059/pca10059.ld

@@ -1,7 +1,7 @@
 /* Linker script to configure memory regions. */
 
 SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
+/*GROUP(-lgcc -lc -lnosys) not compatible with clang*/
 
 MEMORY
 {
@@ -11,3 +11,9 @@ MEMORY
 
 
 INCLUDE "nrf_common.ld"
+
+/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
+__tbss_start__ = __tbss_start;
+__tbss_end__ = __tbss_end;
+__sbss_start__ = __sbss_start;
+__sbss_end__ = __sbss_end;

hw/bsp/nrf/boards/pca10095/board.cmake

@@ -1,5 +1,4 @@
 set(MCU_VARIANT nrf5340_application)
-set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
 
 function(update_board TARGET)
   target_sources(${TARGET} PRIVATE

hw/bsp/nrf/boards/pca10100/board.cmake

@@ -1,5 +1,4 @@
 set(MCU_VARIANT nrf52833)
-set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52833_xxaa.ld)
 
 function(update_board TARGET)
 endfunction()

hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake

@@ -1,5 +1,4 @@
 set(MCU_VARIANT nrf52840)
-set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 function(update_board TARGET)
 endfunction()

hw/bsp/nrf/family.c

@@ -356,20 +356,22 @@ static void max3421_init(void) {
       .miso_pin       = MAX3421_MISO_PIN,
   #if NRFX_VER <= 2
       .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
+      .frequency      = NRF_SPIM_FREQ_4M,
   #else
       .ss_pin         = NRF_SPIM_PIN_NOT_CONNECTED,
+      .frequency      = 4000000u,
   #endif
       .ss_active_high = false,
       .irq_priority   = 3,
       .orc            = 0xFF,
       // default setting 4 Mhz, Mode 0, MSB first
-      .frequency      = NRF_SPIM_FREQ_4M,
       .mode           = NRF_SPIM_MODE_0,
       .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST,
+      .miso_pull      = NRF_GPIO_PIN_NOPULL,
   };
 
   // no handler --> blocking
-  nrfx_spim_init(&_spi, &cfg, NULL, NULL);
+  TU_ASSERT(NRFX_SUCCESS == nrfx_spim_init(&_spi, &cfg, NULL, NULL), );
 
   // max3421e interrupt pin
   #if NRFX_VER <= 2

hw/bsp/nrf/family.cmake

@@ -30,8 +30,14 @@ set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    if (MCU_VARIANT STREQUAL "nrf5340_application")
+      set(MCU_VARIANT_XXAA "nrf5340_xxaa_application")
+    else ()
+      set(MCU_VARIANT_XXAA "${MCU_VARIANT}_xxaa")
+    endif ()
+
     if (NOT DEFINED LD_FILE_GNU)
-      set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa.ld)
+      set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_XXAA}.ld)
     endif ()
     set(LD_FILE_Clang ${LD_FILE_GNU})
 
@@ -50,19 +56,13 @@ function(add_board_target BOARD_TARGET)
       ${NRFX_DIR}/soc/nrfx_atomic.c
       ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
+    string(TOUPPER "${MCU_VARIANT_XXAA}" MCU_VARIANT_XXAA_UPPER)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
       __STARTUP_CLEAR_BSS
       CONFIG_GPIO_AS_PINRESET
+      ${MCU_VARIANT_XXAA_UPPER}
       )
 
-    if (MCU_VARIANT STREQUAL "nrf52840")
-      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF52840_XXAA)
-    elseif (MCU_VARIANT STREQUAL "nrf52833")
-      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF52833_XXAA)
-    elseif (MCU_VARIANT STREQUAL "nrf5340_application")
-      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA NRF5340_XXAA_APPLICATION)
-    endif ()
-
     if (TRACE_ETM STREQUAL "1")
       # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace
       target_compile_definitions(${BOARD_TARGET} PUBLIC ENABLE_TRACE)

hw/bsp/nrf/linker/nrf52833_xxaa.ld

@@ -0,0 +1,20 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+/*GROUP(-lgcc -lc -lnosys) not compatible with clang*/
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000
+  CODE_RAM (rwx) : ORIGIN = 0x800000, LENGTH = 0x20000
+}
+
+
+INCLUDE "nrf_common.ld"
+
+/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
+__tbss_start__ = __tbss_start;
+__tbss_end__ = __tbss_end;
+__sbss_start__ = __sbss_start;
+__sbss_end__ = __sbss_end;

hw/bsp/nrf/linker/nrf5340_xxaa_application.ld

@@ -0,0 +1,21 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+/*GROUP(-lgcc -lc) not compatible with clang*/
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000
+  EXTFLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x8000000
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000
+  RAM1 (rwx) : ORIGIN = 0x20040000, LENGTH = 0x3F000
+}
+
+
+INCLUDE "nrf_common.ld"
+
+/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
+__tbss_start__ = __tbss_start;
+__tbss_end__ = __tbss_end;
+__sbss_start__ = __sbss_start;
+__sbss_end__ = __sbss_end;

src/class/cdc/cdc_host.c

@@ -1079,7 +1079,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) {
 
 static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
-  TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\r\n", baudrate, divisor);
+  TU_LOG_DRV("CDC FTDI Set BaudRate = %" PRIu32 ", divisor = 0x%04x\r\n", baudrate, divisor);
 
   p_cdc->user_control_cb = complete_cb;
   p_cdc->requested_line_coding.bit_rate = baudrate;
@@ -1222,7 +1222,7 @@ static bool cp210x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t co
 }
 
 static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\r\n", baudrate);
+  TU_LOG_DRV("CDC CP210x Set BaudRate = %" PRIu32 "\r\n", baudrate);
   uint32_t baud_le = tu_htole32(baudrate);
   p_cdc->user_control_cb = complete_cb;
   return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,

src/host/usbh.c

@@ -704,7 +704,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
   tusb_control_request_t const * request = &_ctrl_xfer.request;
 
   if (XFER_RESULT_SUCCESS != result) {
-    TU_LOG_USBH("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, daddr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
+    TU_LOG_USBH("[%u:%u] Control %s, xferred_bytes = %" PRIu32 "\r\n", rhport, daddr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
     TU_LOG_BUF_USBH(request, 8);
 
     // terminate transfer if any stage failed