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https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants.
This commit is contained in:
Nathan Conrad
parent
2cf2f35fa3
commit
65e72de7ce
@ -6,7 +6,7 @@ CFLAGS += \
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-mcpu=cortex-m0 \
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-mfloat-abi=soft \
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-nostdlib -nostartfiles \
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-DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV
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-DCFG_TUSB_MCU=OPT_MCU_STM32F0x0
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ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver
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ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx
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@ -95,12 +95,6 @@ void board_init(void)
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__HAL_RCC_USB_CLK_ENABLE();
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}
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void dcd_fs_irqHandler(void);
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void USB_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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@ -7,7 +7,7 @@ CFLAGS += \
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-mfloat-abi=hard \
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-mfpu=fpv4-sp-d16 \
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-nostdlib -nostartfiles \
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-DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV
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-DCFG_TUSB_MCU=OPT_MCU_STM32F3x3
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ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F3xx_HAL_Driver
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ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx
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@ -109,31 +109,6 @@ void board_init(void)
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#endif
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}
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// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
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// FIXME: Do all three need to be handled, or just the LP one?
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void dcd_fs_irqHandler(void);
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// USB high-priority interrupt (Channel 19): Triggered only by a correct
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// transfer event for isochronous and double-buffer bulk transfer to reach
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// the highest possible transfer rate.
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void USB_HP_CAN_TX_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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// USB low-priority interrupt (Channel 20): Triggered by all USB events
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// (Correct transfer, USB reset, etc.). The firmware has to check the
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// interrupt source before serving the interrupt.
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void USB_LP_CAN_RX0_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
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// Suspend mode.
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void USBWakeUp_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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@ -103,7 +103,18 @@
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#include "tusb_option.h"
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#if (TUSB_OPT_DEVICE_ENABLED) && ((CFG_TUSB_MCU) == (OPT_MCU_STM32_FSDEV))
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#if (TUSB_OPT_DEVICE_ENABLED) && ( \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x1)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x2)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x3)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x3)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x4)) \
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)
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// In order to reduce the dependance on HAL, we undefine this.
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// Some definitions are copied to our private include file.
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@ -778,5 +789,56 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
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}
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}
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// Interrupt handlers
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#if ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \
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((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2))
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void USB_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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#elif ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3))
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void USB_HP_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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void USB_LP_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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void USBWakeUp_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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#elif((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3))
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// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
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// FIXME: Do all three need to be handled, or just the LP one?
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// USB high-priority interrupt (Channel 19): Triggered only by a correct
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// transfer event for isochronous and double-buffer bulk transfer to reach
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// the highest possible transfer rate.
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void USB_HP_CAN_TX_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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// USB low-priority interrupt (Channel 20): Triggered by all USB events
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// (Correct transfer, USB reset, etc.). The firmware has to check the
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// interrupt source before serving the interrupt.
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void USB_LP_CAN_RX0_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
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// Suspend mode.
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void USBWakeUp_IRQHandler(void)
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{
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dcd_fs_irqHandler();
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}
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#else
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#error Which IRQ handler do you need?
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#endif
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#endif
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@ -51,9 +51,29 @@
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#define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21
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#define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51
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// ST Synopsis OTG devices
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#define OPT_MCU_STM32F4 300 ///< ST STM32F4
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#define OPT_MCU_STM32_FSDEV 301 ///< ST STM32F3
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#define OPT_MCU_STM32H7 302 ///< ST STM32H7
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// ST FSDEV Devices
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#define OPT_MCU_STM32F0x0 330 ///< ST STM32F0x0
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#define OPT_MCU_STM32F0x2 331 ///< ST STM32F0x2
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#define OPT_MCU_STM32F0x8 332 ///< ST STM32F0x8
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#define OPT_MCU_STM32F1x2 333 ///< ST STM32F1x2
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#define OPT_MCU_STM32F1x3 334 ///< ST STM32F1x3
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#define OPT_MCU_STM32F3x2 335 ///< ST STM32F3x2
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#define OPT_MCU_STM32F3x3 336 ///< ST STM32F3x3
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#define OPT_MCU_STM32L0x1 337 ///< ST STM32L3x1
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#define OPT_MCU_STM32L0x2 338 ///< ST STM32L3x2
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#define OPT_MCU_STM32L1x0 339 ///< ST STM32L1x0
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#define OPT_MCU_STM32L1x1 340 ///< ST STM32L1x1
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#define OPT_MCU_STM32L1x2 341 ///< ST STM32L1x2
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#define OPT_MCU_STM32L4x2 342 ///< ST STM32L4x2
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#define OPT_MCU_STM32L4x3 343 ///< ST STM32L4x3
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#define OPT_MCU_STM32G4x1 344 ///< ST STM32G4x1
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#define OPT_MCU_STM32G4x3 345 ///< ST STM32G4x3
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#define OPT_MCU_STM32G4x4 346 ///< ST STM32G4x4
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/** @} */
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