mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
fix build with new freertos host example
This commit is contained in:
hathach
parent
7dc1a66f91
commit
6b8933cfe8
@ -1,5 +1,3 @@
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DEPS_SUBMODULES += lib/FreeRTOS-Kernel
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include ../../make.mk
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FREERTOS_SRC = lib/FreeRTOS-Kernel
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@ -10,14 +10,4 @@ EXAMPLE_SOURCE += \
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# TinyUSB Host Stack source
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SRC_C += \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/host/hub.c \
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src/host/usbh.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c
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include ../../rules.mk
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@ -13,14 +13,4 @@ EXAMPLE_SOURCE = \
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# TinyUSB Host Stack source
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SRC_C += \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/host/hub.c \
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src/host/usbh.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c
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include ../../rules.mk
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@ -5,6 +5,7 @@ FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
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INC += \
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src \
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src/FreeRTOSConfig \
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$(TOP)/hw \
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$(TOP)/$(FREERTOS_SRC)/include \
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$(TOP)/$(FREERTOS_PORTABLE_SRC) \
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@ -19,14 +20,15 @@ EXAMPLE_SOURCE = \
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# TinyUSB Host Stack source
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# FreeRTOS source, all files in port folder
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SRC_C += \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/host/hub.c \
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src/host/usbh.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c
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$(FREERTOS_SRC)/list.c \
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$(FREERTOS_SRC)/queue.c \
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$(FREERTOS_SRC)/tasks.c \
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$(FREERTOS_SRC)/timers.c \
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$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
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SRC_S += \
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$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
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include ../../rules.mk
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@ -0,0 +1,215 @@
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/*
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* FreeRTOS Kernel V10.0.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software. If you wish to use our Amazon
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* FreeRTOS name, please do so in a fair use way that does not cause confusion.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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// skip if included from IAR assembler
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#ifndef __IASMARM__
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// Include MCU header
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#include "bsp/board_mcu.h"
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#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
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#error "ESP32-Sx should use IDF's FreeRTOSConfig.h"
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#endif
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#ifdef __GNUC__
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wredundant-decls"
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#endif
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// TODO fix later
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// FIXME cause redundant-decls warnings
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#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
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extern u32 SystemCoreClock;
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#else
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extern uint32_t SystemCoreClock;
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#endif
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#ifdef __GNUC__
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#pragma GCC diagnostic pop
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#endif
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#endif
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/* Cortex M23/M33 port configuration. */
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#define configENABLE_MPU 0
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#define configENABLE_FPU 1
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#define configENABLE_TRUSTZONE 0
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#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
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#define configUSE_PREEMPTION 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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#define configCPU_CLOCK_HZ SystemCoreClock
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#define configTICK_RATE_HZ ( 1000 )
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( 128 )
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#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
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#define configMAX_TASK_NAME_LEN 16
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 4
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#define configUSE_QUEUE_SETS 0
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 0
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/* Hook function related definitions. */
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configUSE_TRACE_FACILITY 1 // legacy trace
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES 2
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/* Software timer related definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
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#define configTIMER_QUEUE_LENGTH 32
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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/* Optional functions - most linkers will remove unused functions anyway. */
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#define INCLUDE_vTaskPrioritySet 0
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#define INCLUDE_uxTaskPriorityGet 0
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#define INCLUDE_vTaskDelete 0
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#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
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#define INCLUDE_xResumeFromISR 0
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xTaskGetSchedulerState 0
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#define INCLUDE_xTaskGetCurrentTaskHandle 0
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#define INCLUDE_uxTaskGetStackHighWaterMark 0
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#define INCLUDE_xTaskGetIdleTaskHandle 0
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#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
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#define INCLUDE_pcTaskGetTaskName 0
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#define INCLUDE_eTaskGetState 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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#ifdef __RX__
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/* Renesas RX series */
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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#define vTickISR INT_Excep_CMT0_CMI0
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#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
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#define configKERNEL_INTERRUPT_PRIORITY 1
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
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#else
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define vPortSVCHandler SVC_Handler
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//--------------------------------------------------------------------+
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// Interrupt nesting behavior configuration.
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//--------------------------------------------------------------------+
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#if defined(__NVIC_PRIO_BITS)
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// For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#elif defined(__ECLIC_INTCTLBITS)
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// RISC-V Bumblebee core from nuclei
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#define configPRIO_BITS __ECLIC_INTCTLBITS
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#elif defined(__IASMARM__)
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// FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
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// Therefore we will hard coded it to minimum value of 2 to get pass ci build.
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// IAR user must update this to correct value of the target MCU
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#message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
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#define configPRIO_BITS 2
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#else
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#error "FreeRTOS configPRIO_BITS to be defined"
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#endif
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/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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#endif
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#endif /* __FREERTOS_CONFIG__H */
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@ -11,14 +11,4 @@ EXAMPLE_SOURCE += \
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SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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# TinyUSB Host Stack source
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SRC_C += \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/host/hub.c \
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src/host/usbh.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c
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include ../../rules.mk
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@ -24,14 +24,4 @@ SRC_C += \
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# suppress warning caused by fatfs
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CFLAGS += -Wno-error=cast-qual
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# TinyUSB Host Stack source
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SRC_C += \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/host/hub.c \
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src/host/usbh.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c
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include ../../rules.mk
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@ -22,6 +22,8 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
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SRC_C += \
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src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
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src/portable/ohci/ohci.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
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$(MCU_DIR)/src/chip_17xx_40xx.c \
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$(MCU_DIR)/src/clock_17xx_40xx.c \
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@ -29,7 +31,7 @@ SRC_C += \
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$(MCU_DIR)/src/iocon_17xx_40xx.c \
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$(MCU_DIR)/src/sysctl_17xx_40xx.c \
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$(MCU_DIR)/src/sysinit_17xx_40xx.c \
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$(MCU_DIR)/src/uart_17xx_40xx.c
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$(MCU_DIR)/src/uart_17xx_40xx.c \
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INC += \
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$(TOP)/$(MCU_DIR)/inc
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@ -428,8 +428,8 @@ bool hcd_init(uint8_t rhport) {
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reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
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// V1 is 0x01, V2 is 0x12, V3 is 0x13
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uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
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TU_LOG2_HEX(revision);
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// uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
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// TU_LOG2_HEX(revision);
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// reset
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reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);
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@ -17,3 +17,10 @@ TINYUSB_SRC_C += \
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src/class/usbtmc/usbtmc_device.c \
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src/class/video/video_device.c \
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src/class/vendor/vendor_device.c \
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src/host/usbh.c \
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src/host/hub.c \
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src/class/cdc/cdc_host.c \
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src/class/hid/hid_host.c \
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src/class/msc/msc_host.c \
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src/class/vendor/vendor_host.c \
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src/typec/usbc.c \
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