mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
rename port to rhport for clarification
This commit is contained in:
parent
98d6ec1ef5
commit
6d50d05d95
@ -59,16 +59,16 @@ enum { SERIAL_BUFFER_SIZE = 64 };
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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void cdc_serial_app_mount(uint8_t port)
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void cdc_serial_app_mount(uint8_t rhport)
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{
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}
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void cdc_serial_app_umount(uint8_t port)
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void cdc_serial_app_umount(uint8_t rhport)
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{
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}
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void tud_cdc_rx_cb(uint8_t port)
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void tud_cdc_rx_cb(uint8_t rhport)
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{
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}
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@ -58,8 +58,8 @@
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void cdc_serial_app_init(void);
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void cdc_serial_app_task(void* param);
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void cdc_serial_app_mount(uint8_t port);
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void cdc_serial_app_umount(uint8_t port);
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void cdc_serial_app_mount(uint8_t rhport);
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void cdc_serial_app_umount(uint8_t rhport);
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#else
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@ -56,17 +56,17 @@ TUSB_CFG_ATTR_USBRAM hid_keyboard_report_t keyboard_report;
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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void keyboard_app_mount(uint8_t port)
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void keyboard_app_mount(uint8_t rhport)
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{
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}
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void keyboard_app_umount(uint8_t port)
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void keyboard_app_umount(uint8_t rhport)
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{
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}
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void tud_hid_keyboard_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes)
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void tud_hid_keyboard_cb(uint8_t rhport, tusb_event_t event, uint32_t xferred_bytes)
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{
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switch(event)
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{
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@ -77,7 +77,7 @@ void tud_hid_keyboard_cb(uint8_t port, tusb_event_t event, uint32_t xferred_byte
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}
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}
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uint16_t tud_hid_keyboard_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length)
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uint16_t tud_hid_keyboard_get_report_cb(uint8_t rhport, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length)
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{
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// get other than input report is not supported by this keyboard demo
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if ( report_type != HID_REQUEST_REPORT_INPUT ) return 0;
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@ -86,7 +86,7 @@ uint16_t tud_hid_keyboard_get_report_cb(uint8_t port, hid_request_report_type_t
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return requested_length;
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}
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void tud_hid_keyboard_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length)
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void tud_hid_keyboard_set_report_cb(uint8_t rhport, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length)
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{
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// set other than output report is not supported by this keyboard demo
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if ( report_type != HID_REQUEST_REPORT_OUTPUT ) return;
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@ -58,8 +58,8 @@
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void keyboard_app_init(void);
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void keyboard_app_task(void* param);
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void keyboard_app_mount(uint8_t port);
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void keyboard_app_umount(uint8_t port);
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void keyboard_app_mount(uint8_t rhport);
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void keyboard_app_umount(uint8_t rhport);
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#else
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@ -111,18 +111,18 @@ int main(void)
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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void tud_mount_cb(uint8_t port)
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void tud_mount_cb(uint8_t rhport)
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{
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cdc_serial_app_mount(port);
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keyboard_app_mount(port);
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msc_app_mount(port);
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cdc_serial_app_mount(rhport);
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keyboard_app_mount(rhport);
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msc_app_mount(rhport);
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}
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void tud_umount_cb(uint8_t port)
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void tud_umount_cb(uint8_t rhport)
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{
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cdc_serial_app_umount(port);
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keyboard_app_umount(port);
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msc_app_umount(port);
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cdc_serial_app_umount(rhport);
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keyboard_app_umount(rhport);
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msc_app_umount(rhport);
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}
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//--------------------------------------------------------------------+
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@ -56,17 +56,17 @@ TUSB_CFG_ATTR_USBRAM hid_mouse_report_t mouse_report;
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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void mouse_app_mount(uint8_t port)
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void mouse_app_mount(uint8_t rhport)
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{
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}
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void mouse_app_umount(uint8_t port)
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void mouse_app_umount(uint8_t rhport)
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{
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}
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void tud_hid_mouse_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes)
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void tud_hid_mouse_cb(uint8_t rhport, tusb_event_t event, uint32_t xferred_bytes)
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{
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switch(event)
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{
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@ -77,7 +77,7 @@ void tud_hid_mouse_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes)
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}
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}
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uint16_t tud_hid_mouse_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length)
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uint16_t tud_hid_mouse_get_report_cb(uint8_t rhport, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length)
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{
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if ( report_type != HID_REQUEST_REPORT_INPUT ) return 0; // not support other report type for this mouse demo
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@ -85,7 +85,7 @@ uint16_t tud_hid_mouse_get_report_cb(uint8_t port, hid_request_report_type_t rep
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return requested_length;
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}
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void tud_hid_mouse_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t report_data[], uint16_t length)
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void tud_hid_mouse_set_report_cb(uint8_t rhport, hid_request_report_type_t report_type, uint8_t report_data[], uint16_t length)
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{
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// mouse demo does not support set report --> do nothing
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}
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@ -57,8 +57,8 @@
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void mouse_app_init(void);
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void mouse_app_task(void * param);
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void mouse_app_mount(uint8_t port);
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void mouse_app_umount(uint8_t port);
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void mouse_app_mount(uint8_t rhport);
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void mouse_app_umount(uint8_t rhport);
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#else
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@ -89,17 +89,17 @@ static scsi_mode_parameters_t const msc_dev_mode_para =
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//--------------------------------------------------------------------+
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// tinyusb callbacks
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//--------------------------------------------------------------------+
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void msc_app_mount(uint8_t port)
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void msc_app_mount(uint8_t rhport)
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{
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}
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void msc_app_umount(uint8_t port)
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void msc_app_umount(uint8_t rhport)
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{
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}
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msc_csw_status_t tud_msc_scsi_cb (uint8_t port, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length)
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msc_csw_status_t tud_msc_scsi_cb (uint8_t rhport, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length)
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{
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// read10 & write10 has their own callback and MUST not be handled here
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switch (scsi_cmd[0])
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@ -72,8 +72,8 @@ issue at github.com/hathach/tinyusb"
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void msc_app_init(void);
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void msc_app_task(void* param);
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void msc_app_mount(uint8_t port);
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void msc_app_umount(uint8_t port);
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void msc_app_mount(uint8_t rhport);
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void msc_app_umount(uint8_t rhport);
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extern scsi_sense_fixed_data_t mscd_sense_data;
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@ -91,13 +91,13 @@ uint8_t msc_device_ramdisk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
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//--------------------------------------------------------------------+
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// IMPLEMENTATION
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//--------------------------------------------------------------------+
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uint16_t tud_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tud_msc_read10_cb (uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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{
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(*pp_buffer) = msc_device_ramdisk[lba];
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return min16_of(block_count, DISK_BLOCK_NUM);
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}
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uint16_t tud_msc_write10_cb(uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tud_msc_write10_cb(uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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{
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(*pp_buffer) = msc_device_ramdisk[lba];
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@ -97,7 +97,7 @@ static uint8_t sector_buffer[DISK_BLOCK_SIZE];
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//--------------------------------------------------------------------+
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// IMPLEMENTATION
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//--------------------------------------------------------------------+
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uint16_t tusbd_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tusbd_msc_read10_cb (uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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{
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memcpy(sector_buffer, msc_device_app_rommdisk[lba], DISK_BLOCK_SIZE);
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(*pp_buffer) = sector_buffer;
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@ -106,7 +106,7 @@ uint16_t tusbd_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint3
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}
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// Stall write10 by return 0, as this is readonly disk
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uint16_t tusbd_msc_write10_cb(uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tusbd_msc_write10_cb(uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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{
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(*pp_buffer) = NULL;
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@ -228,7 +228,7 @@ void bus_reset(void)
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/*------------------------------------------------------------------*/
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/* Controller API
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*------------------------------------------------------------------*/
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bool tusb_dcd_init (uint8_t port)
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bool tusb_dcd_init (uint8_t rhport)
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{
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// USB Power detection
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const nrf_drv_power_usbevt_config_t config =
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@ -238,24 +238,24 @@ bool tusb_dcd_init (uint8_t port)
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return ( NRF_SUCCESS == nrf_drv_power_usbevt_init(&config) );
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}
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void tusb_dcd_connect (uint8_t port)
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void tusb_dcd_connect (uint8_t rhport)
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{
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}
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void tusb_dcd_disconnect (uint8_t port)
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void tusb_dcd_disconnect (uint8_t rhport)
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{
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}
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void tusb_dcd_set_address (uint8_t port, uint8_t dev_addr)
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void tusb_dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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{
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(void) port;
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(void) rhport;
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// Set Address is automatically update by hw controller
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}
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void tusb_dcd_set_config (uint8_t port, uint8_t config_num)
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void tusb_dcd_set_config (uint8_t rhport, uint8_t config_num)
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{
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(void) port;
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(void) rhport;
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(void) config_num;
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// Nothing to do
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}
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@ -330,9 +330,9 @@ static void control_xact_start(void)
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//}
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bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
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bool tusb_dcd_control_xfer (uint8_t rhport, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
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{
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(void) port;
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(void) rhport;
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if ( length )
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{
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@ -389,9 +389,9 @@ static void normal_xact_start(uint8_t epnum, uint8_t dir)
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}
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}
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bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * desc_edpt)
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bool tusb_dcd_edpt_open (uint8_t rhport, tusb_descriptor_endpoint_t const * desc_edpt)
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{
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(void) port;
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(void) rhport;
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uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress);
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uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress);
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@ -412,9 +412,9 @@ bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * desc_e
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return true;
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}
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bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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bool tusb_dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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(void) port;
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(void) rhport;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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@ -436,9 +436,9 @@ bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16
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return true;
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}
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void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr)
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void tusb_dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) port;
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(void) rhport;
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if ( ep_addr == 0)
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{
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@ -451,18 +451,18 @@ void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr)
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__ISB(); __DSB();
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}
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void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr)
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void tusb_dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) port;
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(void) rhport;
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if ( ep_addr )
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{
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NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr;
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}
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}
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bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr)
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bool tusb_dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
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{
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(void) port;
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(void) rhport;
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// USBD shouldn't check control endpoint state
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if ( 0 == ep_addr ) return false;
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@ -67,15 +67,15 @@ bool tusb_hal_init(void)
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return true;
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}
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void tusb_hal_int_enable(uint8_t port)
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void tusb_hal_int_enable(uint8_t rhport)
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{
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(void) port;
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(void) rhport;
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NVIC_EnableIRQ(USBD_IRQn);
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}
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void tusb_hal_int_disable(uint8_t port)
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void tusb_hal_int_disable(uint8_t rhport)
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{
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(void) port;
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(void) rhport;
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NVIC_DisableIRQ(USBD_IRQn);
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}
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@ -41,15 +41,15 @@
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#if TUSB_CFG_MCU == MCU_LPC11UXX
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void tusb_hal_int_enable(uint8_t port)
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void tusb_hal_int_enable(uint8_t rhport)
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{
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(void) port; // discard compiler's warning
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(void) rhport; // discard compiler's warning
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NVIC_EnableIRQ(USB_IRQn);
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}
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void tusb_hal_int_disable(uint8_t port)
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void tusb_hal_int_disable(uint8_t rhport)
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{
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(void) port; // discard compiler's warning
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(void) rhport; // discard compiler's warning
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NVIC_DisableIRQ(USB_IRQn);
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}
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@ -41,15 +41,15 @@
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#if TUSB_CFG_MCU == MCU_LPC13UXX
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void tusb_hal_int_enable(uint8_t port)
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void tusb_hal_int_enable(uint8_t rhport)
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{
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(void) port; // discard compiler's warning
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(void) rhport; // discard compiler's warning
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NVIC_EnableIRQ(USB_IRQ_IRQn);
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}
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void tusb_hal_int_disable(uint8_t port)
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void tusb_hal_int_disable(uint8_t rhport)
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{
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(void) port; // discard compiler's warning
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(void) rhport; // discard compiler's warning
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NVIC_DisableIRQ(USB_IRQ_IRQn);
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}
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@ -122,9 +122,9 @@ static void bus_reset(void)
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memclr_(&dcd_data, sizeof(dcd_data_t));
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}
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bool tusb_dcd_init(uint8_t port)
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bool tusb_dcd_init(uint8_t rhport)
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{
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(void) port;
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(void) rhport;
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//------------- user manual 11.13 usb device controller initialization -------------// LPC_USB->USBEpInd = 0;
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// step 6 : set up control endpoint
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@ -163,7 +163,7 @@ static void endpoint_non_control_isr(uint32_t eot_int)
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{
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = 0,
|
||||
.rhport = 0,
|
||||
.index = ep_id,
|
||||
.class_code = dcd_data.class_code[ep_id]
|
||||
};
|
||||
@ -206,7 +206,7 @@ static void endpoint_control_isr(void)
|
||||
|
||||
if ( BIT_TEST_(dcd_data.control_dma.int_on_complete, ep_id) )
|
||||
{
|
||||
edpt_hdl_t edpt_hdl = { .port = 0, .class_code = 0 };
|
||||
edpt_hdl_t edpt_hdl = { .rhport = 0, .class_code = 0 };
|
||||
dcd_data.control_dma.int_on_complete = 0;
|
||||
|
||||
// FIXME xferred_byte for control xfer is not needed now !!!
|
||||
@ -218,9 +218,9 @@ static void endpoint_control_isr(void)
|
||||
LPC_USB->USBEpIntClr = endpoint_int_status; // acknowledge interrupt TODO cannot immediately acknowledge setup packet
|
||||
}
|
||||
|
||||
void hal_dcd_isr(uint8_t port)
|
||||
void hal_dcd_isr(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
uint32_t const device_int_enable = LPC_USB->USBDevIntEn;
|
||||
uint32_t const device_int_status = LPC_USB->USBDevIntSt & device_int_enable;
|
||||
LPC_USB->USBDevIntClr = device_int_status;// Acknowledge handled interrupt
|
||||
@ -282,21 +282,21 @@ void hal_dcd_isr(uint8_t port)
|
||||
//--------------------------------------------------------------------+
|
||||
// USBD API - CONTROLLER
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_connect(uint8_t port)
|
||||
void tusb_dcd_connect(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1);
|
||||
}
|
||||
|
||||
void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
|
||||
void tusb_dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
sie_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable
|
||||
}
|
||||
|
||||
void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
|
||||
void tusb_dcd_set_config(uint8_t rhport, uint8_t config_num)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
(void) config_num;
|
||||
sie_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1);
|
||||
}
|
||||
@ -375,14 +375,14 @@ static tusb_error_t pipe_control_read(void * buffer, uint16_t length)
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROL PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_control_stall(uint8_t port)
|
||||
void tusb_dcd_control_stall(uint8_t rhport)
|
||||
{
|
||||
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK);
|
||||
}
|
||||
|
||||
bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
|
||||
bool tusb_dcd_control_xfer(uint8_t rhport, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
VERIFY( !(length != 0 && p_buffer == NULL) );
|
||||
|
||||
@ -414,9 +414,9 @@ bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uin
|
||||
//--------------------------------------------------------------------+
|
||||
// BULK/INTERRUPT/ISO PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
edpt_hdl_t tusb_dcd_edpt_open(uint8_t rhport, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
edpt_hdl_t const null_handle = { 0 };
|
||||
|
||||
@ -444,7 +444,7 @@ edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p
|
||||
|
||||
return (edpt_hdl_t)
|
||||
{
|
||||
.port = 0,
|
||||
.rhport = 0,
|
||||
.index = ep_id,
|
||||
.class_code = class_code
|
||||
};
|
||||
@ -460,7 +460,7 @@ void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl)
|
||||
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+edpt_hdl.index, 1, SIE_SET_ENDPOINT_STALLED_MASK);
|
||||
}
|
||||
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t ep_addr)
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t ep_id = ep_addr2phy(ep_addr);
|
||||
|
||||
|
@ -41,15 +41,15 @@
|
||||
|
||||
#if TUSB_CFG_MCU == MCU_LPC175X_6X
|
||||
|
||||
void tusb_hal_int_enable(uint8_t port)
|
||||
void tusb_hal_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) port; // discard compiler's warning
|
||||
(void) rhport; // discard compiler's warning
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
void tusb_hal_int_disable(uint8_t port)
|
||||
void tusb_hal_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void) port; // discard compiler's warning
|
||||
(void) rhport; // discard compiler's warning
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
|
@ -85,25 +85,25 @@ static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROLLER API
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_connect(uint8_t port)
|
||||
void tusb_dcd_connect(uint8_t rhport)
|
||||
{
|
||||
LPC_USB[port]->USBCMD_D |= BIT_(0);
|
||||
LPC_USB[rhport]->USBCMD_D |= BIT_(0);
|
||||
}
|
||||
|
||||
void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
|
||||
void tusb_dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
LPC_USB[port]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
|
||||
LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
|
||||
}
|
||||
|
||||
void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
|
||||
void tusb_dcd_set_config(uint8_t rhport, uint8_t config_num)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/// follows LPC43xx User Manual 23.10.3
|
||||
static void bus_reset(uint8_t port)
|
||||
static void bus_reset(uint8_t rhport)
|
||||
{
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
|
||||
|
||||
// The reset value for all endpoint types is the control endpoint. If one endpoint
|
||||
//direction is enabled and the paired endpoint of opposite direction is disabled, then the
|
||||
@ -114,7 +114,7 @@ static void bus_reset(uint8_t port)
|
||||
(TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
|
||||
|
||||
// USB1 only has 3 non-control endpoints
|
||||
if ( port == 0)
|
||||
if ( rhport == 0)
|
||||
{
|
||||
lpc_usb->ENDPTCTRL4 = lpc_usb->ENDPTCTRL5 = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
|
||||
}
|
||||
@ -133,7 +133,7 @@ static void bus_reset(uint8_t port)
|
||||
// read reset bit in portsc
|
||||
|
||||
//------------- Queue Head & Queue TD -------------//
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[port];
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[rhport];
|
||||
|
||||
memclr_(p_dcd, sizeof(dcd_data_t));
|
||||
|
||||
@ -146,10 +146,10 @@ static void bus_reset(uint8_t port)
|
||||
|
||||
}
|
||||
|
||||
bool tusb_dcd_init(uint8_t port)
|
||||
bool tusb_dcd_init(uint8_t rhport)
|
||||
{
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[port];
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[rhport];
|
||||
|
||||
memclr_(p_dcd, sizeof(dcd_data_t));
|
||||
|
||||
@ -161,7 +161,7 @@ bool tusb_dcd_init(uint8_t port)
|
||||
lpc_usb->USBCMD_D |= BIT_(0); // connect
|
||||
|
||||
// enable interrupt
|
||||
NVIC_EnableIRQ(port ? USB1_IRQn : USB0_IRQn);
|
||||
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
|
||||
return true;
|
||||
}
|
||||
@ -217,12 +217,12 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
|
||||
}
|
||||
|
||||
// retval 0: invalid
|
||||
static inline uint8_t qtd_find_free(uint8_t port)
|
||||
static inline uint8_t qtd_find_free(uint8_t rhport)
|
||||
{
|
||||
// QTD0 is reserved for control transfer
|
||||
for(uint8_t i=1; i<DCD_QTD_MAX; i++)
|
||||
{
|
||||
if ( dcd_data_ptr[port]->qtd[i].used == 0) return i;
|
||||
if ( dcd_data_ptr[rhport]->qtd[i].used == 0) return i;
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -234,10 +234,10 @@ static inline uint8_t qtd_find_free(uint8_t port)
|
||||
|
||||
// control transfer does not need to use qtd find function
|
||||
// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
|
||||
bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length)
|
||||
bool tusb_dcd_control_xfer(uint8_t rhport, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length)
|
||||
{
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
|
||||
dcd_data_t* const p_dcd = dcd_data_ptr[port];
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
|
||||
dcd_data_t* const p_dcd = dcd_data_ptr[rhport];
|
||||
|
||||
uint8_t const ep_phy = (dir == TUSB_DIR_IN) ? 1 : 0;
|
||||
|
||||
@ -264,15 +264,15 @@ bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uin
|
||||
//--------------------------------------------------------------------+
|
||||
// BULK/INTERRUPT/ISOCHRONOUS PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
static inline volatile uint32_t * get_reg_control_addr(uint8_t port, uint8_t physical_endpoint)
|
||||
static inline volatile uint32_t * get_reg_control_addr(uint8_t rhport, uint8_t physical_endpoint)
|
||||
{
|
||||
return &(LPC_USB[port]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
|
||||
return &(LPC_USB[rhport]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
|
||||
}
|
||||
|
||||
void tusb_dcd_edpt_stall(uint8_t port, uint8_t ep_addr)
|
||||
void tusb_dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t ep_idx = edpt_addr2phy(ep_addr);
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(port, ep_idx);
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(rhport, ep_idx);
|
||||
|
||||
if ( ep_addr == 0)
|
||||
{
|
||||
@ -284,16 +284,16 @@ void tusb_dcd_edpt_stall(uint8_t port, uint8_t ep_addr)
|
||||
}
|
||||
}
|
||||
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t ep_addr)
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(port, edpt_addr2phy(ep_addr));
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(rhport, edpt_addr2phy(ep_addr));
|
||||
|
||||
// data toggle also need to be reset
|
||||
(*reg_control) |= ENDPTCTRL_MASK_TOGGLE_RESET << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0);
|
||||
(*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0));
|
||||
}
|
||||
|
||||
bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc)
|
||||
bool tusb_dcd_edpt_open(uint8_t rhport, tusb_descriptor_endpoint_t const * p_endpoint_desc)
|
||||
{
|
||||
// TODO USB1 only has 4 non-control enpoint (USB0 has 5)
|
||||
// TODO not support ISO yet
|
||||
@ -303,7 +303,7 @@ bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpo
|
||||
|
||||
//------------- Prepare Queue Head -------------//
|
||||
uint8_t ep_idx = edpt_addr2phy(p_endpoint_desc->bEndpointAddress);
|
||||
dcd_qhd_t * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
|
||||
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
|
||||
|
||||
memclr_(p_qhd, sizeof(dcd_qhd_t));
|
||||
|
||||
@ -312,7 +312,7 @@ bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpo
|
||||
p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
|
||||
|
||||
//------------- Endpoint Control Register -------------//
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(port, ep_idx);
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(rhport, ep_idx);
|
||||
|
||||
// endpoint must not be already enabled
|
||||
VERIFY( !( (*reg_control) & (ENDPTCTRL_MASK_ENABLE << (dir ? 16 : 0)) ) );
|
||||
@ -322,10 +322,10 @@ bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpo
|
||||
return true;
|
||||
}
|
||||
|
||||
bool tusb_dcd_edpt_busy(uint8_t port, uint8_t ep_addr)
|
||||
bool tusb_dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t ep_idx = edpt_addr2phy(ep_addr);
|
||||
dcd_qhd_t const * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
|
||||
dcd_qhd_t const * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
|
||||
|
||||
return p_qhd->list_qtd_idx[0] != 0; // qtd list is not empty
|
||||
// return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active;
|
||||
@ -333,12 +333,12 @@ bool tusb_dcd_edpt_busy(uint8_t port, uint8_t ep_addr)
|
||||
|
||||
// add only, controller virtually cannot know
|
||||
// TODO remove and merge to tusb_dcd_edpt_xfer
|
||||
static bool pipe_add_xfer(uint8_t port, uint8_t ed_idx, void * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
static bool pipe_add_xfer(uint8_t rhport, uint8_t ed_idx, void * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
uint8_t qtd_idx = qtd_find_free(port);
|
||||
uint8_t qtd_idx = qtd_find_free(rhport);
|
||||
TU_ASSERT(qtd_idx != 0);
|
||||
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[port];
|
||||
dcd_data_t* p_dcd = dcd_data_ptr[rhport];
|
||||
dcd_qhd_t * p_qhd = &p_dcd->qhd[ed_idx];
|
||||
dcd_qtd_t * p_qtd = &p_dcd->qtd[qtd_idx];
|
||||
|
||||
@ -361,35 +361,35 @@ static bool pipe_add_xfer(uint8_t port, uint8_t ed_idx, void * buffer, uint16_t
|
||||
return true;
|
||||
}
|
||||
|
||||
bool tusb_dcd_edpt_xfer(uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
bool tusb_dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
uint8_t ep_idx = edpt_addr2phy(ep_addr);
|
||||
|
||||
VERIFY ( pipe_add_xfer(port, ep_idx, buffer, total_bytes, true) );
|
||||
VERIFY ( pipe_add_xfer(rhport, ep_idx, buffer, total_bytes, true) );
|
||||
|
||||
dcd_qhd_t* p_qhd = &dcd_data_ptr[port]->qhd[ ep_idx ];
|
||||
dcd_qtd_t* p_qtd = &dcd_data_ptr[port]->qtd[ p_qhd->list_qtd_idx[0] ];
|
||||
dcd_qhd_t* p_qhd = &dcd_data_ptr[rhport]->qhd[ ep_idx ];
|
||||
dcd_qtd_t* p_qtd = &dcd_data_ptr[rhport]->qtd[ p_qhd->list_qtd_idx[0] ];
|
||||
|
||||
p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // attach head QTD to QHD start transferring
|
||||
|
||||
LPC_USB[port]->ENDPTPRIME = BIT_( edpt_phy2pos(ep_idx) ) ;
|
||||
LPC_USB[rhport]->ENDPTPRIME = BIT_( edpt_phy2pos(ep_idx) ) ;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
//------------- Device Controller Driver's Interrupt Handler -------------//
|
||||
void xfer_complete_isr(uint8_t port, uint32_t reg_complete)
|
||||
void xfer_complete_isr(uint8_t rhport, uint32_t reg_complete)
|
||||
{
|
||||
for(uint8_t ep_idx = 2; ep_idx < DCD_QHD_MAX; ep_idx++)
|
||||
{
|
||||
if ( BIT_TEST_(reg_complete, edpt_phy2pos(ep_idx)) )
|
||||
{ // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
|
||||
dcd_qhd_t * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
|
||||
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
|
||||
|
||||
// retire all QTDs in array list, up to 1st still-active QTD
|
||||
while( p_qhd->list_qtd_idx[0] != 0 )
|
||||
{
|
||||
dcd_qtd_t * p_qtd = &dcd_data_ptr[port]->qtd[ p_qhd->list_qtd_idx[0] ];
|
||||
dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ p_qhd->list_qtd_idx[0] ];
|
||||
|
||||
if (p_qtd->active) break; // stop immediately if found still-active QTD and shift array list
|
||||
|
||||
@ -403,16 +403,16 @@ void xfer_complete_isr(uint8_t port, uint32_t reg_complete)
|
||||
bool succeeded = ( p_qtd->xact_err || p_qtd->halted || p_qtd->buffer_err ) ? false : true;
|
||||
|
||||
uint8_t ep_addr = edpt_phy2addr(ep_idx);
|
||||
tusb_dcd_xfer_complete(port, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, succeeded); // only number of bytes in the IOC qtd
|
||||
tusb_dcd_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, succeeded); // only number of bytes in the IOC qtd
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void hal_dcd_isr(uint8_t port)
|
||||
void hal_dcd_isr(uint8_t rhport)
|
||||
{
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
|
||||
LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
|
||||
|
||||
uint32_t const int_enable = lpc_usb->USBINTR_D;
|
||||
uint32_t const int_status = lpc_usb->USBSTS_D & int_enable;
|
||||
@ -422,8 +422,8 @@ void hal_dcd_isr(uint8_t port)
|
||||
|
||||
if (int_status & INT_MASK_RESET)
|
||||
{
|
||||
bus_reset(port);
|
||||
tusb_dcd_bus_event(port, USBD_BUS_EVENT_RESET);
|
||||
bus_reset(rhport);
|
||||
tusb_dcd_bus_event(rhport, USBD_BUS_EVENT_RESET);
|
||||
}
|
||||
|
||||
if (int_status & INT_MASK_SUSPEND)
|
||||
@ -451,7 +451,7 @@ void hal_dcd_isr(uint8_t port)
|
||||
uint32_t const edpt_complete = lpc_usb->ENDPTCOMPLETE;
|
||||
lpc_usb->ENDPTCOMPLETE = edpt_complete; // acknowledge
|
||||
|
||||
dcd_data_t* const p_dcd = dcd_data_ptr[port];
|
||||
dcd_data_t* const p_dcd = dcd_data_ptr[rhport];
|
||||
|
||||
//------------- Set up Received -------------//
|
||||
if (lpc_usb->ENDPTSETUPSTAT)
|
||||
@ -459,7 +459,7 @@ void hal_dcd_isr(uint8_t port)
|
||||
// 23.10.10.2 Operational model for setup transfers
|
||||
lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
|
||||
|
||||
tusb_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request);
|
||||
tusb_dcd_setup_received(rhport, (uint8_t*) &p_dcd->qhd[0].setup_request);
|
||||
}
|
||||
//------------- Control Request Completed -------------//
|
||||
else if ( edpt_complete & ( BIT_(0) | BIT_(16)) )
|
||||
@ -476,7 +476,7 @@ void hal_dcd_isr(uint8_t port)
|
||||
bool succeeded = ( p_qtd->xact_err || p_qtd->halted || p_qtd->buffer_err ) ? false : true;
|
||||
(void) succeeded;
|
||||
|
||||
tusb_dcd_control_complete(port);
|
||||
tusb_dcd_control_complete(rhport);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -485,13 +485,13 @@ void hal_dcd_isr(uint8_t port)
|
||||
//------------- Transfer Complete -------------//
|
||||
if ( edpt_complete & ~(BIT_(0) | BIT_(16)) )
|
||||
{
|
||||
xfer_complete_isr(port, edpt_complete);
|
||||
xfer_complete_isr(rhport, edpt_complete);
|
||||
}
|
||||
}
|
||||
|
||||
if (int_status & INT_MASK_SOF)
|
||||
{
|
||||
tusb_dcd_bus_event(port, USBD_BUS_EVENT_SOF);
|
||||
tusb_dcd_bus_event(rhport, USBD_BUS_EVENT_SOF);
|
||||
}
|
||||
|
||||
if (int_status & INT_MASK_NAK) {}
|
||||
|
@ -81,22 +81,22 @@ void tusb_hal_dbg_breakpoint(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
void tusb_hal_int_enable(uint8_t port)
|
||||
void tusb_hal_int_enable(uint8_t rhport)
|
||||
{
|
||||
NVIC_EnableIRQ(port ? USB1_IRQn : USB0_IRQn);
|
||||
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
}
|
||||
|
||||
void tusb_hal_int_disable(uint8_t port)
|
||||
void tusb_hal_int_disable(uint8_t rhport)
|
||||
{
|
||||
NVIC_DisableIRQ(port ? USB1_IRQn : USB0_IRQn);
|
||||
NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
}
|
||||
|
||||
|
||||
static void hal_controller_reset(uint8_t port)
|
||||
static void hal_controller_reset(uint8_t rhport)
|
||||
{ // TODO timeout expired to prevent trap
|
||||
volatile uint32_t * p_reg_usbcmd;
|
||||
|
||||
p_reg_usbcmd = (port ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
|
||||
p_reg_usbcmd = (rhport ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
|
||||
// NXP chip powered with non-host mode --> sts bit is not correctly reflected
|
||||
(*p_reg_usbcmd) |= BIT_(1);
|
||||
|
||||
@ -149,13 +149,13 @@ bool tusb_hal_init(void)
|
||||
LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;
|
||||
#endif
|
||||
|
||||
LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force port to fullspeed
|
||||
LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force rhport to fullspeed
|
||||
#endif
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void hal_dcd_isr(uint8_t port);
|
||||
void hal_dcd_isr(uint8_t rhport);
|
||||
|
||||
#if TUSB_CFG_CONTROLLER_0_MODE
|
||||
void USB0_IRQHandler(void)
|
||||
|
@ -63,7 +63,7 @@ typedef struct {
|
||||
uint8_t ep_out;
|
||||
}cdcd_data_t;
|
||||
|
||||
// TODO multiple port
|
||||
// TODO multiple rhport
|
||||
TUSB_CFG_ATTR_USBRAM ATTR_ALIGNED(4) uint8_t _tmp_rx_buf[64];
|
||||
TUSB_CFG_ATTR_USBRAM ATTR_ALIGNED(4) uint8_t _tmp_tx_buf[64];
|
||||
|
||||
@ -80,33 +80,33 @@ STATIC_VAR cdcd_data_t cdcd_data[CONTROLLER_DEVICE_NUMBER];
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION API
|
||||
//--------------------------------------------------------------------+
|
||||
bool tud_n_cdc_connected(uint8_t port)
|
||||
bool tud_n_cdc_connected(uint8_t rhport)
|
||||
{
|
||||
return cdcd_data[port].connected;
|
||||
return cdcd_data[rhport].connected;
|
||||
}
|
||||
|
||||
uint32_t tud_n_cdc_available(uint8_t port)
|
||||
uint32_t tud_n_cdc_available(uint8_t rhport)
|
||||
{
|
||||
return fifo_count(&_rx_ff);
|
||||
}
|
||||
|
||||
int tud_n_cdc_read_char(uint8_t port)
|
||||
int tud_n_cdc_read_char(uint8_t rhport)
|
||||
{
|
||||
uint8_t ch;
|
||||
return fifo_read(&_rx_ff, &ch) ? ch : (-1);
|
||||
}
|
||||
|
||||
uint32_t tud_n_cdc_read(uint8_t port, void* buffer, uint32_t bufsize)
|
||||
uint32_t tud_n_cdc_read(uint8_t rhport, void* buffer, uint32_t bufsize)
|
||||
{
|
||||
return fifo_read_n(&_rx_ff, buffer, bufsize);
|
||||
}
|
||||
|
||||
uint32_t tud_n_cdc_write_char(uint8_t port, char ch)
|
||||
uint32_t tud_n_cdc_write_char(uint8_t rhport, char ch)
|
||||
{
|
||||
return fifo_write(&_tx_ff, &ch);
|
||||
}
|
||||
|
||||
uint32_t tud_n_cdc_write(uint8_t port, void const* buffer, uint32_t bufsize)
|
||||
uint32_t tud_n_cdc_write(uint8_t rhport, void const* buffer, uint32_t bufsize)
|
||||
{
|
||||
return fifo_write_n(&_tx_ff, buffer, bufsize);
|
||||
}
|
||||
@ -130,7 +130,7 @@ void cdcd_init(void)
|
||||
}
|
||||
}
|
||||
|
||||
tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
tusb_error_t cdcd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
{
|
||||
if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS;
|
||||
|
||||
@ -141,7 +141,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
}
|
||||
|
||||
uint8_t const * p_desc = descriptor_next ( (uint8_t const *) p_interface_desc );
|
||||
cdcd_data_t * p_cdc = &cdcd_data[port];
|
||||
cdcd_data_t * p_cdc = &cdcd_data[rhport];
|
||||
|
||||
//------------- Communication Interface -------------//
|
||||
(*p_length) = sizeof(tusb_descriptor_interface_t);
|
||||
@ -159,7 +159,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
|
||||
if ( TUSB_DESC_ENDPOINT == p_desc[DESCRIPTOR_OFFSET_TYPE])
|
||||
{ // notification endpoint if any
|
||||
TU_ASSERT( tusb_dcd_edpt_open(port, (tusb_descriptor_endpoint_t const *) p_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
|
||||
TU_ASSERT( tusb_dcd_edpt_open(rhport, (tusb_descriptor_endpoint_t const *) p_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
|
||||
|
||||
p_cdc->ep_notif = ((tusb_descriptor_endpoint_t const *) p_desc)->bEndpointAddress;
|
||||
|
||||
@ -181,7 +181,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
|
||||
TU_ASSERT( tusb_dcd_edpt_open(port, p_endpoint), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
|
||||
TU_ASSERT( tusb_dcd_edpt_open(rhport, p_endpoint), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
|
||||
|
||||
if ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK )
|
||||
{
|
||||
@ -199,22 +199,22 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
p_cdc->interface_number = p_interface_desc->bInterfaceNumber;
|
||||
|
||||
// Prepare for incoming data
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER);
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER);
|
||||
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
void cdcd_close(uint8_t port)
|
||||
void cdcd_close(uint8_t rhport)
|
||||
{
|
||||
// no need to close opened pipe, dcd bus reset will put controller's endpoints to default state
|
||||
memclr_(&cdcd_data[port], sizeof(cdcd_data_t));
|
||||
memclr_(&cdcd_data[rhport], sizeof(cdcd_data_t));
|
||||
|
||||
fifo_clear(&_rx_ff);
|
||||
fifo_clear(&_tx_ff);
|
||||
}
|
||||
|
||||
tusb_error_t cdcd_control_request_st(uint8_t port, tusb_control_request_t const * p_request)
|
||||
tusb_error_t cdcd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request)
|
||||
{
|
||||
OSAL_SUBTASK_BEGIN
|
||||
|
||||
@ -225,13 +225,13 @@ tusb_error_t cdcd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
|
||||
if (CDC_REQUEST_GET_LINE_CODING == p_request->bRequest)
|
||||
{
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, (tusb_dir_t) p_request->bmRequestType_bit.direction,
|
||||
(uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength)), err );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, (tusb_dir_t) p_request->bmRequestType_bit.direction,
|
||||
(uint8_t*) &cdcd_line_coding[rhport], min16_of(sizeof(cdc_line_coding_t), p_request->wLength)), err );
|
||||
}
|
||||
else if (CDC_REQUEST_SET_LINE_CODING == p_request->bRequest)
|
||||
{
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, (tusb_dir_t) p_request->bmRequestType_bit.direction,
|
||||
(uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength)), err );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, (tusb_dir_t) p_request->bmRequestType_bit.direction,
|
||||
(uint8_t*) &cdcd_line_coding[rhport], min16_of(sizeof(cdc_line_coding_t), p_request->wLength)), err );
|
||||
// TODO notify application on xfer complete
|
||||
}
|
||||
else if (CDC_REQUEST_SET_CONTROL_LINE_STATE == p_request->bRequest )
|
||||
@ -241,7 +241,7 @@ tusb_error_t cdcd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
ACTIVE_DTE_NOT_PRESENT = 0x0002
|
||||
};
|
||||
|
||||
cdcd_data_t * p_cdc = &cdcd_data[port];
|
||||
cdcd_data_t * p_cdc = &cdcd_data[rhport];
|
||||
|
||||
if (p_request->wValue == ACTIVE_DTE_PRESENT)
|
||||
{
|
||||
@ -258,51 +258,51 @@ tusb_error_t cdcd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
p_cdc->connected = false;
|
||||
}
|
||||
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
}
|
||||
else
|
||||
{
|
||||
usbd_control_stall(port); // stall unsupported request
|
||||
usbd_control_stall(rhport); // stall unsupported request
|
||||
}
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
}
|
||||
|
||||
tusb_error_t cdcd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
cdcd_data_t const * p_cdc = &cdcd_data[port];
|
||||
cdcd_data_t const * p_cdc = &cdcd_data[rhport];
|
||||
|
||||
if ( ep_addr == p_cdc->ep_out )
|
||||
{
|
||||
fifo_write_n(&_rx_ff, _tmp_rx_buf, xferred_bytes);
|
||||
|
||||
// preparing for next
|
||||
TU_ASSERT(tusb_dcd_edpt_xfer(port, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER);
|
||||
TU_ASSERT(tusb_dcd_edpt_xfer(rhport, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER);
|
||||
|
||||
// fire callback
|
||||
tud_cdc_rx_cb(port);
|
||||
tud_cdc_rx_cb(rhport);
|
||||
}
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
bool tud_n_cdc_flush (uint8_t port)
|
||||
bool tud_n_cdc_flush (uint8_t rhport)
|
||||
{
|
||||
VERIFY( tud_n_cdc_connected(port) );
|
||||
VERIFY( tud_n_cdc_connected(rhport) );
|
||||
|
||||
uint8_t edpt = cdcd_data[port].ep_in;
|
||||
uint8_t edpt = cdcd_data[rhport].ep_in;
|
||||
|
||||
VERIFY( !tusb_dcd_edpt_busy(port, edpt) );
|
||||
VERIFY( !tusb_dcd_edpt_busy(rhport, edpt) );
|
||||
|
||||
uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, edpt, _tmp_tx_buf, count) );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, edpt, _tmp_tx_buf, count) );
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void cdcd_sof(uint8_t port)
|
||||
void cdcd_sof(uint8_t rhport)
|
||||
{
|
||||
tud_n_cdc_flush(port);
|
||||
tud_n_cdc_flush(rhport);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -55,15 +55,15 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION API (Multiple Ports)
|
||||
//--------------------------------------------------------------------+
|
||||
bool tud_n_cdc_connected (uint8_t port);
|
||||
uint32_t tud_n_cdc_available (uint8_t port);
|
||||
bool tud_n_cdc_connected (uint8_t rhport);
|
||||
uint32_t tud_n_cdc_available (uint8_t rhport);
|
||||
|
||||
int tud_n_cdc_read_char (uint8_t port);
|
||||
uint32_t tud_n_cdc_read (uint8_t port, void* buffer, uint32_t bufsize);
|
||||
int tud_n_cdc_read_char (uint8_t rhport);
|
||||
uint32_t tud_n_cdc_read (uint8_t rhport, void* buffer, uint32_t bufsize);
|
||||
|
||||
uint32_t tud_n_cdc_write_char (uint8_t port, char ch);
|
||||
uint32_t tud_n_cdc_write (uint8_t port, void const* buffer, uint32_t bufsize);
|
||||
bool tud_n_cdc_flush (uint8_t port);
|
||||
uint32_t tud_n_cdc_write_char (uint8_t rhport, char ch);
|
||||
uint32_t tud_n_cdc_write (uint8_t rhport, void const* buffer, uint32_t bufsize);
|
||||
bool tud_n_cdc_flush (uint8_t rhport);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION API (Single Port)
|
||||
@ -81,8 +81,8 @@ static inline bool tud_cdc_flush (void)
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION CALLBACK API
|
||||
//--------------------------------------------------------------------+
|
||||
//void tud_cdc_line_coding_changed_cb(uint8_t port, cdc_line_coding_t* p_line_coding);
|
||||
void tud_cdc_rx_cb(uint8_t port);
|
||||
//void tud_cdc_line_coding_changed_cb(uint8_t rhport, cdc_line_coding_t* p_line_coding);
|
||||
void tud_cdc_rx_cb(uint8_t rhport);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// USBD-CLASS DRIVER API
|
||||
@ -90,12 +90,12 @@ void tud_cdc_rx_cb(uint8_t port);
|
||||
#ifdef _TINY_USB_SOURCE_FILE_
|
||||
|
||||
void cdcd_init(void);
|
||||
tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t cdcd_control_request_st(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t cdcd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void cdcd_close(uint8_t port);
|
||||
tusb_error_t cdcd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t cdcd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request);
|
||||
tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void cdcd_close(uint8_t rhport);
|
||||
|
||||
void cdcd_sof(uint8_t port);
|
||||
void cdcd_sof(uint8_t rhport);
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -108,18 +108,18 @@ TUSB_CFG_ATTR_USBRAM STATIC_VAR uint8_t m_hid_buffer[ HIDD_BUFFER_SIZE ];
|
||||
#if TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
STATIC_VAR hidd_interface_t keyboardd_data;
|
||||
|
||||
bool tud_hid_keyboard_busy(uint8_t port)
|
||||
bool tud_hid_keyboard_busy(uint8_t rhport)
|
||||
{
|
||||
return tusb_dcd_edpt_busy(port, keyboardd_data.edpt_addr);
|
||||
return tusb_dcd_edpt_busy(rhport, keyboardd_data.edpt_addr);
|
||||
}
|
||||
|
||||
tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_report)
|
||||
tusb_error_t tud_hid_keyboard_send(uint8_t rhport, hid_keyboard_report_t const *p_report)
|
||||
{
|
||||
VERIFY(tud_mounted(), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
|
||||
|
||||
hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[port];
|
||||
hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[rhport];
|
||||
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_kbd->edpt_addr, (void*) p_report, sizeof(hid_keyboard_report_t)), TUSB_ERROR_DCD_EDPT_XFER ) ;
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_kbd->edpt_addr, (void*) p_report, sizeof(hid_keyboard_report_t)), TUSB_ERROR_DCD_EDPT_XFER ) ;
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
@ -131,18 +131,18 @@ tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_
|
||||
#if TUSB_CFG_DEVICE_HID_MOUSE
|
||||
STATIC_VAR hidd_interface_t moused_data;
|
||||
|
||||
bool tud_hid_mouse_is_busy(uint8_t port)
|
||||
bool tud_hid_mouse_is_busy(uint8_t rhport)
|
||||
{
|
||||
return tusb_dcd_edpt_busy(port, moused_data.edpt_addr);
|
||||
return tusb_dcd_edpt_busy(rhport, moused_data.edpt_addr);
|
||||
}
|
||||
|
||||
tusb_error_t tud_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report)
|
||||
tusb_error_t tud_hid_mouse_send(uint8_t rhport, hid_mouse_report_t const *p_report)
|
||||
{
|
||||
VERIFY(tud_mounted(), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
|
||||
|
||||
hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[port];
|
||||
hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[rhport];
|
||||
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_mouse->edpt_addr, (void*) p_report, sizeof(hid_mouse_report_t)), TUSB_ERROR_DCD_EDPT_XFER ) ;
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_mouse->edpt_addr, (void*) p_report, sizeof(hid_mouse_report_t)), TUSB_ERROR_DCD_EDPT_XFER ) ;
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
@ -168,7 +168,7 @@ void hidd_init(void)
|
||||
}
|
||||
}
|
||||
|
||||
void hidd_close(uint8_t port)
|
||||
void hidd_close(uint8_t rhport)
|
||||
{
|
||||
for(uint8_t i=0; i<HIDD_NUMBER_OF_SUBCLASS; i++)
|
||||
{
|
||||
@ -176,7 +176,7 @@ void hidd_close(uint8_t port)
|
||||
}
|
||||
}
|
||||
|
||||
tusb_error_t hidd_control_request_st(uint8_t port, tusb_control_request_t const * p_request)
|
||||
tusb_error_t hidd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request)
|
||||
{
|
||||
uint8_t subclass_idx;
|
||||
for(subclass_idx=0; subclass_idx<HIDD_NUMBER_OF_SUBCLASS; subclass_idx++)
|
||||
@ -209,10 +209,10 @@ tusb_error_t hidd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
// copy to allow report descriptor not to be in USBRAM
|
||||
memcpy(m_hid_buffer, p_hid->p_report_desc, p_hid->report_length);
|
||||
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, p_request->bmRequestType_bit.direction, m_hid_buffer, p_hid->report_length), err );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, p_request->bmRequestType_bit.direction, m_hid_buffer, p_hid->report_length), err );
|
||||
}else
|
||||
{
|
||||
usbd_control_stall(port);
|
||||
usbd_control_stall(rhport);
|
||||
}
|
||||
}
|
||||
//------------- Class Specific Request -------------//
|
||||
@ -223,41 +223,41 @@ tusb_error_t hidd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
// wValue = Report Type | Report ID
|
||||
void* p_buffer = NULL;
|
||||
|
||||
uint16_t actual_length = p_driver->get_report_cb(port, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
|
||||
uint16_t actual_length = p_driver->get_report_cb(rhport, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
|
||||
&p_buffer, p_request->wLength);
|
||||
STASK_ASSERT( p_buffer != NULL && actual_length > 0 );
|
||||
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, p_request->bmRequestType_bit.direction, p_buffer, actual_length), err );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, p_request->bmRequestType_bit.direction, p_buffer, actual_length), err );
|
||||
}
|
||||
else if ( (HID_REQUEST_CONTROL_SET_REPORT == p_request->bRequest) && (p_driver->set_report_cb != NULL) )
|
||||
{
|
||||
// return TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT; // TODO test STALL control out endpoint (with mouse+keyboard)
|
||||
// wValue = Report Type | Report ID
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength), err );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength), err );
|
||||
STASK_ASSERT_STATUS(err);
|
||||
|
||||
p_driver->set_report_cb(port, u16_high_u8(p_request->wValue), m_hid_buffer, p_request->wLength);
|
||||
p_driver->set_report_cb(rhport, u16_high_u8(p_request->wValue), m_hid_buffer, p_request->wLength);
|
||||
}
|
||||
else if (HID_REQUEST_CONTROL_SET_IDLE == p_request->bRequest)
|
||||
{
|
||||
// uint8_t idle_rate = u16_high_u8(p_request->wValue);
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
}else
|
||||
{
|
||||
// HID_REQUEST_CONTROL_GET_IDLE:
|
||||
// HID_REQUEST_CONTROL_GET_PROTOCOL:
|
||||
// HID_REQUEST_CONTROL_SET_PROTOCOL:
|
||||
usbd_control_stall(port);
|
||||
usbd_control_stall(rhport);
|
||||
}
|
||||
}else
|
||||
{
|
||||
usbd_control_stall(port);
|
||||
usbd_control_stall(rhport);
|
||||
}
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
}
|
||||
|
||||
tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
tusb_error_t hidd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
{
|
||||
uint8_t const *p_desc = (uint8_t const *) p_interface_desc;
|
||||
|
||||
@ -283,7 +283,7 @@ tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
|
||||
VERIFY(p_hid, TUSB_ERROR_FAILED);
|
||||
|
||||
VERIFY( tusb_dcd_edpt_open(port, p_desc_endpoint), TUSB_ERROR_DCD_FAILED );
|
||||
VERIFY( tusb_dcd_edpt_open(rhport, p_desc_endpoint), TUSB_ERROR_DCD_FAILED );
|
||||
|
||||
p_hid->edpt_addr = p_desc_endpoint->bEndpointAddress;
|
||||
|
||||
@ -308,14 +308,14 @@ tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hidd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
for(uint8_t i=0; i<HIDD_NUMBER_OF_SUBCLASS; i++)
|
||||
{
|
||||
hidd_interface_t * const p_interface = hidd_class_driver[i].p_interface;
|
||||
if ( (p_interface != NULL) && (edpt_addr == p_interface->edpt_addr) )
|
||||
{
|
||||
hidd_class_driver[i].xfer_cb(port, event, xferred_bytes);
|
||||
hidd_class_driver[i].xfer_cb(rhport, event, xferred_bytes);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -57,15 +57,15 @@
|
||||
* @{ */
|
||||
|
||||
/** \brief Check if the interface is currently busy or not
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to host
|
||||
* \retval false if the interface is not busy meaning the stack successfully transferred data from/to host
|
||||
* \note This function is primarily used for polling/waiting result after \ref tusbd_hid_keyboard_send.
|
||||
*/
|
||||
bool tud_hid_keyboard_busy(uint8_t port);
|
||||
bool tud_hid_keyboard_busy(uint8_t rhport);
|
||||
|
||||
/** \brief Submit USB transfer
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
* \returns \ref tusb_error_t type to indicate success or error condition.
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
@ -75,7 +75,7 @@ bool tud_hid_keyboard_busy(uint8_t port);
|
||||
* \note This function is non-blocking and returns immediately. Data will be transferred when USB Host work with this interface.
|
||||
* The result of usb transfer will be reported by the interface's callback function
|
||||
*/
|
||||
tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_report);
|
||||
tusb_error_t tud_hid_keyboard_send(uint8_t rhport, hid_keyboard_report_t const *p_report);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION CALLBACK API
|
||||
@ -83,18 +83,18 @@ tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_
|
||||
|
||||
/** \brief Callback function that is invoked when an transferring event occurred
|
||||
* after invoking \ref tusbd_hid_keyboard_send
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] event an value from \ref tusb_event_t
|
||||
* \note event can be one of following
|
||||
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
|
||||
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
|
||||
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
|
||||
*/
|
||||
void tud_hid_keyboard_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void tud_hid_keyboard_cb(uint8_t rhport, tusb_event_t event, uint32_t xferred_bytes);
|
||||
|
||||
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_GET_REPORT
|
||||
* via control endpoint.
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[out] pp_report pointer to buffer that application need to update, value must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
* \param[in] requested_length number of bytes that host requested
|
||||
@ -105,18 +105,18 @@ void tud_hid_keyboard_cb(uint8_t port, tusb_event_t event, uint32_t xferred_byte
|
||||
* the completion of this control request will not be reported to application.
|
||||
* For Keyboard, USB host often uses this to turn on/off the LED for CAPLOCKS, NUMLOCK (\ref hid_keyboard_led_bm_t)
|
||||
*/
|
||||
uint16_t tud_hid_keyboard_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
|
||||
uint16_t tud_hid_keyboard_get_report_cb(uint8_t rhport, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
|
||||
|
||||
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_SET_REPORT
|
||||
* via control endpoint.
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[in] p_report_data buffer containing the report's data
|
||||
* \param[in] length number of bytes in the \a p_report_data
|
||||
* \note By the time this callback is invoked, the USB control transfer is already completed in the hardware side.
|
||||
* Application are free to handle data at its own will.
|
||||
*/
|
||||
void tud_hid_keyboard_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
|
||||
void tud_hid_keyboard_set_report_cb(uint8_t rhport, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
|
||||
|
||||
/** @} */
|
||||
/** @} */
|
||||
@ -130,15 +130,15 @@ void tud_hid_keyboard_set_report_cb(uint8_t port, hid_request_report_type_t repo
|
||||
* @{ */
|
||||
|
||||
/** \brief Check if the interface is currently busy or not
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to host
|
||||
* \retval false if the interface is not busy meaning the stack successfully transferred data from/to host
|
||||
* \note This function is primarily used for polling/waiting result after \ref tusbd_hid_mouse_send.
|
||||
*/
|
||||
bool tud_hid_mouse_is_busy(uint8_t port);
|
||||
bool tud_hid_mouse_is_busy(uint8_t rhport);
|
||||
|
||||
/** \brief Perform transfer queuing
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
* \returns \ref tusb_error_t type to indicate success or error condition.
|
||||
* \retval TUSB_ERROR_NONE on success
|
||||
@ -148,7 +148,7 @@ bool tud_hid_mouse_is_busy(uint8_t port);
|
||||
* \note This function is non-blocking and returns immediately. Data will be transferred when USB Host work with this interface.
|
||||
* The result of usb transfer will be reported by the interface's callback function
|
||||
*/
|
||||
tusb_error_t tud_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report);
|
||||
tusb_error_t tud_hid_mouse_send(uint8_t rhport, hid_mouse_report_t const *p_report);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION CALLBACK API
|
||||
@ -156,18 +156,18 @@ tusb_error_t tud_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report
|
||||
|
||||
/** \brief Callback function that is invoked when an transferring event occurred
|
||||
* after invoking \ref tusbd_hid_mouse_send
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] event an value from \ref tusb_event_t
|
||||
* \note event can be one of following
|
||||
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
|
||||
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
|
||||
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
|
||||
*/
|
||||
void tud_hid_mouse_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void tud_hid_mouse_cb(uint8_t rhport, tusb_event_t event, uint32_t xferred_bytes);
|
||||
|
||||
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_GET_REPORT
|
||||
* via control endpoint.
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[out] pp_report pointer to buffer that application need to update, value must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
* \param[in] requested_length number of bytes that host requested
|
||||
@ -177,18 +177,18 @@ void tud_hid_mouse_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes);
|
||||
* \note After this callback, the request is silently executed by the tinyusb stack, thus
|
||||
* the completion of this control request will not be reported to application
|
||||
*/
|
||||
uint16_t tud_hid_mouse_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
|
||||
uint16_t tud_hid_mouse_get_report_cb(uint8_t rhport, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
|
||||
|
||||
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_SET_REPORT
|
||||
* via control endpoint.
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
|
||||
* \param[in] p_report_data buffer containing the report's data
|
||||
* \param[in] length number of bytes in the \a p_report_data
|
||||
* \note By the time this callback is invoked, the USB control transfer is already completed in the hardware side.
|
||||
* Application are free to handle data at its own will.
|
||||
*/
|
||||
void tud_hid_mouse_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
|
||||
void tud_hid_mouse_set_report_cb(uint8_t rhport, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
|
||||
|
||||
/** @} */
|
||||
/** @} */
|
||||
@ -201,10 +201,10 @@ void tud_hid_mouse_set_report_cb(uint8_t port, hid_request_report_type_t report_
|
||||
#ifdef _TINY_USB_SOURCE_FILE_
|
||||
|
||||
void hidd_init(void);
|
||||
tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t hidd_control_request_st(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t hidd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void hidd_close(uint8_t port);
|
||||
tusb_error_t hidd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t hidd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request);
|
||||
tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void hidd_close(uint8_t rhport);
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -83,7 +83,7 @@ TUSB_CFG_ATTR_USBRAM STATIC_VAR mscd_interface_t mscd_data;
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc);
|
||||
static bool read10_write10_data_xfer(uint8_t rhport, mscd_interface_t* p_msc);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// USBD-CLASS API
|
||||
@ -93,12 +93,12 @@ void mscd_init(void)
|
||||
memclr_(&mscd_data, sizeof(mscd_interface_t));
|
||||
}
|
||||
|
||||
void mscd_close(uint8_t port)
|
||||
void mscd_close(uint8_t rhport)
|
||||
{
|
||||
memclr_(&mscd_data, sizeof(mscd_interface_t));
|
||||
}
|
||||
|
||||
tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
tusb_error_t mscd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
|
||||
{
|
||||
VERIFY( ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass &&
|
||||
MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ), TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL );
|
||||
@ -112,7 +112,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType &&
|
||||
TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
|
||||
TU_ASSERT( tusb_dcd_edpt_open(port, p_endpoint), TUSB_ERROR_DCD_FAILED );
|
||||
TU_ASSERT( tusb_dcd_edpt_open(rhport, p_endpoint), TUSB_ERROR_DCD_FAILED );
|
||||
|
||||
if ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK )
|
||||
{
|
||||
@ -130,12 +130,12 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
(*p_length) += sizeof(tusb_descriptor_interface_t) + 2*sizeof(tusb_descriptor_endpoint_t);
|
||||
|
||||
//------------- Queue Endpoint OUT for Command Block Wrapper -------------//
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_DCD_EDPT_XFER );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_DCD_EDPT_XFER );
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t mscd_control_request_st(uint8_t port, tusb_control_request_t const * p_request)
|
||||
tusb_error_t mscd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request)
|
||||
{
|
||||
OSAL_SUBTASK_BEGIN
|
||||
|
||||
@ -147,16 +147,16 @@ tusb_error_t mscd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
|
||||
if(MSC_REQUEST_RESET == p_request->bRequest)
|
||||
{
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
}
|
||||
else if (MSC_REQUEST_GET_MAX_LUN == p_request->bRequest)
|
||||
{
|
||||
// Note: lpc11/13u need xfer data's address to be aligned 64 -> make use of scsi_data instead of using max_lun directly
|
||||
p_msc->scsi_data[0] = p_msc->max_lun;
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, p_request->bmRequestType_bit.direction, p_msc->scsi_data, 1), err);
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, p_request->bmRequestType_bit.direction, p_msc->scsi_data, 1), err);
|
||||
}else
|
||||
{
|
||||
usbd_control_stall(port); // stall unsupported request
|
||||
usbd_control_stall(rhport); // stall unsupported request
|
||||
}
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
@ -165,7 +165,7 @@ tusb_error_t mscd_control_request_st(uint8_t port, tusb_control_request_t const
|
||||
//--------------------------------------------------------------------+
|
||||
// MSCD APPLICATION CALLBACK
|
||||
//--------------------------------------------------------------------+
|
||||
tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
mscd_interface_t* const p_msc = &mscd_data;
|
||||
msc_cbw_t* const p_cbw = &p_msc->cbw;
|
||||
@ -195,7 +195,7 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
|
||||
if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
|
||||
{
|
||||
// Read10 & Write10 data len is same as CBW's xfer bytes
|
||||
read10_write10_data_xfer(port, p_msc);
|
||||
read10_write10_data_xfer(rhport, p_msc);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -205,7 +205,7 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
|
||||
// TODO SCSI data out transfer is not yet supported
|
||||
ASSERT_FALSE( p_cbw->xfer_bytes > 0 && !BIT_TEST_(p_cbw->dir, 7), TUSB_ERROR_NOT_SUPPORTED_YET);
|
||||
|
||||
p_csw->status = tud_msc_scsi_cb(port, p_cbw->lun, p_cbw->command, &p_buffer, &p_msc->data_len);
|
||||
p_csw->status = tud_msc_scsi_cb(rhport, p_cbw->lun, p_cbw->command, &p_buffer, &p_msc->data_len);
|
||||
|
||||
if ( p_cbw->xfer_bytes == 0)
|
||||
{
|
||||
@ -223,14 +223,14 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
|
||||
if ( p_buffer == NULL || p_msc->data_len == 0 )
|
||||
{
|
||||
// application does not provide data to response --> possibly unsupported SCSI command
|
||||
tusb_dcd_edpt_stall(port, ep_data);
|
||||
tusb_dcd_edpt_stall(rhport, ep_data);
|
||||
p_csw->status = MSC_CSW_STATUS_FAILED;
|
||||
|
||||
p_msc->stage = MSC_STAGE_STATUS;
|
||||
}else
|
||||
{
|
||||
memcpy(p_msc->scsi_data, p_buffer, p_msc->data_len);
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_data, p_msc->scsi_data, p_msc->data_len), TUSB_ERROR_DCD_EDPT_XFER );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, ep_data, p_msc->scsi_data, p_msc->data_len), TUSB_ERROR_DCD_EDPT_XFER );
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -247,7 +247,7 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
|
||||
else if ( (SCSI_CMD_READ_10 == p_cbw->command[0]) || (SCSI_CMD_WRITE_10 == p_cbw->command[0]) )
|
||||
{
|
||||
// Can be executed several times e.g write 8K bytes (several flash write)
|
||||
read10_write10_data_xfer(port, p_msc);
|
||||
read10_write10_data_xfer(rhport, p_msc);
|
||||
}else
|
||||
{
|
||||
// unlikely error
|
||||
@ -264,17 +264,17 @@ tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t ep_addr, tusb_event_t event, uin
|
||||
// Move to default CMD stage after sending status
|
||||
p_msc->stage = MSC_STAGE_CMD;
|
||||
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)) );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)) );
|
||||
|
||||
//------------- Queue the next CBW -------------//
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)) );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)) );
|
||||
}
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
// return true if data phase is complete, false if not yet complete
|
||||
static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
|
||||
static bool read10_write10_data_xfer(uint8_t rhport, mscd_interface_t* p_msc)
|
||||
{
|
||||
msc_cbw_t* const p_cbw = &p_msc->cbw;
|
||||
msc_csw_t* const p_csw = &p_msc->csw;
|
||||
@ -297,10 +297,10 @@ static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
|
||||
|
||||
if (SCSI_CMD_READ_10 == p_cbw->command[0])
|
||||
{
|
||||
xfer_block = tud_msc_read10_cb (port, p_cbw->lun, &p_buffer, lba, block_count);
|
||||
xfer_block = tud_msc_read10_cb (rhport, p_cbw->lun, &p_buffer, lba, block_count);
|
||||
}else
|
||||
{
|
||||
xfer_block = tud_msc_write10_cb(port, p_cbw->lun, &p_buffer, lba, block_count);
|
||||
xfer_block = tud_msc_write10_cb(rhport, p_cbw->lun, &p_buffer, lba, block_count);
|
||||
}
|
||||
|
||||
xfer_block = min16_of(xfer_block, block_count);
|
||||
@ -311,12 +311,12 @@ static bool read10_write10_data_xfer(uint8_t port, mscd_interface_t* p_msc)
|
||||
p_csw->data_residue = p_cbw->xfer_bytes;
|
||||
p_csw->status = MSC_CSW_STATUS_FAILED;
|
||||
|
||||
tusb_dcd_edpt_stall(port, ep_data);
|
||||
tusb_dcd_edpt_stall(rhport, ep_data);
|
||||
|
||||
return true;
|
||||
}else
|
||||
{
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(port, ep_data, p_buffer, xfer_block * block_size) );
|
||||
TU_ASSERT( tusb_dcd_edpt_xfer(rhport, ep_data, p_buffer, xfer_block * block_size) );
|
||||
}
|
||||
|
||||
return true;
|
||||
|
@ -61,7 +61,7 @@
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
/** \brief Callback that is invoked when tinyusb stack received \ref SCSI_CMD_READ_10 command from host
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[out] pp_buffer Pointer to buffer which application need to update with the response data's address.
|
||||
* Must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
@ -76,10 +76,10 @@
|
||||
* \n\n Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
|
||||
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
|
||||
*/
|
||||
uint16_t tud_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
|
||||
uint16_t tud_msc_read10_cb (uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
|
||||
|
||||
/** \brief Callback that is invoked when tinyusb stack received \ref SCSI_CMD_WRITE_10 command from host
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[out] pp_buffer Pointer to buffer which application need to update with the address to hold data from host
|
||||
* Must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
|
||||
@ -94,12 +94,12 @@ uint16_t tud_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint32_
|
||||
* \n\n Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
|
||||
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
|
||||
*/
|
||||
uint16_t tud_msc_write10_cb(uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
|
||||
uint16_t tud_msc_write10_cb(uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
|
||||
|
||||
// p_length [in,out] allocated/maximum length, application update with actual length
|
||||
/** \brief Callback that is invoked when tinyusb stack received an SCSI command other than \ref SCSI_CMD_WRITE_10 and
|
||||
* \ref SCSI_CMD_READ_10 command from host
|
||||
* \param[in] port USB Controller ID
|
||||
* \param[in] rhport USB Controller ID
|
||||
* \param[in] lun Targeted Logical Unit
|
||||
* \param[in] scsi_cmd SCSI command contents, application should examine this command block to know which command host requested
|
||||
* \param[out] pp_buffer Pointer to buffer which application need to update with the address to transfer data with host.
|
||||
@ -111,7 +111,7 @@ uint16_t tud_msc_write10_cb(uint8_t port, uint8_t lun, void** pp_buffer, uint32_
|
||||
* \note Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
|
||||
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
|
||||
*/
|
||||
msc_csw_status_t tud_msc_scsi_cb (uint8_t port, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length);
|
||||
msc_csw_status_t tud_msc_scsi_cb (uint8_t rhport, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length);
|
||||
|
||||
/** @} */
|
||||
/** @} */
|
||||
@ -122,10 +122,10 @@ msc_csw_status_t tud_msc_scsi_cb (uint8_t port, uint8_t lun, uint8_t scsi_cmd[16
|
||||
#ifdef _TINY_USB_SOURCE_FILE_
|
||||
|
||||
void mscd_init(void);
|
||||
tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t mscd_control_request_st(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t mscd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void mscd_close(uint8_t port);
|
||||
tusb_error_t mscd_open(uint8_t rhport, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t mscd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request);
|
||||
tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void mscd_close(uint8_t rhport);
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -164,28 +164,28 @@ static void queue_xfer_in_next_td(uint8_t ep_id);
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROLLER API
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_connect(uint8_t port)
|
||||
void tusb_dcd_connect(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK;
|
||||
}
|
||||
|
||||
void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
|
||||
void tusb_dcd_set_config(uint8_t rhport, uint8_t config_num)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
|
||||
void tusb_dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
LPC_USB->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK;
|
||||
LPC_USB->DEVCMDSTAT |= dev_addr;
|
||||
}
|
||||
|
||||
bool tusb_dcd_init(uint8_t port)
|
||||
bool tusb_dcd_init(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
LPC_USB->EPLISTSTART = (uint32_t) dcd_data.qhd;
|
||||
LPC_USB->DATABUFSTART = 0x20000000; // only SRAM1 & USB RAM can be used for transfer
|
||||
@ -250,7 +250,7 @@ static void endpoint_non_control_isr(uint32_t int_status)
|
||||
{
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = 0,
|
||||
.rhport = 0,
|
||||
.index = ep_id,
|
||||
.class_code = dcd_data.class_code[ep_id]
|
||||
};
|
||||
@ -288,7 +288,7 @@ static void endpoint_control_isr(uint32_t int_status)
|
||||
|
||||
if ( BIT_TEST_(dcd_data.current_ioc, ep_id) )
|
||||
{
|
||||
edpt_hdl_t edpt_hdl = { .port = 0 };
|
||||
edpt_hdl_t edpt_hdl = { .rhport = 0 };
|
||||
|
||||
dcd_data.current_ioc = BIT_CLR_(dcd_data.current_ioc, ep_id);
|
||||
|
||||
@ -298,9 +298,9 @@ static void endpoint_control_isr(uint32_t int_status)
|
||||
}
|
||||
}
|
||||
|
||||
void hal_dcd_isr(uint8_t port)
|
||||
void hal_dcd_isr(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
uint32_t const int_enable = LPC_USB->INTEN;
|
||||
uint32_t const int_status = LPC_USB->INTSTAT & int_enable;
|
||||
@ -351,7 +351,7 @@ void hal_dcd_isr(uint8_t port)
|
||||
if ( BIT_TEST_(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
|
||||
{ // received control request from host
|
||||
// copy setup request & acknowledge so that the next setup can be received by hw
|
||||
tusb_dcd_setup_received(port, (uint8_t*)&dcd_data.setup_request);
|
||||
tusb_dcd_setup_received(rhport, (uint8_t*)&dcd_data.setup_request);
|
||||
|
||||
// NXP control flowchart clear Active & Stall on both Control IN/OUT endpoints
|
||||
dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 0;
|
||||
@ -375,16 +375,16 @@ void hal_dcd_isr(uint8_t port)
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROL PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_control_stall(uint8_t port)
|
||||
void tusb_dcd_control_stall(uint8_t rhport)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
// TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around
|
||||
dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 1;
|
||||
}
|
||||
|
||||
bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
|
||||
bool tusb_dcd_control_xfer(uint8_t rhport, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
|
||||
// determine Endpoint where Data & Status phase occurred (IN or OUT)
|
||||
uint8_t const ep_data = (dir == TUSB_DIR_IN) ? 1 : 0;
|
||||
@ -440,7 +440,7 @@ bool dcd_pipe_is_stalled(edpt_hdl_t edpt_hdl)
|
||||
return dcd_data.qhd[edpt_hdl.index][0].stall || dcd_data.qhd[edpt_hdl.index][1].stall;
|
||||
}
|
||||
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr)
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t rhport, uint8_t edpt_addr)
|
||||
{
|
||||
uint8_t ep_id = edpt_addr2phy(edpt_addr);
|
||||
// uint8_t active_buffer = BIT_TEST_(LPC_USB->EPINUSE, ep_id) ? 1 : 0;
|
||||
@ -458,9 +458,9 @@ void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr)
|
||||
}
|
||||
}
|
||||
|
||||
edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
edpt_hdl_t tusb_dcd_edpt_open(uint8_t rhport, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
edpt_hdl_t const null_handle = { 0 };
|
||||
|
||||
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; // TODO not support ISO yet
|
||||
@ -485,7 +485,7 @@ edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p
|
||||
|
||||
return (edpt_hdl_t)
|
||||
{
|
||||
.port = 0,
|
||||
.rhport = 0,
|
||||
.index = ep_id,
|
||||
.class_code = class_code
|
||||
};
|
||||
|
@ -113,15 +113,15 @@ enum { USBD_CLASS_DRIVER_COUNT = sizeof(usbd_class_drivers) / sizeof(usbd_class_
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
static tusb_error_t proc_set_config_req(uint8_t port, uint8_t config_number);
|
||||
static uint16_t get_descriptor(uint8_t port, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer);
|
||||
static tusb_error_t proc_set_config_req(uint8_t rhport, uint8_t config_number);
|
||||
static uint16_t get_descriptor(uint8_t rhport, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION INTERFACE
|
||||
//--------------------------------------------------------------------+
|
||||
bool tud_n_mounted(uint8_t port)
|
||||
bool tud_n_mounted(uint8_t rhport)
|
||||
{
|
||||
return usbd_devices[port].state == TUSB_DEVICE_STATE_CONFIGURED;
|
||||
return usbd_devices[rhport].state == TUSB_DEVICE_STATE_CONFIGURED;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
@ -140,7 +140,7 @@ typedef enum
|
||||
|
||||
typedef struct ATTR_ALIGNED(4)
|
||||
{
|
||||
uint8_t port;
|
||||
uint8_t rhport;
|
||||
uint8_t event_id;
|
||||
uint8_t sub_event_id;
|
||||
uint8_t reserved;
|
||||
@ -172,7 +172,7 @@ static osal_queue_t usbd_queue_hdl;
|
||||
//--------------------------------------------------------------------+
|
||||
// IMPLEMENTATION
|
||||
//--------------------------------------------------------------------+
|
||||
static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t const * const p_request);
|
||||
static tusb_error_t proc_control_request_st(uint8_t rhport, tusb_control_request_t const * const p_request);
|
||||
static tusb_error_t usbd_main_stk(void);
|
||||
|
||||
tusb_error_t usbd_init (void)
|
||||
@ -255,7 +255,7 @@ static tusb_error_t usbd_main_stk(void)
|
||||
|
||||
if ( USBD_EVENTID_SETUP_RECEIVED == event.event_id )
|
||||
{
|
||||
STASK_INVOKE( proc_control_request_st(event.port, &event.setup_received), error );
|
||||
STASK_INVOKE( proc_control_request_st(event.rhport, &event.setup_received), error );
|
||||
}else if (USBD_EVENTID_XFER_DONE == event.event_id)
|
||||
{
|
||||
// Call class handling function. Those doest not own the endpoint should check and return
|
||||
@ -263,7 +263,7 @@ static tusb_error_t usbd_main_stk(void)
|
||||
{
|
||||
if ( usbd_class_drivers[class_code].xfer_cb )
|
||||
{
|
||||
usbd_class_drivers[class_code].xfer_cb( event.port, event.xfer_done.ep_addr, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
|
||||
usbd_class_drivers[class_code].xfer_cb( event.rhport, event.xfer_done.ep_addr, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
|
||||
}
|
||||
}
|
||||
}else if (USBD_EVENTID_SOF == event.event_id)
|
||||
@ -272,7 +272,7 @@ static tusb_error_t usbd_main_stk(void)
|
||||
{
|
||||
if ( usbd_class_drivers[class_code].sof )
|
||||
{
|
||||
usbd_class_drivers[class_code].sof( event.port );
|
||||
usbd_class_drivers[class_code].sof( event.rhport );
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -287,7 +287,7 @@ static tusb_error_t usbd_main_stk(void)
|
||||
//--------------------------------------------------------------------+
|
||||
// CONTROL REQUEST
|
||||
//--------------------------------------------------------------------+
|
||||
tusb_error_t usbd_control_xfer_st(uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
|
||||
tusb_error_t usbd_control_xfer_st(uint8_t rhport, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
|
||||
{
|
||||
OSAL_SUBTASK_BEGIN
|
||||
|
||||
@ -296,7 +296,7 @@ tusb_error_t usbd_control_xfer_st(uint8_t port, tusb_dir_t dir, uint8_t * buffer
|
||||
// Data
|
||||
if ( length )
|
||||
{
|
||||
tusb_dcd_control_xfer(port, dir, buffer, length);
|
||||
tusb_dcd_control_xfer(rhport, dir, buffer, length);
|
||||
osal_semaphore_wait( usbd_control_xfer_sem_hdl, 100, &error );
|
||||
|
||||
STASK_ASSERT_STATUS( error );
|
||||
@ -305,12 +305,12 @@ tusb_error_t usbd_control_xfer_st(uint8_t port, tusb_dir_t dir, uint8_t * buffer
|
||||
// Status opposite direction with Zero Length
|
||||
// No need to wait for status to complete therefore
|
||||
// status phase must not call tusb_dcd_control_complete/tusb_dcd_xfer_complete
|
||||
usbd_control_status(port, dir);
|
||||
usbd_control_status(rhport, dir);
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
}
|
||||
|
||||
static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t const * const p_request)
|
||||
static tusb_error_t proc_control_request_st(uint8_t rhport, tusb_control_request_t const * const p_request)
|
||||
{
|
||||
OSAL_SUBTASK_BEGIN
|
||||
|
||||
@ -324,33 +324,33 @@ static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t
|
||||
if ( TUSB_REQ_GET_DESCRIPTOR == p_request->bRequest )
|
||||
{
|
||||
uint8_t const * buffer = NULL;
|
||||
uint16_t const len = get_descriptor(port, p_request, &buffer);
|
||||
uint16_t const len = get_descriptor(rhport, p_request, &buffer);
|
||||
|
||||
if ( len )
|
||||
{
|
||||
STASK_INVOKE( usbd_control_xfer_st(port, p_request->bmRequestType_bit.direction, (uint8_t*) buffer, len ), error );
|
||||
STASK_INVOKE( usbd_control_xfer_st(rhport, p_request->bmRequestType_bit.direction, (uint8_t*) buffer, len ), error );
|
||||
}else
|
||||
{
|
||||
usbd_control_stall(port); // stall unsupported descriptor
|
||||
usbd_control_stall(rhport); // stall unsupported descriptor
|
||||
}
|
||||
}
|
||||
else if ( TUSB_REQ_SET_ADDRESS == p_request->bRequest )
|
||||
{
|
||||
tusb_dcd_set_address(port, (uint8_t) p_request->wValue);
|
||||
usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED;
|
||||
tusb_dcd_set_address(rhport, (uint8_t) p_request->wValue);
|
||||
usbd_devices[rhport].state = TUSB_DEVICE_STATE_ADDRESSED;
|
||||
|
||||
#ifndef NRF52840_XXAA // nrf52 auto handle set address, we must not return status
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
#endif
|
||||
}
|
||||
else if ( TUSB_REQ_SET_CONFIGURATION == p_request->bRequest )
|
||||
{
|
||||
proc_set_config_req(port, (uint8_t) p_request->wValue);
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
proc_set_config_req(rhport, (uint8_t) p_request->wValue);
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
}
|
||||
else
|
||||
{
|
||||
usbd_control_stall(port); // Stall unsupported request
|
||||
usbd_control_stall(rhport); // Stall unsupported request
|
||||
}
|
||||
}
|
||||
|
||||
@ -359,16 +359,16 @@ static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t
|
||||
{
|
||||
static uint8_t class_code;
|
||||
|
||||
class_code = usbd_devices[port].interface2class[ u16_low_u8(p_request->wIndex) ];
|
||||
class_code = usbd_devices[rhport].interface2class[ u16_low_u8(p_request->wIndex) ];
|
||||
|
||||
// TODO [Custom] TUSB_CLASS_DIAGNOSTIC, vendor etc ...
|
||||
if ( (class_code > 0) && (class_code < USBD_CLASS_DRIVER_COUNT) &&
|
||||
usbd_class_drivers[class_code].control_request_st )
|
||||
{
|
||||
STASK_INVOKE( usbd_class_drivers[class_code].control_request_st(port, p_request), error );
|
||||
STASK_INVOKE( usbd_class_drivers[class_code].control_request_st(rhport, p_request), error );
|
||||
}else
|
||||
{
|
||||
usbd_control_stall(port); // Stall unsupported request
|
||||
usbd_control_stall(rhport); // Stall unsupported request
|
||||
}
|
||||
}
|
||||
|
||||
@ -378,18 +378,18 @@ static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t
|
||||
{
|
||||
if (TUSB_REQ_CLEAR_FEATURE == p_request->bRequest )
|
||||
{
|
||||
tusb_dcd_edpt_clear_stall(port, u16_low_u8(p_request->wIndex) );
|
||||
usbd_control_status(port, p_request->bmRequestType_bit.direction);
|
||||
tusb_dcd_edpt_clear_stall(rhport, u16_low_u8(p_request->wIndex) );
|
||||
usbd_control_status(rhport, p_request->bmRequestType_bit.direction);
|
||||
} else
|
||||
{
|
||||
usbd_control_stall(port); // Stall unsupported request
|
||||
usbd_control_stall(rhport); // Stall unsupported request
|
||||
}
|
||||
}
|
||||
|
||||
//------------- Unsupported Request -------------//
|
||||
else
|
||||
{
|
||||
usbd_control_stall(port); // Stall unsupported request
|
||||
usbd_control_stall(rhport); // Stall unsupported request
|
||||
}
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
@ -397,10 +397,10 @@ static tusb_error_t proc_control_request_st(uint8_t port, tusb_control_request_t
|
||||
|
||||
// TODO Host (windows) can get HID report descriptor before set configured
|
||||
// may need to open interface before set configured
|
||||
static tusb_error_t proc_set_config_req(uint8_t port, uint8_t config_number)
|
||||
static tusb_error_t proc_set_config_req(uint8_t rhport, uint8_t config_number)
|
||||
{
|
||||
tusb_dcd_set_config(port, config_number);
|
||||
usbd_devices[port].state = TUSB_DEVICE_STATE_CONFIGURED;
|
||||
tusb_dcd_set_config(rhport, config_number);
|
||||
usbd_devices[rhport].state = TUSB_DEVICE_STATE_CONFIGURED;
|
||||
|
||||
//------------- parse configuration & open drivers -------------//
|
||||
uint8_t const * p_desc_config = tusbd_descriptor_pointers.p_configuration;
|
||||
@ -423,12 +423,12 @@ static tusb_error_t proc_set_config_req(uint8_t port, uint8_t config_number)
|
||||
class_index = p_desc_interface->bInterfaceClass;
|
||||
|
||||
ASSERT( class_index != 0 && class_index < USBD_CLASS_DRIVER_COUNT && usbd_class_drivers[class_index].open != NULL, TUSB_ERROR_NOT_SUPPORTED_YET );
|
||||
ASSERT( 0 == usbd_devices[port].interface2class[p_desc_interface->bInterfaceNumber], TUSB_ERROR_FAILED); // duplicate interface number TODO alternate setting
|
||||
ASSERT( 0 == usbd_devices[rhport].interface2class[p_desc_interface->bInterfaceNumber], TUSB_ERROR_FAILED); // duplicate interface number TODO alternate setting
|
||||
|
||||
usbd_devices[port].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
|
||||
usbd_devices[rhport].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
|
||||
|
||||
uint16_t length=0;
|
||||
ASSERT_STATUS( usbd_class_drivers[class_index].open( port, p_desc_interface, &length ) );
|
||||
ASSERT_STATUS( usbd_class_drivers[class_index].open( rhport, p_desc_interface, &length ) );
|
||||
|
||||
ASSERT( length >= sizeof(tusb_descriptor_interface_t), TUSB_ERROR_FAILED );
|
||||
p_desc += length;
|
||||
@ -436,12 +436,12 @@ static tusb_error_t proc_set_config_req(uint8_t port, uint8_t config_number)
|
||||
}
|
||||
|
||||
// invoke callback
|
||||
tud_mount_cb(port);
|
||||
tud_mount_cb(rhport);
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
static uint16_t get_descriptor(uint8_t port, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer)
|
||||
static uint16_t get_descriptor(uint8_t rhport, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer)
|
||||
{
|
||||
tusb_desc_type_t const desc_type = (tusb_desc_type_t) u16_high_u8(p_request->wValue);
|
||||
uint8_t const desc_index = u16_low_u8( p_request->wValue );
|
||||
@ -496,28 +496,28 @@ static uint16_t get_descriptor(uint8_t port, tusb_control_request_t const * cons
|
||||
//--------------------------------------------------------------------+
|
||||
// USBD-DCD Callback API
|
||||
//--------------------------------------------------------------------+
|
||||
void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
|
||||
void tusb_dcd_bus_event(uint8_t rhport, usbd_bus_event_type_t bus_event)
|
||||
{
|
||||
switch(bus_event)
|
||||
{
|
||||
case USBD_BUS_EVENT_RESET :
|
||||
memclr_(&usbd_devices[port], sizeof(usbd_device_info_t));
|
||||
memclr_(&usbd_devices[rhport], sizeof(usbd_device_info_t));
|
||||
osal_queue_flush(usbd_queue_hdl);
|
||||
osal_semaphore_reset(usbd_control_xfer_sem_hdl);
|
||||
for (uint8_t class_code = TUSB_CLASS_AUDIO; class_code < USBD_CLASS_DRIVER_COUNT; class_code++)
|
||||
{
|
||||
if ( usbd_class_drivers[class_code].close ) usbd_class_drivers[class_code].close( port );
|
||||
if ( usbd_class_drivers[class_code].close ) usbd_class_drivers[class_code].close( rhport );
|
||||
}
|
||||
|
||||
// invoke callback
|
||||
tud_umount_cb(port);
|
||||
tud_umount_cb(rhport);
|
||||
break;
|
||||
|
||||
case USBD_BUS_EVENT_SOF:
|
||||
{
|
||||
usbd_task_event_t task_event =
|
||||
{
|
||||
.port = port,
|
||||
.rhport = rhport,
|
||||
.event_id = USBD_EVENTID_SOF,
|
||||
};
|
||||
osal_queue_send(usbd_queue_hdl, &task_event);
|
||||
@ -527,18 +527,18 @@ void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
|
||||
case USBD_BUS_EVENT_UNPLUGGED : break;
|
||||
|
||||
case USBD_BUS_EVENT_SUSPENDED:
|
||||
usbd_devices[port].state = TUSB_DEVICE_STATE_SUSPENDED;
|
||||
usbd_devices[rhport].state = TUSB_DEVICE_STATE_SUSPENDED;
|
||||
break;
|
||||
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
||||
void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request)
|
||||
void tusb_dcd_setup_received(uint8_t rhport, uint8_t const* p_request)
|
||||
{
|
||||
usbd_task_event_t task_event =
|
||||
{
|
||||
.port = port,
|
||||
.rhport = rhport,
|
||||
.event_id = USBD_EVENTID_SETUP_RECEIVED,
|
||||
};
|
||||
|
||||
@ -546,11 +546,11 @@ void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request)
|
||||
osal_queue_send(usbd_queue_hdl, &task_event);
|
||||
}
|
||||
|
||||
void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded)
|
||||
void tusb_dcd_xfer_complete(uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded)
|
||||
{
|
||||
if (ep_addr == 0 )
|
||||
{
|
||||
(void) port;
|
||||
(void) rhport;
|
||||
(void) xferred_bytes;
|
||||
(void) succeeded;
|
||||
|
||||
@ -560,7 +560,7 @@ void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_byte
|
||||
{
|
||||
usbd_task_event_t task_event =
|
||||
{
|
||||
.port = port,
|
||||
.rhport = rhport,
|
||||
.event_id = USBD_EVENTID_XFER_DONE,
|
||||
.sub_event_id = succeeded ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR
|
||||
};
|
||||
|
@ -72,11 +72,11 @@ extern tusbd_descriptor_pointer_t tusbd_descriptor_pointers;
|
||||
|
||||
typedef struct {
|
||||
void (* init) (void);
|
||||
tusb_error_t (* open)(uint8_t port, tusb_descriptor_interface_t const * desc_intf, uint16_t* p_length);
|
||||
tusb_error_t (* control_request_st) (uint8_t port, tusb_control_request_t const *);
|
||||
tusb_error_t (* xfer_cb) (uint8_t port, uint8_t ep_addr, tusb_event_t, uint32_t);
|
||||
tusb_error_t (* open)(uint8_t rhport, tusb_descriptor_interface_t const * desc_intf, uint16_t* p_length);
|
||||
tusb_error_t (* control_request_st) (uint8_t rhport, tusb_control_request_t const *);
|
||||
tusb_error_t (* xfer_cb) (uint8_t rhport, uint8_t ep_addr, tusb_event_t, uint32_t);
|
||||
// void (* routine)(void);
|
||||
void (* sof)(uint8_t port);
|
||||
void (* sof)(uint8_t rhport);
|
||||
void (* close) (uint8_t);
|
||||
} usbd_class_driver_t;
|
||||
|
||||
@ -94,7 +94,7 @@ typedef struct {
|
||||
//--------------------------------------------------------------------+
|
||||
// APPLICATION API
|
||||
//--------------------------------------------------------------------+
|
||||
bool tud_n_mounted(uint8_t port);
|
||||
bool tud_n_mounted(uint8_t rhport);
|
||||
|
||||
static inline bool tud_mounted(void)
|
||||
{
|
||||
@ -104,18 +104,18 @@ static inline bool tud_mounted(void)
|
||||
|
||||
/*------------- Callback -------------*/
|
||||
/** \brief Callback function that will be invoked device is mounted (configured) by USB host
|
||||
* \param[in] port USB Controller ID of the interface
|
||||
* \param[in] rhport USB Controller ID of the interface
|
||||
* \note This callback should be used by Application to \b set-up application data
|
||||
*/
|
||||
void tud_mount_cb(uint8_t port);
|
||||
void tud_mount_cb(uint8_t rhport);
|
||||
|
||||
/** \brief Callback function that will be invoked when device is unmounted (bus reset/unplugged)
|
||||
* \param[in] port USB Controller ID of the interface
|
||||
* \param[in] rhport USB Controller ID of the interface
|
||||
* \note This callback should be used by Application to \b tear-down application data
|
||||
*/
|
||||
void tud_umount_cb(uint8_t port);
|
||||
void tud_umount_cb(uint8_t rhport);
|
||||
|
||||
//void tud_device_suspended_cb(uint8_t port);
|
||||
//void tud_device_suspended_cb(uint8_t rhport);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
@ -50,19 +50,19 @@ tusb_error_t usbd_init(void);
|
||||
void usbd_task( void* param);
|
||||
|
||||
// Carry out Data and Status stage of control transfer
|
||||
tusb_error_t usbd_control_xfer_st(uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
|
||||
tusb_error_t usbd_control_xfer_st(uint8_t rhport, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
|
||||
|
||||
// Return Status of control transfer
|
||||
// Note dir is value of direction bit in setup packet (aka DATA stage direction)
|
||||
static inline bool usbd_control_status(uint8_t port, tusb_dir_t dir)
|
||||
static inline bool usbd_control_status(uint8_t rhport, tusb_dir_t dir)
|
||||
{
|
||||
// status direction is reversed to one in the setup packet
|
||||
return tusb_dcd_control_xfer(port, 1-dir, NULL, 0);
|
||||
return tusb_dcd_control_xfer(rhport, 1-dir, NULL, 0);
|
||||
}
|
||||
|
||||
static inline void usbd_control_stall(uint8_t port)
|
||||
static inline void usbd_control_stall(uint8_t rhport)
|
||||
{
|
||||
tusb_dcd_edpt_stall(port, 0);
|
||||
tusb_dcd_edpt_stall(rhport, 0);
|
||||
}
|
||||
|
||||
|
||||
|
@ -61,39 +61,39 @@ typedef enum
|
||||
/*------------------------------------------------------------------*/
|
||||
/* Controller API
|
||||
*------------------------------------------------------------------*/
|
||||
bool tusb_dcd_init (uint8_t port);
|
||||
void tusb_dcd_connect (uint8_t port);
|
||||
void tusb_dcd_disconnect (uint8_t port);
|
||||
void tusb_dcd_set_address (uint8_t port, uint8_t dev_addr);
|
||||
void tusb_dcd_set_config (uint8_t port, uint8_t config_num);
|
||||
bool tusb_dcd_init (uint8_t rhport);
|
||||
void tusb_dcd_connect (uint8_t rhport);
|
||||
void tusb_dcd_disconnect (uint8_t rhport);
|
||||
void tusb_dcd_set_address (uint8_t rhport, uint8_t dev_addr);
|
||||
void tusb_dcd_set_config (uint8_t rhport, uint8_t config_num);
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* Event Function
|
||||
* Called by DCD to notify USBD
|
||||
*------------------------------------------------------------------*/
|
||||
void tusb_dcd_bus_event (uint8_t port, usbd_bus_event_type_t bus_event);
|
||||
void tusb_dcd_setup_received (uint8_t port, uint8_t const* p_request);
|
||||
void tusb_dcd_xfer_complete (uint8_t port, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded);
|
||||
void tusb_dcd_bus_event (uint8_t rhport, usbd_bus_event_type_t bus_event);
|
||||
void tusb_dcd_setup_received (uint8_t rhport, uint8_t const* p_request);
|
||||
void tusb_dcd_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded);
|
||||
|
||||
static inline void tusb_dcd_control_complete(uint8_t port)
|
||||
static inline void tusb_dcd_control_complete(uint8_t rhport)
|
||||
{
|
||||
// TODO all control complete is successful !!
|
||||
tusb_dcd_xfer_complete(port, 0, 0, true);
|
||||
tusb_dcd_xfer_complete(rhport, 0, 0, true);
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* Endpoint API
|
||||
*------------------------------------------------------------------*/
|
||||
//------------- Control Endpoint -------------//
|
||||
bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
|
||||
bool tusb_dcd_control_xfer (uint8_t rhport, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
|
||||
|
||||
//------------- Other Endpoints -------------//
|
||||
bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
|
||||
bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
|
||||
bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr);
|
||||
bool tusb_dcd_edpt_open (uint8_t rhport, tusb_descriptor_endpoint_t const * p_endpoint_desc);
|
||||
bool tusb_dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
|
||||
bool tusb_dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr);
|
||||
|
||||
void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr);
|
||||
void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr);
|
||||
void tusb_dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr);
|
||||
void tusb_dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
@ -66,14 +66,14 @@ extern "C" {
|
||||
bool tusb_hal_init(void);
|
||||
|
||||
/** \brief Enable USB Interrupt on a specific USB Controller
|
||||
* \param[in] port is a zero-based index to identify USB controller's ID
|
||||
* \param[in] rhport is a zero-based index to identify USB controller's ID
|
||||
*/
|
||||
void tusb_hal_int_enable(uint8_t port);
|
||||
void tusb_hal_int_enable(uint8_t rhport);
|
||||
|
||||
/** \brief Disable USB Interrupt on a specific USB Controller
|
||||
* \param[in] port is a zero-based index to identify USB controller's ID
|
||||
* \param[in] rhport is a zero-based index to identify USB controller's ID
|
||||
*/
|
||||
void tusb_hal_int_disable(uint8_t port);
|
||||
void tusb_hal_int_disable(uint8_t rhport);
|
||||
|
||||
uint32_t tusb_hal_tick_get(void);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user