mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
Merge pull request #1183 from kkitayam/add_msp_exp432e401y
Add support for TI MSP-EXP432E401Y
This commit is contained in:
Ha Thach
GitHub
commit
6f59a2ce6e
2
.github/workflows/build_arm.yml
vendored
2
.github/workflows/build_arm.yml
vendored
@ -45,6 +45,7 @@ jobs:
|
||||
- 'lpc54'
|
||||
- 'lpc55'
|
||||
- 'mm32'
|
||||
- 'msp432e4'
|
||||
- 'nrf'
|
||||
- 'rp2040'
|
||||
- 'samd11'
|
||||
@ -57,6 +58,7 @@ jobs:
|
||||
- 'stm32f7'
|
||||
- 'stm32h7'
|
||||
- 'stm32l4'
|
||||
- 'tm4c123'
|
||||
- 'xmc4000'
|
||||
steps:
|
||||
- name: Setup Python
|
||||
|
||||
@ -12,3 +12,10 @@ ATTRS{idVendor}=="cafe", MODE="0666", GROUP="dialout"
|
||||
|
||||
# Rule to blacklist TinyUSB example from being manipulated by ModemManager.
|
||||
SUBSYSTEMS=="usb", ATTRS{idVendor}=="cafe", ENV{ID_MM_DEVICE_IGNORE}="1"
|
||||
|
||||
# Xplained Pro SamG55 Device
|
||||
SUBSYSTEMS=="usb", ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="2111", MODE="0666", GROUP="users", ENV{ID_MM_DEVICE_IGNORE}="1"
|
||||
SUBSYSTEMS=="tty", ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="2111", MODE="0666", GROUP="users", ENV{ID_MM_DEVICE_IGNORE}="1"
|
||||
|
||||
# TI Stellaris/Tiva-C Launchpad ICDI
|
||||
SUBSYSTEM=="usb", ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="0666"
|
||||
|
||||
4
examples/device/dfu/.skip.MCU_TM4C123
Normal file
4
examples/device/dfu/.skip.MCU_TM4C123
Normal file
@ -0,0 +1,4 @@
|
||||
LINK _build/ek-tm4c123gxl/dfu.elf
|
||||
/home/runner/cache/toolchain/xpack-arm-none-eabi-gcc-10.2.1-1.1/bin/../lib/gcc/arm-none-eabi/10.2.1/../../../../arm-none-eabi/bin/ld: section .ARM.exidx.text._close LMA [0000000000002980,0000000000002987] overlaps section .data LMA [0000000000002980,0000000000002a03]
|
||||
collect2: error: ld returned 1 exit status
|
||||
make: *** [../../rules.mk:94: _build/ek-tm4c123gxl/dfu.elf] Error 1
|
||||
@ -80,7 +80,7 @@
|
||||
#define CFG_TUD_DFU 1
|
||||
|
||||
// DFU buffer size, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR
|
||||
#define CFG_TUD_DFU_XFER_BUFSIZE 512
|
||||
#define CFG_TUD_DFU_XFER_BUFSIZE ( OPT_MODE_HIGH_SPEED ? 512 : 64 )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -158,13 +158,14 @@ endif
|
||||
# Flash Targets
|
||||
# ---------------------------------------
|
||||
|
||||
# Flash binary using Jlink
|
||||
# Jlink binary
|
||||
ifeq ($(OS),Windows_NT)
|
||||
JLINKEXE = JLink.exe
|
||||
else
|
||||
JLINKEXE = JLinkExe
|
||||
endif
|
||||
|
||||
# Jlink Interface
|
||||
JLINK_IF ?= swd
|
||||
|
||||
# Flash using jlink
|
||||
@ -177,18 +178,22 @@ flash-jlink: $(BUILD)/$(PROJECT).hex
|
||||
@echo exit >> $(BUILD)/$(BOARD).jlink
|
||||
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
|
||||
|
||||
# flash STM32 MCU using stlink with STM32 Cube Programmer CLI
|
||||
# Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
|
||||
flash-stlink: $(BUILD)/$(PROJECT).elf
|
||||
STM32_Programmer_CLI --connect port=swd --write $< --go
|
||||
|
||||
# flash with pyocd
|
||||
# Flash using pyocd
|
||||
PYOCD_OPTION ?=
|
||||
flash-pyocd: $(BUILD)/$(PROJECT).hex
|
||||
pyocd flash -t $(PYOCD_TARGET) $(PYOCD_OPTION) $<
|
||||
pyocd reset -t $(PYOCD_TARGET)
|
||||
|
||||
# flash with Black Magic Probe
|
||||
# Flash using openocd
|
||||
OPENOCD_OPTION ?=
|
||||
flash-openocd: $(BUILD)/$(PROJECT).elf
|
||||
openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
|
||||
|
||||
# flash with Black Magic Probe
|
||||
# This symlink is created by https://github.com/blacksphere/blackmagic/blob/master/driver/99-blackmagic.rules
|
||||
BMP ?= /dev/ttyBmpGdb
|
||||
|
||||
|
||||
@ -98,6 +98,9 @@
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_MSP430x5xx
|
||||
#include "msp430.h"
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_MSP432E4
|
||||
#include "msp.h"
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI
|
||||
// no header needed
|
||||
|
||||
@ -140,6 +143,9 @@
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_XMC4000
|
||||
#include "xmc_device.h"
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_TM4C123
|
||||
#include "TM4C123.h"
|
||||
|
||||
#else
|
||||
#error "Missing MCU header"
|
||||
#endif
|
||||
|
||||
46
hw/bsp/msp432e4/boards/msp_exp432e401y/board.h
Normal file
46
hw/bsp/msp432e4/boards/msp_exp432e401y/board.h
Normal file
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
#define CLK_LED 12u
|
||||
#define GPIO_LED GPION
|
||||
#define GPIO_LED_PIN 1u
|
||||
|
||||
#define CLK_BUTTON 8u
|
||||
#define GPIO_BUTTON GPIOJ
|
||||
#define GPIO_BUTTON_PIN 0u
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
176
hw/bsp/msp432e4/family.c
Normal file
176
hw/bsp/msp432e4/family.c
Normal file
@ -0,0 +1,176 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board.h"
|
||||
#include "board.h"
|
||||
#include "msp.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB0_IRQHandler(void)
|
||||
{
|
||||
tud_int_handler(0);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Turn off power domains that unused peripherals belong to */
|
||||
SYSCTL->PCCAN = 0u;
|
||||
#ifdef __MCU_HAS_LCD0__
|
||||
SYSCTL->PCLCD = 0u;
|
||||
#endif
|
||||
SYSCTL->PCEMAC = 0u;
|
||||
SYSCTL->PCEPHY = 0u;
|
||||
SYSCTL->PCCCM = 0u;
|
||||
|
||||
/* --- Setup system clock --- */
|
||||
/* Start power-up process of the main oscillator */
|
||||
SYSCTL->MOSCCTL = SYSCTL_MOSCCTL_OSCRNG;
|
||||
while (!(SYSCTL->RIS & SYSCTL_RIS_MOSCPUPRIS)) ; /* Wait for completion */
|
||||
SYSCTL->MISC = SYSCTL_MISC_MOSCPUPMIS; /* Clear the completion interrupt status */
|
||||
/* Set the main oscillator to PLL reference clock */
|
||||
SYSCTL->RSCLKCFG = SYSCTL_RSCLKCFG_PLLSRC_MOSC;
|
||||
/* PLL freq. = (MOSC freq. / 10) * 96 = 240MHz */
|
||||
SYSCTL->PLLFREQ1 = (4 << SYSCTL_PLLFREQ1_N_S) | (1 << SYSCTL_PLLFREQ1_Q_S);
|
||||
SYSCTL->PLLFREQ0 = (96 << SYSCTL_PLLFREQ0_MINT_S) | SYSCTL_PLLFREQ0_PLLPWR;
|
||||
/* Set BCHT=6, BCE=0, WS=5 for 120MHz system clock */
|
||||
SYSCTL->MEMTIM0 = SYSCTL_MEMTIM0_EBCHT_3_5 | (5 << SYSCTL_MEMTIM0_EWS_S) |
|
||||
SYSCTL_MEMTIM0_FBCHT_3_5 | (5 << SYSCTL_MEMTIM0_FWS_S) | SYSCTL_MEMTIM0_MB1;
|
||||
/* Wait for completion of PLL power-up process */
|
||||
while (!(SYSCTL->RIS & SYSCTL_RIS_PLLLRIS)) ;
|
||||
SYSCTL->MISC = SYSCTL_MISC_PLLLMIS; /* Clear the completion interrupt status */
|
||||
/* Switch the system clock to PLL/4 */
|
||||
SYSCTL->RSCLKCFG = SYSCTL_RSCLKCFG_MEMTIMU | SYSCTL_RSCLKCFG_ACG |
|
||||
SYSCTL_RSCLKCFG_USEPLL | SYSCTL_RSCLKCFG_PLLSRC_MOSC | (1 << SYSCTL_RSCLKCFG_PSYSDIV_S);
|
||||
|
||||
SystemCoreClockUpdate();
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
/* USR_LED1 ON1 */
|
||||
SYSCTL->RCGCGPIO |= TU_BIT(CLK_LED);
|
||||
while (!(SYSCTL->PRGPIO & TU_BIT(CLK_LED))) ;
|
||||
GPIO_LED->DIR = TU_BIT(GPIO_LED_PIN);
|
||||
GPIO_LED->DEN = TU_BIT(GPIO_LED_PIN);
|
||||
|
||||
/* USR_SW1 PJ0 */
|
||||
SYSCTL->RCGCGPIO |= TU_BIT(CLK_BUTTON);
|
||||
while (!(SYSCTL->PRGPIO & TU_BIT(CLK_BUTTON))) ;
|
||||
GPIO_BUTTON->PUR = TU_BIT(GPIO_BUTTON_PIN);
|
||||
GPIO_BUTTON->DEN = TU_BIT(GPIO_BUTTON_PIN);
|
||||
|
||||
/* UART PA0,1 */
|
||||
SYSCTL->RCGCGPIO |= 1u << 0;
|
||||
while (!(SYSCTL->PRGPIO & (1u << 0))) ;
|
||||
GPIOA->AFSEL = 3u;
|
||||
GPIOA->PCTL = 0x11u;
|
||||
GPIOA->DEN = 3u;
|
||||
|
||||
SYSCTL->RCGCUART |= 1u << 0;
|
||||
while (!(SYSCTL->PRUART & (1u << 0))) ;
|
||||
UART0->CTL = 0;
|
||||
UART0->IBRD = 8; /* 8.68056 = 16MHz / (16 * 115200) */
|
||||
UART0->FBRD = 44; /* 0.6875 = 44/64 -> 115108bps (0.08%) */
|
||||
UART0->LCRH = UART_LCRH_WLEN_8 | UART_LCRH_FEN;
|
||||
UART0->CC = UART_CC_CS_PIOSC; /* Set the baud clock to PIOSC */
|
||||
UART0->CTL = UART_CTL_RXE | UART_CTL_TXE | UART_CTL_UARTEN;
|
||||
|
||||
/* USB PB1(VBUS) PL6,7(DP,DM) */
|
||||
SYSCTL->RCGCGPIO |= (1u << 1) | (1u << 10);
|
||||
while (((1u << 1) | (1u << 10)) != (SYSCTL->PRGPIO & ((1u << 1) | (1u << 10)))) ;
|
||||
GPIOB->AMSEL = 1u << 1;
|
||||
GPIOL->AMSEL = (1u << 6) | (1u << 7);
|
||||
|
||||
SYSCTL->RCGCUSB = 1u; /* Open the clock gate for SYSCLK */
|
||||
while (!(SYSCTL->PRUSB & (1u << 0))) ;
|
||||
USB0->CC = USB_CC_CLKEN | (3u << USB_CC_CLKDIV_S); /* 60MHz = 240MHz / 4 */
|
||||
__DMB(); /* Wait for completion of opening of the clock gate */
|
||||
|
||||
SYSCTL->SRUSB = 1u;
|
||||
for (int i = 0; i < 16; ++i) __NOP();
|
||||
SYSCTL->SRUSB = 0u;
|
||||
|
||||
USB0->CC = USB_CC_CLKEN | (3u << USB_CC_CLKDIV_S); /* 60MHz = 240MHz / 4 */
|
||||
__DMB(); /* Wait for completion of opening of the clock gate */
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
if (state)
|
||||
GPIO_LED->DATA |= TU_BIT(GPIO_LED_PIN);
|
||||
else
|
||||
GPIO_LED->DATA &= ~TU_BIT(GPIO_LED_PIN);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return (GPIO_BUTTON->DATA & TU_BIT(GPIO_BUTTON_PIN)) ? 0u : 1u;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t * buf, int len)
|
||||
{
|
||||
for (int i = 0; i < len; ++i) {
|
||||
while (UART0->FR & UART_FR_RXFE) ;
|
||||
*buf++ = UART0->DR;
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
uint8_t const *p = (uint8_t const *)buf;
|
||||
for (int i = 0; i < len; ++i) {
|
||||
while (UART0->FR & UART_FR_TXFF) ;
|
||||
UART0->DR = *p++;
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0u;
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
40
hw/bsp/msp432e4/family.mk
Normal file
40
hw/bsp/msp432e4/family.mk
Normal file
@ -0,0 +1,40 @@
|
||||
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/ti
|
||||
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mslow-flash-data \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-D__MSP432E401Y__ \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_MSP432E4
|
||||
|
||||
# mcu driver cause following warnings
|
||||
CFLAGS += -Wno-error=cast-qual -Wno-error=format=
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = hw/mcu/ti/msp432e4/Source/msp432e401y.ld
|
||||
LDINC += $(TOP)/hw/mcu/ti/msp432e4/Include
|
||||
LDFLAGS += $(addprefix -L,$(LDINC))
|
||||
|
||||
MCU_DIR = hw/mcu/ti/msp432e4
|
||||
|
||||
SRC_C += \
|
||||
src/portable/mentor/musb/dcd_musb.c \
|
||||
$(MCU_DIR)/Source/system_msp432e401y.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||
$(TOP)/$(MCU_DIR)/Include \
|
||||
$(TOP)/$(BOARD_PATH)
|
||||
|
||||
SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = MSP432E401Y
|
||||
JLINK_IF = SWD
|
||||
52
hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.h
Normal file
52
hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.h
Normal file
@ -0,0 +1,52 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define BOARD_UART UART0
|
||||
#define BOARD_UART_PORT GPIOA
|
||||
|
||||
#define BOARD_BTN_PORT GPIOF
|
||||
#define BOARD_BTN 4
|
||||
#define BOARD_BTN_Msk (1u<<4)
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
#define LED_PORT GPIOF
|
||||
#define LED_PIN_RED 1
|
||||
#define LED_PIN_BLUE 2
|
||||
#define LED_PIN_GREEN 3
|
||||
#define LED_STATE_ON 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
11
hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
Normal file
11
hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
Normal file
@ -0,0 +1,11 @@
|
||||
CFLAGS += -DTM4C123GH6PM
|
||||
|
||||
LD_FILE = $(BOARD_PATH)/tm4c123.ld
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = TM4C123GH6PM
|
||||
|
||||
# flash using openocd
|
||||
OPENOCD_OPTION = -f board/ti_ek-tm4c123gxl.cfg
|
||||
|
||||
flash: flash-openocd
|
||||
65
hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
Normal file
65
hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
Normal file
@ -0,0 +1,65 @@
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
_estack = 0x20008000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x1000; /* required amount of stack */
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH(rx) : ORIGIN = 0x00000000, LENGTH = 256K
|
||||
SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4) ;
|
||||
*(.vectors)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.init)
|
||||
*(.fini)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
. = ALIGN(4) ;
|
||||
__end_text = . ;
|
||||
} >FLASH
|
||||
|
||||
.data : AT(ADDR(.text) + SIZEOF(.text))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__start_data = . ;
|
||||
__la_data = LOADADDR(.data);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(4);
|
||||
__end_data = . ;
|
||||
|
||||
} >SRAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4) ;
|
||||
__start_bss = . ;
|
||||
__bss_start__ = __start_bss;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.COMMON)
|
||||
__end_bss = . ;
|
||||
. = ALIGN(4);
|
||||
}>SRAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >SRAM
|
||||
}
|
||||
167
hw/bsp/tm4c123/family.c
Normal file
167
hw/bsp/tm4c123/family.c
Normal file
@ -0,0 +1,167 @@
|
||||
#include "TM4C123.h"
|
||||
#include "bsp/board.h"
|
||||
#include "board.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB0_Handler(void)
|
||||
{
|
||||
tud_int_handler(0);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
static void board_uart_init (void)
|
||||
{
|
||||
SYSCTL->RCGCUART |= (1 << 0); // Enable the clock to UART0
|
||||
SYSCTL->RCGCGPIO |= (1 << 0); // Enable the clock to GPIOA
|
||||
|
||||
GPIOA->AFSEL |= (1 << 1) | (1 << 0); // Enable the alternate function on pin PA0 & PA1
|
||||
GPIOA->PCTL |= (1 << 0) | (1 << 4); // Configure the GPIOPCTL register to select UART0 in PA0 and PA1
|
||||
GPIOA->DEN |= (1 << 0) | (1 << 1); // Enable the digital functionality in PA0 and PA1
|
||||
|
||||
/** BAUDRATE = 9600 bits per second, refer manual for calculation **/
|
||||
UART0->CTL &= ~(1 << 0); // Disable UART0 by clearing UARTEN bit in the UARTCTL register
|
||||
UART0->IBRD = 325; // Write the integer portion of the BRD to the UARTIRD register
|
||||
UART0->FBRD = 33; // Write the fractional portion of the BRD to the UARTFBRD registerer
|
||||
|
||||
UART0->LCRH = (0x3 << 5); // 8-bit, no parity, 1 stop bit
|
||||
UART0->CC = 0x0; // Configure the UART clock source as system clock
|
||||
|
||||
UART0->CTL = (1 << 0) | (1 << 8) | (1 << 9); // UART0 Enable, Transmit Enable, Recieve Enable
|
||||
}
|
||||
|
||||
static void initialize_board_led (GPIOA_Type *port, uint8_t PinMsk, uint8_t dirmsk)
|
||||
{
|
||||
/* Enable PortF Clock */
|
||||
SYSCTL->RCGCGPIO |= (1 << 5);
|
||||
|
||||
/* Let the clock stabilize */
|
||||
while ( !((SYSCTL->PRGPIO) & (1 << 5)) )
|
||||
;
|
||||
|
||||
/* Port Digital Enable */
|
||||
port->DEN |= PinMsk;
|
||||
|
||||
/* Set direction */
|
||||
port->DIR = dirmsk;
|
||||
}
|
||||
|
||||
static void board_switch_init (void)
|
||||
{
|
||||
GPIOF->DIR &= ~(1 << BOARD_BTN);
|
||||
GPIOF->PUR |= (1 << BOARD_BTN);
|
||||
GPIOF->DEN |= (1 << BOARD_BTN);
|
||||
}
|
||||
|
||||
static void WriteGPIOPin (GPIOA_Type *port, uint8_t PinMsk, bool state)
|
||||
{
|
||||
if ( state )
|
||||
port->DATA |= PinMsk;
|
||||
else
|
||||
port->DATA &= ~(PinMsk);
|
||||
}
|
||||
|
||||
static uint32_t ReadGPIOPin (GPIOA_Type *port, uint8_t pinMsk)
|
||||
{
|
||||
return (port->DATA & pinMsk);
|
||||
}
|
||||
|
||||
void board_init (void)
|
||||
{
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
/* Reset USB */
|
||||
SYSCTL->SRCR2 |= (1u << 16);
|
||||
|
||||
for ( volatile uint8_t i = 0; i < 20; i++ ) {}
|
||||
|
||||
SYSCTL->SRCR2 &= ~(1u << 16);
|
||||
|
||||
/* Open the USB clock gate */
|
||||
SYSCTL->RCGCUSB |= (1 << 0);
|
||||
|
||||
/* Power-up USB PLL */
|
||||
SYSCTL->RCC2 &= ~(1u << 14);
|
||||
|
||||
/* USB IO Initialization */
|
||||
SYSCTL->RCGCGPIO |= (1u << 3);
|
||||
|
||||
/* Let the clock stabilize */
|
||||
while ( !(SYSCTL->PRGPIO & (1u << 3)) )
|
||||
;
|
||||
|
||||
/* USB IOs to Analog Mode */
|
||||
GPIOD->AFSEL &= ~((1u << 4) | (1u << 5));
|
||||
GPIOD->DEN &= ~((1u << 4) | (1u << 5));
|
||||
GPIOD->AMSEL |= ((1u << 4) | (1u << 5));
|
||||
|
||||
uint8_t leds = (1 << LED_PIN_RED) | (1 << LED_PIN_BLUE) | (1 << LED_PIN_GREEN);
|
||||
uint8_t dirmsk = (1 << LED_PIN_RED) | (1 << LED_PIN_BLUE) | (1 << LED_PIN_GREEN);
|
||||
|
||||
/* Configure GPIO for board LED */
|
||||
initialize_board_led(LED_PORT, leds, dirmsk);
|
||||
|
||||
/* Configure GPIO for board switch */
|
||||
board_switch_init();
|
||||
|
||||
/* Initialize board UART */
|
||||
board_uart_init();
|
||||
|
||||
}
|
||||
|
||||
void board_led_write (bool state)
|
||||
{
|
||||
WriteGPIOPin(LED_PORT, (1 << LED_PIN_BLUE), state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read (void)
|
||||
{
|
||||
uint32_t gpio_value = ReadGPIOPin(BOARD_BTN_PORT, BOARD_BTN_Msk);
|
||||
return BUTTON_STATE_ACTIVE ? gpio_value : !gpio_value;
|
||||
}
|
||||
|
||||
int board_uart_write (void const *buf, int len)
|
||||
{
|
||||
uint8_t const * data = buf;
|
||||
|
||||
for ( int i = 0; i < len; i++ )
|
||||
{
|
||||
while ( (UART0->FR & (1 << 5)) != 0 ) {} // Poll until previous data was shofted out
|
||||
UART0->DR = data[i]; // Write UART0 DATA REGISTER
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
int board_uart_read (uint8_t *buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler (void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis (void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
35
hw/bsp/tm4c123/family.mk
Normal file
35
hw/bsp/tm4c123/family.mk
Normal file
@ -0,0 +1,35 @@
|
||||
DEPS_SUBMODULES += hw/mcu/ti
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-mthumb \
|
||||
-mabi=aapcs \
|
||||
-mcpu=cortex-m4 \
|
||||
-mfloat-abi=hard \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_TM4C123 \
|
||||
-uvectors \
|
||||
-DTM4C123GH6PM
|
||||
|
||||
# mcu driver cause following warnings
|
||||
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
|
||||
|
||||
MCU_DIR=hw/mcu/ti/tm4c123xx/
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(BOARD_PATH)/tm4c123.ld
|
||||
|
||||
INC += \
|
||||
$(TOP)/$(MCU_DIR)/CMSIS/5.7.0/CMSIS/Include \
|
||||
$(TOP)/$(MCU_DIR)/Include/TM4C123 \
|
||||
$(TOP)/$(BOARD_PATH)
|
||||
|
||||
SRC_C += \
|
||||
src/portable/mentor/musb/dcd_musb.c \
|
||||
$(MCU_DIR)/Source/system_TM4C123.c \
|
||||
$(MCU_DIR)/Source/GCC/tm4c123_startup.c
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORT = ARM_CM4F
|
||||
@ -1 +1 @@
|
||||
Subproject commit ed52d354c99e25a5e9db2376eb5e7058c81c3ebd
|
||||
Subproject commit 143ed6cc20a7615d042b03b21e070197d473e6e5
|
||||
@ -102,7 +102,8 @@
|
||||
CFG_TUSB_MCU == OPT_MCU_GD32VF103 || \
|
||||
CFG_TUSB_MCU == OPT_MCU_LPC18XX || \
|
||||
CFG_TUSB_MCU == OPT_MCU_LPC43XX || \
|
||||
CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
|
||||
CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \
|
||||
CFG_TUSB_MCU == OPT_MCU_MSP432E4
|
||||
#if TUD_AUDIO_PREFER_RING_BUFFER
|
||||
#define USE_LINEAR_BUFFER 0
|
||||
#else
|
||||
|
||||
@ -146,6 +146,9 @@
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 8
|
||||
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 8
|
||||
|
||||
//------------- ValentyUSB -------------//
|
||||
#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 16
|
||||
|
||||
899
src/portable/mentor/musb/dcd_musb.c
Normal file
899
src/portable/mentor/musb/dcd_musb.c
Normal file
@ -0,0 +1,899 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021 Koji KITAYAMA
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
|
||||
|
||||
#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
|
||||
/* GCC warns that an address may be unaligned, even though
|
||||
* the target CPU has the capability for unaligned memory access. */
|
||||
_Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
|
||||
#endif
|
||||
|
||||
#include "device/dcd.h"
|
||||
|
||||
#if TU_CHECK_MCU(OPT_MCU_MSP432E4)
|
||||
#include "musb_msp432e.h"
|
||||
|
||||
#elif TU_CHECK_MCU(OPT_MCU_TM4C123, OPT_MCU_TM4C129)
|
||||
#include "musb_tm4c.h"
|
||||
|
||||
// HACK generalize later
|
||||
#include "musb_type.h"
|
||||
#define FIFO0_WORD FIFO0
|
||||
#define FIFO1_WORD FIFO1
|
||||
|
||||
#else
|
||||
#error "Unsupported MCUs"
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------
|
||||
* MACRO TYPEDEF CONSTANT ENUM DECLARATION
|
||||
*------------------------------------------------------------------*/
|
||||
#define REQUEST_TYPE_INVALID (0xFFu)
|
||||
|
||||
typedef struct {
|
||||
uint_fast16_t beg; /* offset of including first element */
|
||||
uint_fast16_t end; /* offset of excluding the last element */
|
||||
} free_block_t;
|
||||
|
||||
typedef struct TU_ATTR_PACKED {
|
||||
uint16_t TXMAXP;
|
||||
uint8_t TXCSRL;
|
||||
uint8_t TXCSRH;
|
||||
uint16_t RXMAXP;
|
||||
uint8_t RXCSRL;
|
||||
uint8_t RXCSRH;
|
||||
uint16_t RXCOUNT;
|
||||
uint16_t RESERVED[3];
|
||||
} hw_endpoint_t;
|
||||
|
||||
typedef union {
|
||||
uint8_t u8;
|
||||
uint16_t u16;
|
||||
uint32_t u32;
|
||||
} hw_fifo_t;
|
||||
|
||||
typedef struct TU_ATTR_PACKED
|
||||
{
|
||||
void *buf; /* the start address of a transfer data buffer */
|
||||
uint16_t length; /* the number of bytes in the buffer */
|
||||
uint16_t remaining; /* the number of bytes remaining in the buffer */
|
||||
} pipe_state_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
tusb_control_request_t setup_packet;
|
||||
uint16_t remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
|
||||
int8_t status_out;
|
||||
pipe_state_t pipe0;
|
||||
pipe_state_t pipe[2][7]; /* pipe[direction][endpoint number - 1] */
|
||||
uint16_t pipe_buf_is_fifo[2]; /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
|
||||
} dcd_data_t;
|
||||
|
||||
/*------------------------------------------------------------------
|
||||
* INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
*------------------------------------------------------------------*/
|
||||
static dcd_data_t _dcd;
|
||||
|
||||
|
||||
static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr)
|
||||
{
|
||||
free_block_t *cur = beg;
|
||||
for (; cur < end && ((addr < cur->beg) || (cur->end <= addr)); ++cur) ;
|
||||
return cur;
|
||||
}
|
||||
|
||||
static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size)
|
||||
{
|
||||
free_block_t *p = find_containing_block(blks, blks + num, addr);
|
||||
TU_ASSERT(p != blks + num, -2);
|
||||
if (p->beg == addr) {
|
||||
/* Shrink block */
|
||||
p->beg = addr + size;
|
||||
if (p->beg != p->end) return 0;
|
||||
/* remove block */
|
||||
free_block_t *end = blks + num;
|
||||
while (p + 1 < end) {
|
||||
*p = *(p + 1);
|
||||
++p;
|
||||
}
|
||||
return -1;
|
||||
} else {
|
||||
/* Split into 2 blocks */
|
||||
free_block_t tmp = {
|
||||
.beg = addr + size,
|
||||
.end = p->end
|
||||
};
|
||||
p->end = addr;
|
||||
if (p->beg == p->end) {
|
||||
if (tmp.beg != tmp.end) {
|
||||
*p = tmp;
|
||||
return 0;
|
||||
}
|
||||
/* remove block */
|
||||
free_block_t *end = blks + num;
|
||||
while (p + 1 < end) {
|
||||
*p = *(p + 1);
|
||||
++p;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
if (tmp.beg == tmp.end) return 0;
|
||||
blks[num] = tmp;
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned free_block_size(free_block_t const *blk)
|
||||
{
|
||||
return blk->end - blk->beg;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static inline void print_block_list(free_block_t const *blk, unsigned num)
|
||||
{
|
||||
TU_LOG1("*************\n");
|
||||
for (unsigned i = 0; i < num; ++i) {
|
||||
TU_LOG1(" Blk%u %u %u\n", i, blk->beg, blk->end);
|
||||
++blk;
|
||||
}
|
||||
}
|
||||
#else
|
||||
#define print_block_list(a,b)
|
||||
#endif
|
||||
|
||||
static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3)
|
||||
{
|
||||
free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)];
|
||||
unsigned num_blocks = 1;
|
||||
|
||||
/* Initialize free memory block list */
|
||||
free_blocks[0].beg = 64 / 8;
|
||||
free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */
|
||||
for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
uint_fast16_t addr;
|
||||
int num;
|
||||
USB0->EPIDX = i;
|
||||
addr = USB0->TXFIFOADD;
|
||||
if (addr) {
|
||||
unsigned sz = USB0->TXFIFOSZ;
|
||||
unsigned sft = (sz & USB_TXFIFOSZ_SIZE_M) + ((sz & USB_TXFIFOSZ_DPB) ? 1: 0);
|
||||
num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
|
||||
TU_ASSERT(-2 < num, 0);
|
||||
num_blocks += num;
|
||||
print_block_list(free_blocks, num_blocks);
|
||||
}
|
||||
addr = USB0->RXFIFOADD;
|
||||
if (addr) {
|
||||
unsigned sz = USB0->RXFIFOSZ;
|
||||
unsigned sft = (sz & USB_RXFIFOSZ_SIZE_M) + ((sz & USB_RXFIFOSZ_DPB) ? 1: 0);
|
||||
num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
|
||||
TU_ASSERT(-2 < num, 0);
|
||||
num_blocks += num;
|
||||
print_block_list(free_blocks, num_blocks);
|
||||
}
|
||||
}
|
||||
print_block_list(free_blocks, num_blocks);
|
||||
|
||||
/* Find the best fit memory block */
|
||||
uint_fast16_t size_in_8byte_unit = 1 << size_in_log2_minus3;
|
||||
free_block_t const *min = NULL;
|
||||
uint_fast16_t min_sz = 0xFFFFu;
|
||||
free_block_t const *end = &free_blocks[num_blocks];
|
||||
for (free_block_t const *cur = &free_blocks[0]; cur < end; ++cur) {
|
||||
uint_fast16_t sz = free_block_size(cur);
|
||||
if (sz < size_in_8byte_unit) continue;
|
||||
if (size_in_8byte_unit == sz) return cur->beg;
|
||||
if (sz < min_sz) min = cur;
|
||||
}
|
||||
TU_ASSERT(min, 0);
|
||||
return min->beg;
|
||||
}
|
||||
|
||||
static inline volatile hw_endpoint_t* edpt_regs(unsigned epnum_minus1)
|
||||
{
|
||||
volatile hw_endpoint_t *regs = (volatile hw_endpoint_t*)((uintptr_t)&USB0->TXMAXP1);
|
||||
return regs + epnum_minus1;
|
||||
}
|
||||
|
||||
static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
|
||||
{
|
||||
volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
|
||||
uintptr_t addr = (uintptr_t)buf;
|
||||
while (len >= 4) {
|
||||
reg->u32 = *(uint32_t const *)addr;
|
||||
addr += 4;
|
||||
len -= 4;
|
||||
}
|
||||
if (len >= 2) {
|
||||
reg->u16 = *(uint16_t const *)addr;
|
||||
addr += 2;
|
||||
len -= 2;
|
||||
}
|
||||
if (len) {
|
||||
reg->u8 = *(uint8_t const *)addr;
|
||||
}
|
||||
}
|
||||
|
||||
static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
|
||||
{
|
||||
volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
|
||||
uintptr_t addr = (uintptr_t)buf;
|
||||
while (len >= 4) {
|
||||
*(uint32_t *)addr = reg->u32;
|
||||
addr += 4;
|
||||
len -= 4;
|
||||
}
|
||||
if (len >= 2) {
|
||||
*(uint32_t *)addr = reg->u16;
|
||||
addr += 2;
|
||||
len -= 2;
|
||||
}
|
||||
if (len) {
|
||||
*(uint32_t *)addr = reg->u8;
|
||||
}
|
||||
}
|
||||
|
||||
static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir)
|
||||
{
|
||||
static const struct {
|
||||
void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
|
||||
void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n);
|
||||
void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len);
|
||||
} ops[] = {
|
||||
/* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
|
||||
/* IN */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
|
||||
};
|
||||
tu_fifo_buffer_info_t info;
|
||||
ops[dir].tu_fifo_get_info(f, &info);
|
||||
unsigned total_len = len;
|
||||
len = TU_MIN(total_len, info.len_lin);
|
||||
ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
|
||||
unsigned rem = total_len - len;
|
||||
if (rem) {
|
||||
len = TU_MIN(rem, info.len_wrap);
|
||||
ops[dir].pipe_read_write(info.ptr_wrap, fifo, len);
|
||||
rem -= len;
|
||||
}
|
||||
ops[dir].tu_fifo_advance(f, total_len - rem);
|
||||
}
|
||||
|
||||
static void process_setup_packet(uint8_t rhport)
|
||||
{
|
||||
uint32_t *p = (void*)&_dcd.setup_packet;
|
||||
p[0] = USB0->FIFO0_WORD;
|
||||
p[1] = USB0->FIFO0_WORD;
|
||||
|
||||
_dcd.pipe0.buf = NULL;
|
||||
_dcd.pipe0.length = 0;
|
||||
_dcd.pipe0.remaining = 0;
|
||||
dcd_event_setup_received(rhport, (const uint8_t*)(uintptr_t)&_dcd.setup_packet, true);
|
||||
|
||||
const unsigned len = _dcd.setup_packet.wLength;
|
||||
_dcd.remaining_ctrl = len;
|
||||
const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
|
||||
/* Clear RX FIFO and reverse the transaction direction */
|
||||
if (len && dir_in) USB0->CSRL0 = USB_CSRL0_RXRDYC;
|
||||
}
|
||||
|
||||
static bool handle_xfer_in(uint_fast8_t ep_addr)
|
||||
{
|
||||
unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
|
||||
pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
|
||||
const unsigned rem = pipe->remaining;
|
||||
|
||||
if (!rem) {
|
||||
pipe->buf = NULL;
|
||||
return true;
|
||||
}
|
||||
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
|
||||
const unsigned mps = regs->TXMAXP;
|
||||
const unsigned len = TU_MIN(mps, rem);
|
||||
void *buf = pipe->buf;
|
||||
// TU_LOG1(" %p mps %d len %d rem %d\n", buf, mps, len, rem);
|
||||
if (len) {
|
||||
if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
|
||||
pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_IN);
|
||||
} else {
|
||||
pipe_write_packet(buf, &USB0->FIFO1_WORD + epnum_minus1, len);
|
||||
pipe->buf = buf + len;
|
||||
}
|
||||
pipe->remaining = rem - len;
|
||||
}
|
||||
regs->TXCSRL = USB_TXCSRL1_TXRDY;
|
||||
// TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool handle_xfer_out(uint_fast8_t ep_addr)
|
||||
{
|
||||
unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
|
||||
pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
|
||||
// TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL);
|
||||
|
||||
TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
|
||||
|
||||
const unsigned mps = regs->RXMAXP;
|
||||
const unsigned rem = pipe->remaining;
|
||||
const unsigned vld = regs->RXCOUNT;
|
||||
const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
|
||||
void *buf = pipe->buf;
|
||||
if (len) {
|
||||
if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
|
||||
pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_OUT);
|
||||
} else {
|
||||
pipe_read_packet(buf, &USB0->FIFO1_WORD + epnum_minus1, len);
|
||||
pipe->buf = buf + len;
|
||||
}
|
||||
pipe->remaining = rem - len;
|
||||
}
|
||||
if ((len < mps) || (rem == len)) {
|
||||
pipe->buf = NULL;
|
||||
return NULL != buf;
|
||||
}
|
||||
regs->RXCSRL = 0; /* Clear RXRDY bit */
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
|
||||
{
|
||||
(void)rhport;
|
||||
|
||||
unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
|
||||
unsigned dir_in = tu_edpt_dir(ep_addr);
|
||||
|
||||
pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
|
||||
pipe->buf = buffer;
|
||||
pipe->length = total_bytes;
|
||||
pipe->remaining = total_bytes;
|
||||
|
||||
if (dir_in) {
|
||||
handle_xfer_in(ep_addr);
|
||||
} else {
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
|
||||
if (regs->RXCSRL & USB_RXCSRL1_RXRDY) regs->RXCSRL = 0;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
|
||||
{
|
||||
(void)rhport;
|
||||
TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
|
||||
|
||||
const unsigned req = _dcd.setup_packet.bmRequestType;
|
||||
TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
|
||||
|
||||
if (req == REQUEST_TYPE_INVALID || _dcd.status_out) {
|
||||
/* STATUS OUT stage.
|
||||
* MUSB controller automatically handles STATUS OUT packets without
|
||||
* software helps. We do not have to do anything. And STATUS stage
|
||||
* may have already finished and received the next setup packet
|
||||
* without calling this function, so we have no choice but to
|
||||
* invoke the callback function of status packet here. */
|
||||
// TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
|
||||
_dcd.status_out = 0;
|
||||
if (req == REQUEST_TYPE_INVALID) {
|
||||
dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
|
||||
} else {
|
||||
/* The next setup packet has already been received, it aborts
|
||||
* invoking callback function to avoid confusing TUSB stack. */
|
||||
TU_LOG1("Drop CONTROL_STAGE_ACK\n");
|
||||
}
|
||||
return true;
|
||||
}
|
||||
const unsigned dir_in = tu_edpt_dir(ep_addr);
|
||||
if (tu_edpt_dir(req) == dir_in) { /* DATA stage */
|
||||
TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
|
||||
const unsigned rem = _dcd.remaining_ctrl;
|
||||
const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
|
||||
if (dir_in) {
|
||||
pipe_write_packet(buffer, &USB0->FIFO0_WORD, len);
|
||||
|
||||
_dcd.pipe0.buf = buffer + len;
|
||||
_dcd.pipe0.length = len;
|
||||
_dcd.pipe0.remaining = 0;
|
||||
|
||||
_dcd.remaining_ctrl = rem - len;
|
||||
if ((len < 64) || (rem == len)) {
|
||||
_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
|
||||
_dcd.status_out = 1;
|
||||
/* Flush TX FIFO and reverse the transaction direction. */
|
||||
USB0->CSRL0 = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
|
||||
} else {
|
||||
USB0->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
|
||||
}
|
||||
// TU_LOG1(" IN USB0->CSRL0 = %x\n", USB0->CSRL0);
|
||||
} else {
|
||||
// TU_LOG1(" OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
|
||||
_dcd.pipe0.buf = buffer;
|
||||
_dcd.pipe0.length = len;
|
||||
_dcd.pipe0.remaining = len;
|
||||
USB0->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
|
||||
}
|
||||
} else if (dir_in) {
|
||||
// TU_LOG1(" STATUS IN USB0->CSRL0 = %x\n", USB0->CSRL0);
|
||||
_dcd.pipe0.buf = NULL;
|
||||
_dcd.pipe0.length = 0;
|
||||
_dcd.pipe0.remaining = 0;
|
||||
/* Clear RX FIFO and reverse the transaction direction */
|
||||
USB0->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
static void process_ep0(uint8_t rhport)
|
||||
{
|
||||
uint_fast8_t csrl = USB0->CSRL0;
|
||||
|
||||
// TU_LOG1(" EP0 USB0->CSRL0 = %x\n", csrl);
|
||||
|
||||
if (csrl & USB_CSRL0_STALLED) {
|
||||
/* Returned STALL packet to HOST. */
|
||||
USB0->CSRL0 = 0; /* Clear STALL */
|
||||
return;
|
||||
}
|
||||
|
||||
unsigned req = _dcd.setup_packet.bmRequestType;
|
||||
if (csrl & USB_CSRL0_SETEND) {
|
||||
TU_LOG1(" ABORT by the next packets\n");
|
||||
USB0->CSRL0 = USB_CSRL0_SETENDC;
|
||||
if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
|
||||
/* DATA stage was aborted by receiving STATUS or SETUP packet. */
|
||||
_dcd.pipe0.buf = NULL;
|
||||
_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
|
||||
dcd_event_xfer_complete(rhport,
|
||||
req & TUSB_DIR_IN_MASK,
|
||||
_dcd.pipe0.length - _dcd.pipe0.remaining,
|
||||
XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
req = REQUEST_TYPE_INVALID;
|
||||
if (!(csrl & USB_CSRL0_RXRDY)) return; /* Received SETUP packet */
|
||||
}
|
||||
|
||||
if (csrl & USB_CSRL0_RXRDY) {
|
||||
/* Received SETUP or DATA OUT packet */
|
||||
if (req == REQUEST_TYPE_INVALID) {
|
||||
/* SETUP */
|
||||
TU_ASSERT(sizeof(tusb_control_request_t) == USB0->COUNT0,);
|
||||
process_setup_packet(rhport);
|
||||
return;
|
||||
}
|
||||
if (_dcd.pipe0.buf) {
|
||||
/* DATA OUT */
|
||||
const unsigned vld = USB0->COUNT0;
|
||||
const unsigned rem = _dcd.pipe0.remaining;
|
||||
const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
|
||||
pipe_read_packet(_dcd.pipe0.buf, &USB0->FIFO0_WORD, len);
|
||||
|
||||
_dcd.pipe0.remaining = rem - len;
|
||||
_dcd.remaining_ctrl -= len;
|
||||
|
||||
_dcd.pipe0.buf = NULL;
|
||||
dcd_event_xfer_complete(rhport,
|
||||
tu_edpt_addr(0, TUSB_DIR_OUT),
|
||||
_dcd.pipe0.length - _dcd.pipe0.remaining,
|
||||
XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/* When CSRL0 is zero, it means that completion of sending a any length packet
|
||||
* or receiving a zero length packet. */
|
||||
if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
|
||||
/* STATUS IN */
|
||||
if (*(const uint16_t*)(uintptr_t)&_dcd.setup_packet == 0x0500) {
|
||||
/* The address must be changed on completion of the control transfer. */
|
||||
USB0->FADDR = (uint8_t)_dcd.setup_packet.wValue;
|
||||
}
|
||||
_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
|
||||
dcd_event_xfer_complete(rhport,
|
||||
tu_edpt_addr(0, TUSB_DIR_IN),
|
||||
_dcd.pipe0.length - _dcd.pipe0.remaining,
|
||||
XFER_RESULT_SUCCESS, true);
|
||||
return;
|
||||
}
|
||||
if (_dcd.pipe0.buf) {
|
||||
/* DATA IN */
|
||||
_dcd.pipe0.buf = NULL;
|
||||
dcd_event_xfer_complete(rhport,
|
||||
tu_edpt_addr(0, TUSB_DIR_IN),
|
||||
_dcd.pipe0.length - _dcd.pipe0.remaining,
|
||||
XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
}
|
||||
|
||||
static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
|
||||
{
|
||||
bool completed;
|
||||
const unsigned dir_in = tu_edpt_dir(ep_addr);
|
||||
const unsigned epn_minus1 = tu_edpt_number(ep_addr) - 1;
|
||||
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epn_minus1);
|
||||
if (dir_in) {
|
||||
// TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL);
|
||||
if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
|
||||
regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
|
||||
return;
|
||||
}
|
||||
completed = handle_xfer_in(ep_addr);
|
||||
} else {
|
||||
// TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL);
|
||||
if (regs->RXCSRL & USB_RXCSRL1_STALLED) {
|
||||
regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
|
||||
return;
|
||||
}
|
||||
completed = handle_xfer_out(ep_addr);
|
||||
}
|
||||
|
||||
if (completed) {
|
||||
pipe_state_t *pipe = &_dcd.pipe[dir_in][tu_edpt_number(ep_addr) - 1];
|
||||
dcd_event_xfer_complete(rhport, ep_addr,
|
||||
pipe->length - pipe->remaining,
|
||||
XFER_RESULT_SUCCESS, true);
|
||||
}
|
||||
}
|
||||
|
||||
static void process_bus_reset(uint8_t rhport)
|
||||
{
|
||||
/* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
|
||||
* a control transfer state is SETUP or STATUS stage. */
|
||||
_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
|
||||
_dcd.status_out = 0;
|
||||
/* When pipe0.buf has not NULL, DATA stage works in progress. */
|
||||
_dcd.pipe0.buf = NULL;
|
||||
|
||||
USB0->TXIE = 1; /* Enable only EP0 */
|
||||
USB0->RXIE = 0;
|
||||
|
||||
/* Clear FIFO settings */
|
||||
for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
USB0->EPIDX = i;
|
||||
USB0->TXFIFOSZ = 0;
|
||||
USB0->TXFIFOADD = 0;
|
||||
USB0->RXFIFOSZ = 0;
|
||||
USB0->RXFIFOADD = 0;
|
||||
}
|
||||
dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------
|
||||
* Device API
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
void dcd_init(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB0->IE |= USB_IE_SUSPND;
|
||||
NVIC_ClearPendingIRQ(USB0_IRQn);
|
||||
|
||||
dcd_connect(rhport);
|
||||
}
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
// Receive Set Address request, mcu port must also include status IN response
|
||||
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
(void)rhport;
|
||||
(void)dev_addr;
|
||||
_dcd.pipe0.buf = NULL;
|
||||
_dcd.pipe0.length = 0;
|
||||
_dcd.pipe0.remaining = 0;
|
||||
/* Clear RX FIFO to return ACK. */
|
||||
USB0->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
|
||||
}
|
||||
|
||||
// Wake up host
|
||||
void dcd_remote_wakeup(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB0->POWER |= USB_POWER_RESUME;
|
||||
|
||||
unsigned cnt = SystemCoreClock / 1000;
|
||||
while (cnt--) __NOP();
|
||||
|
||||
USB0->POWER &= ~USB_POWER_RESUME;
|
||||
}
|
||||
|
||||
// Connect by enabling internal pull-up resistor on D+/D-
|
||||
void dcd_connect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB0->POWER |= USB_POWER_SOFTCONN;
|
||||
}
|
||||
|
||||
// Disconnect by disabling internal pull-up resistor on D+/D-
|
||||
void dcd_disconnect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB0->POWER &= ~USB_POWER_SOFTCONN;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Endpoint API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// Configure endpoint's registers according to descriptor
|
||||
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
const unsigned ep_addr = ep_desc->bEndpointAddress;
|
||||
const unsigned epn = tu_edpt_number(ep_addr);
|
||||
const unsigned dir_in = tu_edpt_dir(ep_addr);
|
||||
const unsigned xfer = ep_desc->bmAttributes.xfer;
|
||||
const unsigned mps = tu_edpt_packet_size(ep_desc);
|
||||
|
||||
TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX);
|
||||
|
||||
pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
|
||||
pipe->buf = NULL;
|
||||
pipe->length = 0;
|
||||
pipe->remaining = 0;
|
||||
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epn - 1);
|
||||
if (dir_in) {
|
||||
regs->TXMAXP = mps;
|
||||
regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
|
||||
if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
|
||||
else
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT;
|
||||
USB0->TXIE |= TU_BIT(epn);
|
||||
} else {
|
||||
regs->RXMAXP = mps;
|
||||
regs->RXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
|
||||
if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
|
||||
else
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT;
|
||||
USB0->RXIE |= TU_BIT(epn);
|
||||
}
|
||||
|
||||
/* Setup FIFO */
|
||||
int size_in_log2_minus3 = 28 - TU_MIN(28, __CLZ((uint32_t)mps));
|
||||
if ((8u << size_in_log2_minus3) < mps) ++size_in_log2_minus3;
|
||||
unsigned addr = find_free_memory(size_in_log2_minus3);
|
||||
TU_ASSERT(addr);
|
||||
|
||||
USB0->EPIDX = epn;
|
||||
if (dir_in) {
|
||||
USB0->TXFIFOADD = addr;
|
||||
USB0->TXFIFOSZ = size_in_log2_minus3;
|
||||
} else {
|
||||
USB0->RXFIFOADD = addr;
|
||||
USB0->RXFIFOSZ = size_in_log2_minus3;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void dcd_edpt_close_all(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
volatile hw_endpoint_t *regs = (volatile hw_endpoint_t *)(uintptr_t)&USB0->TXMAXP1;
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
USB0->TXIE = 1; /* Enable only EP0 */
|
||||
USB0->RXIE = 0;
|
||||
for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
regs->TXMAXP = 0;
|
||||
regs->TXCSRH = 0;
|
||||
if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
|
||||
else
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT;
|
||||
|
||||
regs->RXMAXP = 0;
|
||||
regs->RXCSRH = 0;
|
||||
if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
|
||||
else
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT;
|
||||
|
||||
USB0->EPIDX = i;
|
||||
USB0->TXFIFOSZ = 0;
|
||||
USB0->TXFIFOADD = 0;
|
||||
USB0->RXFIFOSZ = 0;
|
||||
USB0->RXFIFOADD = 0;
|
||||
}
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void)rhport;
|
||||
unsigned const epn = tu_edpt_number(ep_addr);
|
||||
unsigned const dir_in = tu_edpt_dir(ep_addr);
|
||||
|
||||
hw_endpoint_t volatile *regs = edpt_regs(epn - 1);
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
if (dir_in) {
|
||||
USB0->TXIE &= ~TU_BIT(epn);
|
||||
regs->TXMAXP = 0;
|
||||
regs->TXCSRH = 0;
|
||||
if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
|
||||
else
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT;
|
||||
|
||||
USB0->EPIDX = epn;
|
||||
USB0->TXFIFOSZ = 0;
|
||||
USB0->TXFIFOADD = 0;
|
||||
} else {
|
||||
USB0->RXIE &= ~TU_BIT(epn);
|
||||
regs->RXMAXP = 0;
|
||||
regs->RXCSRH = 0;
|
||||
if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
|
||||
else
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT;
|
||||
|
||||
USB0->EPIDX = epn;
|
||||
USB0->RXFIFOSZ = 0;
|
||||
USB0->RXFIFOADD = 0;
|
||||
}
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
(void)rhport;
|
||||
bool ret;
|
||||
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
|
||||
unsigned const epnum = tu_edpt_number(ep_addr);
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
if (epnum) {
|
||||
_dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
|
||||
ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
|
||||
} else
|
||||
ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
return ret;
|
||||
}
|
||||
|
||||
// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c
|
||||
bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
|
||||
{
|
||||
(void)rhport;
|
||||
bool ret;
|
||||
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
|
||||
unsigned const epnum = tu_edpt_number(ep_addr);
|
||||
TU_ASSERT(epnum);
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
_dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] |= TU_BIT(epnum - 1);
|
||||
ret = edpt_n_xfer(rhport, ep_addr, (uint8_t*)ff, total_bytes);
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
return ret;
|
||||
}
|
||||
|
||||
// Stall endpoint
|
||||
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void)rhport;
|
||||
unsigned const epn = tu_edpt_number(ep_addr);
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
if (0 == epn) {
|
||||
if (!ep_addr) { /* Ignore EP80 */
|
||||
_dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
|
||||
_dcd.pipe0.buf = NULL;
|
||||
USB0->CSRL0 = USB_CSRL0_STALL;
|
||||
}
|
||||
} else {
|
||||
volatile hw_endpoint_t *regs = edpt_regs(epn - 1);
|
||||
if (tu_edpt_dir(ep_addr)) { /* IN */
|
||||
regs->TXCSRL = USB_TXCSRL1_STALL;
|
||||
} else { /* OUT */
|
||||
TU_ASSERT(!(regs->RXCSRL & USB_RXCSRL1_RXRDY),);
|
||||
regs->RXCSRL = USB_RXCSRL1_STALL;
|
||||
}
|
||||
}
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
// clear stall, data toggle is also reset to DATA0
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void)rhport;
|
||||
unsigned const epn = tu_edpt_number(ep_addr);
|
||||
hw_endpoint_t volatile *regs = edpt_regs(epn - 1);
|
||||
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
if (tu_edpt_dir(ep_addr)) { /* IN */
|
||||
regs->TXCSRL = USB_TXCSRL1_CLRDT;
|
||||
} else { /* OUT */
|
||||
regs->RXCSRL = USB_RXCSRL1_CLRDT;
|
||||
}
|
||||
if (ie) NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
* ISR
|
||||
*-------------------------------------------------------------------*/
|
||||
void dcd_int_handler(uint8_t rhport)
|
||||
{
|
||||
uint_fast8_t is, txis, rxis;
|
||||
|
||||
is = USB0->IS; /* read and clear interrupt status */
|
||||
txis = USB0->TXIS; /* read and clear interrupt status */
|
||||
rxis = USB0->RXIS; /* read and clear interrupt status */
|
||||
// TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis);
|
||||
|
||||
is &= USB0->IE; /* Clear disabled interrupts */
|
||||
if (is & USB_IS_DISCON) {
|
||||
}
|
||||
if (is & USB_IS_SOF) {
|
||||
dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
|
||||
}
|
||||
if (is & USB_IS_RESET) {
|
||||
process_bus_reset(rhport);
|
||||
}
|
||||
if (is & USB_IS_RESUME) {
|
||||
dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
|
||||
}
|
||||
if (is & USB_IS_SUSPEND) {
|
||||
dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
|
||||
}
|
||||
|
||||
txis &= USB0->TXIE; /* Clear disabled interrupts */
|
||||
if (txis & USB_TXIE_EP0) {
|
||||
process_ep0(rhport);
|
||||
txis &= ~TU_BIT(0);
|
||||
}
|
||||
while (txis) {
|
||||
unsigned const num = __builtin_ctz(txis);
|
||||
process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
|
||||
txis &= ~TU_BIT(num);
|
||||
}
|
||||
rxis &= USB0->RXIE; /* Clear disabled interrupts */
|
||||
while (rxis) {
|
||||
unsigned const num = __builtin_ctz(rxis);
|
||||
process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
|
||||
rxis &= ~TU_BIT(num);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
40
src/portable/mentor/musb/musb_msp432e.h
Normal file
40
src/portable/mentor/musb/musb_msp432e.h
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_MUSB_MSP432E_H_
|
||||
#define _TUSB_MUSB_MSP432E_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "msp.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
45
src/portable/mentor/musb/musb_tm4c.h
Normal file
45
src/portable/mentor/musb/musb_tm4c.h
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_MUSB_TM4C_H_
|
||||
#define _TUSB_MUSB_TM4C_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_TM4C123
|
||||
#include "TM4C123.h"
|
||||
//#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
|
||||
#else
|
||||
#error "Unsupported MCUs"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
2624
src/portable/mentor/musb/musb_type.h
Normal file
2624
src/portable/mentor/musb/musb_type.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -84,8 +84,11 @@
|
||||
// Sony
|
||||
#define OPT_MCU_CXD56 400 ///< SONY CXD56
|
||||
|
||||
// TI MSP430
|
||||
// TI
|
||||
#define OPT_MCU_MSP430x5xx 500 ///< TI MSP430x5xx
|
||||
#define OPT_MCU_MSP432E4 510 ///< TI MSP432E4xx
|
||||
#define OPT_MCU_TM4C123 511 ///< TI Tiva-C 123x
|
||||
#define OPT_MCU_TM4C129 512 ///< TI Tiva-C 129x
|
||||
|
||||
// ValentyUSB eptri
|
||||
#define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user