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add etm trace for 6m5

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hathach 2023-07-02 23:39:43 +07:00
parent ec02ddf986
commit 787229a35e
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GPG Key ID: F5D50C6D51D17CBA
3 changed files with 54 additions and 5 deletions
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19
hw/bsp/ra/boards/ra6m5_ek/board.h
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@ -38,11 +38,20 @@ extern "C" {
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 0
const ioport_pin_cfg_t board_pin_cfg[] = { const ioport_pin_cfg_t board_pin_cfg[] = {
{.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
{.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
{.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
{.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
{.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
#ifdef TRACE_ETM
// ETM Trace
{ .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
{ .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
{ .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
{ .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
{ .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
#endif
}; };
#ifdef __cplusplus #ifdef __cplusplus

35
hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug Normal file
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@ -0,0 +1,35 @@
/*********************************************************************
*
* OnProjectLoad
*
* Function description
* Project load routine. Required.
*
**********************************************************************
*/
void OnProjectLoad (void) {
Project.AddSvdFile ("Cortex-M33.svd");
Project.AddSvdFile ("./R7FA6M5BH.svd");
Project.SetDevice ("R7FA6M5BH");
Project.SetHostIF ("USB", "");
Project.SetTargetIF ("SWD");
Project.SetTIFSpeed ("50 MHz");
Project.SetTraceSource ("Trace Pins");
Project.SetTracePortWidth (4);
File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ra6m5/cdc_msc.elf");
}
/*********************************************************************
*
* BeforeTargetConnect
*
**********************************************************************
*/
void BeforeTargetConnect (void) {
//
// Trace pin init is done by J-Link script file as J-Link script files are IDE independent
//
}

5
hw/bsp/ra/family.c
View File

@ -87,6 +87,11 @@ void board_init(void)
/* Configure pins. */ /* Configure pins. */
R_IOPORT_Open(&port_ctrl, &family_pin_cfg); R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
#ifdef TRACE_ETM
// Enable trace clock with div 1 (100 Mhz)
R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk;
#endif
board_led_write(false); board_led_write(false);
/* Enable USB_BASE */ /* Enable USB_BASE */