mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
Merge pull request #2373 from Lurcy38/master
Add Support stm32h5 for stm32h573i based on stm32_fsdev G0 implementa…
This commit is contained in:
Ha Thach
GitHub
commit
7c181c4e9b
1
.github/workflows/cmake_arm.yml
vendored
1
.github/workflows/cmake_arm.yml
vendored
@ -49,6 +49,7 @@ jobs:
|
|||||||
- 'stm32f7'
|
- 'stm32f7'
|
||||||
- 'stm32g0'
|
- 'stm32g0'
|
||||||
- 'stm32g4'
|
- 'stm32g4'
|
||||||
|
- 'stm32h5'
|
||||||
- 'stm32h7'
|
- 'stm32h7'
|
||||||
- 'stm32l4'
|
- 'stm32l4'
|
||||||
- 'stm32u5'
|
- 'stm32u5'
|
||||||
|
|||||||
1
.idea/cmake.xml
generated
1
.idea/cmake.xml
generated
@ -62,6 +62,7 @@
|
|||||||
<configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
|
<configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
|
||||||
<configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=2 -DLOGGER=RTT" />
|
<configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=2 -DLOGGER=RTT" />
|
||||||
<configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
|
<configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
|
||||||
|
<configuration PROFILE_NAME="stm32h563nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h563nucleo -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
|
||||||
<configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
|
<configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
|
||||||
<configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=3" />
|
<configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=3" />
|
||||||
<configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
|
<configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
|
||||||
|
|||||||
4
.idea/runConfigurations/stlink.xml
generated
4
.idea/runConfigurations/stlink.xml
generated
@ -1,6 +1,6 @@
|
|||||||
<component name="ProjectRunConfigurationManager">
|
<component name="ProjectRunConfigurationManager">
|
||||||
<configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" folderName="stm32" PROGRAM_PARAMS="-p 62847 -cp "/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin" --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
|
<configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" folderName="stm32" PROGRAM_PARAMS="-p 28833 -cp "/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.1.100.202311100844/tools/bin" --frequency 8000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="stm32h563nucleo" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
|
||||||
<custom-gdb-server version="1" gdb-connect="tcp::62847" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.0.500.202301161003/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
|
<custom-gdb-server version="1" gdb-connect="tcp::28833" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.1.100.202310302101/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
|
||||||
<debugger kind="GDB" isBundled="true" />
|
<debugger kind="GDB" isBundled="true" />
|
||||||
</custom-gdb-server>
|
</custom-gdb-server>
|
||||||
<method v="2">
|
<method v="2">
|
||||||
|
|||||||
@ -83,6 +83,9 @@
|
|||||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
||||||
#include "stm32g4xx.h"
|
#include "stm32g4xx.h"
|
||||||
|
|
||||||
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||||
|
#include "stm32h5xx.h"
|
||||||
|
|
||||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
|
||||||
#include "stm32h7xx.h"
|
#include "stm32h7xx.h"
|
||||||
|
|
||||||
|
|||||||
@ -2,7 +2,7 @@
|
|||||||
* The MIT License (MIT)
|
* The MIT License (MIT)
|
||||||
*
|
*
|
||||||
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||||
* Copyright (c) 2034, HiFiPhile
|
* Copyright (c) 2023, HiFiPhile
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
* of this software and associated documentation files (the "Software"), to deal
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
|||||||
@ -1,7 +1,5 @@
|
|||||||
UF2_FAMILY_ID = 0x4c71240a
|
UF2_FAMILY_ID = 0x4c71240a
|
||||||
ST_FAMILY = g4
|
ST_FAMILY = g4
|
||||||
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
|
|
||||||
|
|
||||||
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
|
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
|
||||||
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
|
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
|
||||||
|
|
||||||
|
|||||||
165
hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h
Normal file
165
hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h
Normal file
@ -0,0 +1,165 @@
|
|||||||
|
/*
|
||||||
|
* FreeRTOS Kernel V10.0.0
|
||||||
|
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||||
|
* this software and associated documentation files (the "Software"), to deal in
|
||||||
|
* the Software without restriction, including without limitation the rights to
|
||||||
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||||
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||||
|
* subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in all
|
||||||
|
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||||
|
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||||
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* http://www.FreeRTOS.org
|
||||||
|
* http://aws.amazon.com/freertos
|
||||||
|
*
|
||||||
|
* 1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef FREERTOS_CONFIG_H
|
||||||
|
#define FREERTOS_CONFIG_H
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Application specific definitions.
|
||||||
|
*
|
||||||
|
* These definitions should be adjusted for your particular hardware and
|
||||||
|
* application requirements.
|
||||||
|
*
|
||||||
|
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||||
|
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||||
|
*
|
||||||
|
* See http://www.freertos.org/a00110.html.
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
// skip if included from IAR assembler
|
||||||
|
#ifndef __IASMARM__
|
||||||
|
#include "stm32h5xx.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Cortex M23/M33 port configuration. */
|
||||||
|
#define configENABLE_MPU 0
|
||||||
|
#define configENABLE_FPU 1
|
||||||
|
#define configENABLE_TRUSTZONE 0
|
||||||
|
#define configMINIMAL_SECURE_STACK_SIZE (1024)
|
||||||
|
|
||||||
|
#define configUSE_PREEMPTION 1
|
||||||
|
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||||
|
#define configCPU_CLOCK_HZ SystemCoreClock
|
||||||
|
#define configTICK_RATE_HZ ( 1000 )
|
||||||
|
#define configMAX_PRIORITIES ( 5 )
|
||||||
|
#define configMINIMAL_STACK_SIZE ( 128 )
|
||||||
|
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
|
||||||
|
#define configMAX_TASK_NAME_LEN 16
|
||||||
|
#define configUSE_16_BIT_TICKS 0
|
||||||
|
#define configIDLE_SHOULD_YIELD 1
|
||||||
|
#define configUSE_MUTEXES 1
|
||||||
|
#define configUSE_RECURSIVE_MUTEXES 1
|
||||||
|
#define configUSE_COUNTING_SEMAPHORES 1
|
||||||
|
#define configQUEUE_REGISTRY_SIZE 4
|
||||||
|
#define configUSE_QUEUE_SETS 0
|
||||||
|
#define configUSE_TIME_SLICING 0
|
||||||
|
#define configUSE_NEWLIB_REENTRANT 0
|
||||||
|
#define configENABLE_BACKWARD_COMPATIBILITY 1
|
||||||
|
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||||
|
|
||||||
|
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||||
|
#define configSUPPORT_DYNAMIC_ALLOCATION 0
|
||||||
|
|
||||||
|
/* Hook function related definitions. */
|
||||||
|
#define configUSE_IDLE_HOOK 0
|
||||||
|
#define configUSE_TICK_HOOK 0
|
||||||
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
|
||||||
|
/* Run time and task stats gathering related definitions. */
|
||||||
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
|
#define configRECORD_STACK_HIGH_ADDRESS 1
|
||||||
|
#define configUSE_TRACE_FACILITY 1 // legacy trace
|
||||||
|
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||||
|
|
||||||
|
/* Co-routine definitions. */
|
||||||
|
#define configUSE_CO_ROUTINES 0
|
||||||
|
#define configMAX_CO_ROUTINE_PRIORITIES 2
|
||||||
|
|
||||||
|
/* Software timer related definitions. */
|
||||||
|
#define configUSE_TIMERS 1
|
||||||
|
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
|
||||||
|
#define configTIMER_QUEUE_LENGTH 32
|
||||||
|
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||||
|
|
||||||
|
/* Optional functions - most linkers will remove unused functions anyway. */
|
||||||
|
#define INCLUDE_vTaskPrioritySet 0
|
||||||
|
#define INCLUDE_uxTaskPriorityGet 0
|
||||||
|
#define INCLUDE_vTaskDelete 0
|
||||||
|
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
|
||||||
|
#define INCLUDE_xResumeFromISR 0
|
||||||
|
#define INCLUDE_vTaskDelayUntil 1
|
||||||
|
#define INCLUDE_vTaskDelay 1
|
||||||
|
#define INCLUDE_xTaskGetSchedulerState 0
|
||||||
|
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||||
|
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||||
|
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||||
|
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
|
||||||
|
#define INCLUDE_pcTaskGetTaskName 0
|
||||||
|
#define INCLUDE_eTaskGetState 0
|
||||||
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
|
/* Define to trap errors during development. */
|
||||||
|
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
||||||
|
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
||||||
|
#define configASSERT(_exp) \
|
||||||
|
do {\
|
||||||
|
if ( !(_exp) ) { \
|
||||||
|
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
||||||
|
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
||||||
|
taskDISABLE_INTERRUPTS(); \
|
||||||
|
__asm("BKPT #0\n"); \
|
||||||
|
}\
|
||||||
|
}\
|
||||||
|
} while(0)
|
||||||
|
#else
|
||||||
|
#define configASSERT( x )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
#define vPortSVCHandler SVC_Handler
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// Interrupt nesting behavior configuration.
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
|
||||||
|
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
|
||||||
|
#define configPRIO_BITS 4
|
||||||
|
|
||||||
|
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
|
||||||
|
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
|
||||||
|
|
||||||
|
/* The highest interrupt priority that can be used by any interrupt service
|
||||||
|
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||||
|
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||||
|
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||||
|
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
|
||||||
|
|
||||||
|
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||||
|
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||||
|
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
|
||||||
|
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||||
|
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||||
|
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
|
||||||
|
#endif
|
||||||
8
hw/bsp/stm32h5/boards/stm32h563nucleo/board.cmake
Normal file
8
hw/bsp/stm32h5/boards/stm32h563nucleo/board.cmake
Normal file
@ -0,0 +1,8 @@
|
|||||||
|
set(MCU_VARIANT stm32h563xx)
|
||||||
|
set(JLINK_DEVICE stm32h563zi)
|
||||||
|
|
||||||
|
function(update_board TARGET)
|
||||||
|
target_compile_definitions(${TARGET} PUBLIC
|
||||||
|
STM32H563xx
|
||||||
|
)
|
||||||
|
endfunction()
|
||||||
129
hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
Normal file
129
hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
Normal file
@ -0,0 +1,129 @@
|
|||||||
|
/*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||||
|
* Copyright (c) 2023, HiFiPhile
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* This file is part of the TinyUSB stack.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BOARD_H_
|
||||||
|
#define BOARD_H_
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// LED
|
||||||
|
#define LED_PORT GPIOG
|
||||||
|
#define LED_PIN GPIO_PIN_4
|
||||||
|
#define LED_STATE_ON 1
|
||||||
|
|
||||||
|
// Button
|
||||||
|
#define BUTTON_PORT GPIOA
|
||||||
|
#define BUTTON_PIN GPIO_PIN_0
|
||||||
|
#define BUTTON_STATE_ACTIVE 0
|
||||||
|
|
||||||
|
// UART Enable for STLink VCOM
|
||||||
|
#define UART_DEV USART1
|
||||||
|
#define UART_CLK_EN __USART1_CLK_ENABLE
|
||||||
|
#define UART_GPIO_PORT GPIOA
|
||||||
|
#define UART_GPIO_AF GPIO_AF7_USART1
|
||||||
|
|
||||||
|
#define UART_TX_PIN GPIO_PIN_9
|
||||||
|
#define UART_RX_PIN GPIO_PIN_10
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// RCC Clock
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
static inline void SystemClock_Config(void) {
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
|
||||||
|
/** Configure the main internal regulator output voltage
|
||||||
|
*/
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||||
|
|
||||||
|
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||||
|
|
||||||
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||||||
|
* in the RCC_OscInitTypeDef structure.
|
||||||
|
*/
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL;
|
||||||
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 250;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
|
||||||
|
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Initializes the CPU, AHB and APB buses clocks
|
||||||
|
*/
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||||
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||||
|
|RCC_CLOCKTYPE_PCLK3;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure CRS clock source
|
||||||
|
__HAL_RCC_CRS_CLK_ENABLE();
|
||||||
|
RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
|
||||||
|
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
|
||||||
|
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
|
||||||
|
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
|
||||||
|
RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
|
||||||
|
RCC_CRSInitStruct.ErrorLimitValue = 34;
|
||||||
|
RCC_CRSInitStruct.HSI48CalibrationValue = 32;
|
||||||
|
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
|
||||||
|
|
||||||
|
/* Select HSI48 as USB clock source */
|
||||||
|
RCC_PeriphCLKInitTypeDef usb_clk = {0 };
|
||||||
|
usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||||
|
usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&usb_clk);
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_USB_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* BOARD_H_ */
|
||||||
7
hw/bsp/stm32h5/boards/stm32h563nucleo/board.mk
Normal file
7
hw/bsp/stm32h5/boards/stm32h563nucleo/board.mk
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
MCU_VARIANT = stm32h563xx
|
||||||
|
|
||||||
|
CFLAGS += \
|
||||||
|
-DSTM32H563xx
|
||||||
|
|
||||||
|
# For flash-jlink target
|
||||||
|
JLINK_DEVICE = stm32h563zi
|
||||||
401
hw/bsp/stm32h5/boards/stm32h563nucleo/cubemx/stm32h563nucleo.ioc
Normal file
401
hw/bsp/stm32h5/boards/stm32h563nucleo/cubemx/stm32h563nucleo.ioc
Normal file
@ -0,0 +1,401 @@
|
|||||||
|
#MicroXplorer Configuration settings - do not modify
|
||||||
|
BOOTPATH.BootPathName=LEGACY
|
||||||
|
BOOTPATH.IPParameters=BootPathName
|
||||||
|
BOOTPATH.UserSelectedBootPath=LEGACY
|
||||||
|
CAD.formats=
|
||||||
|
CAD.pinconfig=
|
||||||
|
CAD.provider=
|
||||||
|
CORTEX_M33_NS.userName=CORTEX_M33
|
||||||
|
File.Version=6
|
||||||
|
GPIO.groupedBy=Group By Peripherals
|
||||||
|
KeepUserPlacement=false
|
||||||
|
MMTAppRegionsCount=0
|
||||||
|
MMTConfigApplied=false
|
||||||
|
Mcu.CPN=STM32H563ZIT6
|
||||||
|
Mcu.ContextProject=TrustZoneDisabled
|
||||||
|
Mcu.Family=STM32H5
|
||||||
|
Mcu.IP0=BOOTPATH
|
||||||
|
Mcu.IP1=CORTEX_M33_NS
|
||||||
|
Mcu.IP2=DEBUG
|
||||||
|
Mcu.IP3=ICACHE
|
||||||
|
Mcu.IP4=MEMORYMAP
|
||||||
|
Mcu.IP5=NVIC
|
||||||
|
Mcu.IP6=PWR
|
||||||
|
Mcu.IP7=RCC
|
||||||
|
Mcu.IP8=SYS
|
||||||
|
Mcu.IP9=USB
|
||||||
|
Mcu.IPNb=10
|
||||||
|
Mcu.Name=STM32H563ZITx
|
||||||
|
Mcu.Package=LQFP144
|
||||||
|
Mcu.Pin0=PE2
|
||||||
|
Mcu.Pin1=PE3
|
||||||
|
Mcu.Pin10=PC1
|
||||||
|
Mcu.Pin11=PA1
|
||||||
|
Mcu.Pin12=PA2
|
||||||
|
Mcu.Pin13=PA4
|
||||||
|
Mcu.Pin14=PA7
|
||||||
|
Mcu.Pin15=PC4
|
||||||
|
Mcu.Pin16=PC5
|
||||||
|
Mcu.Pin17=PB0
|
||||||
|
Mcu.Pin18=PB13
|
||||||
|
Mcu.Pin19=PB14
|
||||||
|
Mcu.Pin2=PE4
|
||||||
|
Mcu.Pin20=PB15
|
||||||
|
Mcu.Pin21=PD8
|
||||||
|
Mcu.Pin22=PD9
|
||||||
|
Mcu.Pin23=PG4
|
||||||
|
Mcu.Pin24=PG7
|
||||||
|
Mcu.Pin25=PA9
|
||||||
|
Mcu.Pin26=PA11
|
||||||
|
Mcu.Pin27=PA12
|
||||||
|
Mcu.Pin28=PA13(JTMS/SWDIO)
|
||||||
|
Mcu.Pin29=PA14(JTCK/SWCLK)
|
||||||
|
Mcu.Pin3=PE5
|
||||||
|
Mcu.Pin30=PA15(JTDI)
|
||||||
|
Mcu.Pin31=PG11
|
||||||
|
Mcu.Pin32=PG13
|
||||||
|
Mcu.Pin33=PB3(JTDO/TRACESWO)
|
||||||
|
Mcu.Pin34=PB6
|
||||||
|
Mcu.Pin35=PB7
|
||||||
|
Mcu.Pin36=VP_ICACHE_VS_ICACHE
|
||||||
|
Mcu.Pin37=VP_PWR_VS_SECSignals
|
||||||
|
Mcu.Pin38=VP_PWR_VS_LPOM
|
||||||
|
Mcu.Pin39=VP_PWR_VS_DBSignals
|
||||||
|
Mcu.Pin4=PE6
|
||||||
|
Mcu.Pin40=VP_SYS_VS_Systick
|
||||||
|
Mcu.Pin41=VP_BOOTPATH_VS_BOOTPATH
|
||||||
|
Mcu.Pin42=VP_MEMORYMAP_VS_MEMORYMAP
|
||||||
|
Mcu.Pin5=PC13
|
||||||
|
Mcu.Pin6=PC14-OSC32_IN(OSC32_IN)
|
||||||
|
Mcu.Pin7=PC15-OSC32_OUT(OSC32_OUT)
|
||||||
|
Mcu.Pin8=PF4
|
||||||
|
Mcu.Pin9=PH0-OSC_IN(PH0)
|
||||||
|
Mcu.PinsNb=43
|
||||||
|
Mcu.ThirdPartyNb=0
|
||||||
|
Mcu.UserConstants=
|
||||||
|
Mcu.UserName=STM32H563ZITx
|
||||||
|
MxCube.Version=6.10.0
|
||||||
|
MxDb.Version=DB.6.0.100
|
||||||
|
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.EXTI13_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||||
|
NVIC.ForceEnableDMAVector=true
|
||||||
|
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||||
|
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||||
|
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
PA1.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PA1.GPIO_Label=RMII_REF_CLK
|
||||||
|
PA1.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PA1.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PA1.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PA1.Locked=true
|
||||||
|
PA1.Signal=ETH_REF_CLK
|
||||||
|
PA11.GPIOParameters=GPIO_Label
|
||||||
|
PA11.GPIO_Label=USB_FS_N
|
||||||
|
PA11.Locked=true
|
||||||
|
PA11.Mode=Device
|
||||||
|
PA11.Signal=USB_DM
|
||||||
|
PA12.GPIOParameters=GPIO_Label
|
||||||
|
PA12.GPIO_Label=USB_FS_P
|
||||||
|
PA12.Locked=true
|
||||||
|
PA12.Mode=Device
|
||||||
|
PA12.Signal=USB_DP
|
||||||
|
PA13(JTMS/SWDIO).GPIOParameters=GPIO_Label
|
||||||
|
PA13(JTMS/SWDIO).GPIO_Label=SWDIO
|
||||||
|
PA13(JTMS/SWDIO).Locked=true
|
||||||
|
PA13(JTMS/SWDIO).Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
|
||||||
|
PA14(JTCK/SWCLK).GPIOParameters=GPIO_Label
|
||||||
|
PA14(JTCK/SWCLK).GPIO_Label=SWCLK
|
||||||
|
PA14(JTCK/SWCLK).Locked=true
|
||||||
|
PA14(JTCK/SWCLK).Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
|
||||||
|
PA15(JTDI).GPIOParameters=GPIO_Label
|
||||||
|
PA15(JTDI).GPIO_Label=T_JTDI
|
||||||
|
PA15(JTDI).Locked=true
|
||||||
|
PA15(JTDI).Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PA15(JTDI).Signal=DEBUG_JTDI
|
||||||
|
PA2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PA2.GPIO_Label=RMII_MDIO
|
||||||
|
PA2.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PA2.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PA2.Locked=true
|
||||||
|
PA2.Signal=ETH_MDIO
|
||||||
|
PA4.GPIOParameters=GPIO_Label
|
||||||
|
PA4.GPIO_Label=VBUS_SENSE
|
||||||
|
PA4.Locked=true
|
||||||
|
PA4.Signal=ADCx_INP18
|
||||||
|
PA7.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PA7.GPIO_Label=RMII_CRS_DV
|
||||||
|
PA7.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PA7.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PA7.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PA7.Locked=true
|
||||||
|
PA7.Signal=ETH_CRS_DV
|
||||||
|
PA9.GPIOParameters=GPIO_Label
|
||||||
|
PA9.GPIO_Label=UCDP_DBn
|
||||||
|
PA9.Locked=true
|
||||||
|
PA9.Signal=UCPD1_DB1
|
||||||
|
PB0.Locked=true
|
||||||
|
PB0.Signal=GPIO_Output
|
||||||
|
PB13.GPIOParameters=GPIO_Label
|
||||||
|
PB13.GPIO_Label=UCPD_CC1
|
||||||
|
PB13.Locked=true
|
||||||
|
PB13.Signal=UCPD1_CC1
|
||||||
|
PB14.GPIOParameters=GPIO_Label
|
||||||
|
PB14.GPIO_Label=UCPD_CC2
|
||||||
|
PB14.Locked=true
|
||||||
|
PB14.Signal=UCPD1_CC2
|
||||||
|
PB15.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PB15.GPIO_Label=RMII_TXD1
|
||||||
|
PB15.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PB15.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PB15.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PB15.Locked=true
|
||||||
|
PB15.Signal=ETH_TXD1
|
||||||
|
PB3(JTDO/TRACESWO).GPIOParameters=GPIO_Label
|
||||||
|
PB3(JTDO/TRACESWO).GPIO_Label=SWO
|
||||||
|
PB3(JTDO/TRACESWO).Locked=true
|
||||||
|
PB3(JTDO/TRACESWO).Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PB3(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
|
||||||
|
PB6.GPIOParameters=GPIO_Label
|
||||||
|
PB6.GPIO_Label=ARD_D1_TX
|
||||||
|
PB6.Locked=true
|
||||||
|
PB6.Signal=LPUART1_TX
|
||||||
|
PB7.GPIOParameters=GPIO_Label
|
||||||
|
PB7.GPIO_Label=ARD_D0_RX
|
||||||
|
PB7.Locked=true
|
||||||
|
PB7.Signal=LPUART1_RX
|
||||||
|
PC1.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PC1.GPIO_Label=RMII_MDC
|
||||||
|
PC1.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PC1.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PC1.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PC1.Locked=true
|
||||||
|
PC1.Signal=ETH_MDC
|
||||||
|
PC13.Locked=true
|
||||||
|
PC13.Signal=GPXTI13
|
||||||
|
PC14-OSC32_IN(OSC32_IN).Locked=true
|
||||||
|
PC14-OSC32_IN(OSC32_IN).Mode=LSE-External-Oscillator
|
||||||
|
PC14-OSC32_IN(OSC32_IN).Signal=RCC_OSC32_IN
|
||||||
|
PC15-OSC32_OUT(OSC32_OUT).Locked=true
|
||||||
|
PC15-OSC32_OUT(OSC32_OUT).Mode=LSE-External-Oscillator
|
||||||
|
PC15-OSC32_OUT(OSC32_OUT).Signal=RCC_OSC32_OUT
|
||||||
|
PC4.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PC4.GPIO_Label=RMII_RXD0
|
||||||
|
PC4.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PC4.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PC4.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PC4.Locked=true
|
||||||
|
PC4.Signal=ETH_RXD0
|
||||||
|
PC5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PC5.GPIO_Label=RMII_RXD1
|
||||||
|
PC5.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PC5.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PC5.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PC5.Locked=true
|
||||||
|
PC5.Signal=ETH_RXD1
|
||||||
|
PD8.Locked=true
|
||||||
|
PD8.Signal=USART3_TX
|
||||||
|
PD9.Locked=true
|
||||||
|
PD9.Signal=USART3_RX
|
||||||
|
PE2.GPIOParameters=GPIO_Label
|
||||||
|
PE2.GPIO_Label=TRACE_CK
|
||||||
|
PE2.Locked=true
|
||||||
|
PE2.Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PE2.Signal=DEBUG_TRACECLK
|
||||||
|
PE3.GPIOParameters=GPIO_Label
|
||||||
|
PE3.GPIO_Label=TRACE_D0
|
||||||
|
PE3.Locked=true
|
||||||
|
PE3.Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PE3.Signal=DEBUG_TRACED0
|
||||||
|
PE4.GPIOParameters=GPIO_Label
|
||||||
|
PE4.GPIO_Label=TRACE_D1
|
||||||
|
PE4.Locked=true
|
||||||
|
PE4.Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PE4.Signal=DEBUG_TRACED1
|
||||||
|
PE5.GPIOParameters=GPIO_Label
|
||||||
|
PE5.GPIO_Label=TRACE_D2
|
||||||
|
PE5.Locked=true
|
||||||
|
PE5.Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PE5.Signal=DEBUG_TRACED2
|
||||||
|
PE6.GPIOParameters=GPIO_Label
|
||||||
|
PE6.GPIO_Label=TRACE_D3
|
||||||
|
PE6.Locked=true
|
||||||
|
PE6.Mode=Trace_Synchro_4bits_JTAG
|
||||||
|
PE6.Signal=DEBUG_TRACED3
|
||||||
|
PF4.Locked=true
|
||||||
|
PF4.Signal=GPIO_Output
|
||||||
|
PG11.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PG11.GPIO_Label=RMII_TXT_EN
|
||||||
|
PG11.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PG11.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PG11.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PG11.Locked=true
|
||||||
|
PG11.Signal=ETH_TX_EN
|
||||||
|
PG13.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||||
|
PG13.GPIO_Label=RMI_TXD0
|
||||||
|
PG13.GPIO_Mode=GPIO_MODE_AF_PP
|
||||||
|
PG13.GPIO_PuPd=GPIO_NOPULL
|
||||||
|
PG13.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||||
|
PG13.Locked=true
|
||||||
|
PG13.Signal=ETH_TXD0
|
||||||
|
PG4.Locked=true
|
||||||
|
PG4.Signal=GPIO_Output
|
||||||
|
PG7.GPIOParameters=GPIO_Label
|
||||||
|
PG7.GPIO_Label=UCPD_FLT
|
||||||
|
PG7.Locked=true
|
||||||
|
PG7.Signal=GPXTI7
|
||||||
|
PH0-OSC_IN(PH0).GPIOParameters=GPIO_Label
|
||||||
|
PH0-OSC_IN(PH0).GPIO_Label=STLK_MCO
|
||||||
|
PH0-OSC_IN(PH0).Locked=true
|
||||||
|
PH0-OSC_IN(PH0).Mode=HSE-External-Clock-Source
|
||||||
|
PH0-OSC_IN(PH0).Signal=RCC_OSC_IN
|
||||||
|
PinOutPanel.RotationAngle=0
|
||||||
|
ProjectManager.AskForMigrate=true
|
||||||
|
ProjectManager.BackupPrevious=false
|
||||||
|
ProjectManager.CompilerOptimize=6
|
||||||
|
ProjectManager.ComputerToolchain=false
|
||||||
|
ProjectManager.CoupleFile=false
|
||||||
|
ProjectManager.CustomerFirmwarePackage=
|
||||||
|
ProjectManager.DefaultFWLocation=true
|
||||||
|
ProjectManager.DeletePrevious=true
|
||||||
|
ProjectManager.DeviceId=STM32H563ZITx
|
||||||
|
ProjectManager.FirmwarePackage=STM32Cube FW_H5 V1.1.1
|
||||||
|
ProjectManager.FreePins=false
|
||||||
|
ProjectManager.HalAssertFull=false
|
||||||
|
ProjectManager.HeapSize=0x200
|
||||||
|
ProjectManager.KeepUserCode=true
|
||||||
|
ProjectManager.LastFirmware=true
|
||||||
|
ProjectManager.LibraryCopy=2
|
||||||
|
ProjectManager.MainLocation=Core/Src
|
||||||
|
ProjectManager.NoMain=false
|
||||||
|
ProjectManager.PreviousToolchain=
|
||||||
|
ProjectManager.ProjectBuild=false
|
||||||
|
ProjectManager.ProjectFileName=stm32h563nucleo.ioc
|
||||||
|
ProjectManager.ProjectName=stm32h563nucleo
|
||||||
|
ProjectManager.ProjectStructure=
|
||||||
|
ProjectManager.RegisterCallBack=
|
||||||
|
ProjectManager.StackSize=0x400
|
||||||
|
ProjectManager.TargetToolchain=Makefile
|
||||||
|
ProjectManager.ToolChainLocation=
|
||||||
|
ProjectManager.UAScriptAfterPath=
|
||||||
|
ProjectManager.UAScriptBeforePath=
|
||||||
|
ProjectManager.UnderRoot=false
|
||||||
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_PCD_Init-USB-false-HAL-true,4-MX_ICACHE_Init-ICACHE-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
|
||||||
|
RCC.ADCFreq_Value=250000000
|
||||||
|
RCC.AHBFreq_Value=250000000
|
||||||
|
RCC.APB1Freq_Value=250000000
|
||||||
|
RCC.APB1TimFreq_Value=250000000
|
||||||
|
RCC.APB2Freq_Value=250000000
|
||||||
|
RCC.APB2TimFreq_Value=250000000
|
||||||
|
RCC.APB3Freq_Value=250000000
|
||||||
|
RCC.CECFreq_Value=32000
|
||||||
|
RCC.CKPERFreq_Value=64000000
|
||||||
|
RCC.CRSFreq_Value=48000000
|
||||||
|
RCC.CSI_VALUE=4000000
|
||||||
|
RCC.CortexFreq_Value=250000000
|
||||||
|
RCC.DACFreq_Value=32768
|
||||||
|
RCC.EPOD_VALUE=8000000
|
||||||
|
RCC.ETHFreq_Value=250000000
|
||||||
|
RCC.FCLKCortexFreq_Value=250000000
|
||||||
|
RCC.FDCANFreq_Value=8000000
|
||||||
|
RCC.FamilyName=M
|
||||||
|
RCC.HCLKFreq_Value=250000000
|
||||||
|
RCC.HSE_VALUE=8000000
|
||||||
|
RCC.HSI48_VALUE=48000000
|
||||||
|
RCC.HSIDiv=RCC_HSI_DIV1
|
||||||
|
RCC.HSI_VALUE=64000000
|
||||||
|
RCC.I2C1Freq_Value=250000000
|
||||||
|
RCC.I2C2Freq_Value=250000000
|
||||||
|
RCC.I2C3Freq_Value=250000000
|
||||||
|
RCC.I2C4Freq_Value=250000000
|
||||||
|
RCC.I3C1Freq_Value=250000000
|
||||||
|
RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CECFreq_Value,CKPERFreq_Value,CRSFreq_Value,CSI_VALUE,CortexFreq_Value,DACFreq_Value,EPOD_VALUE,ETHFreq_Value,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSIDiv,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPTIM6Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSIRC_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,OCTOSPIMFreq_Value,PLL2PoutputFreq_Value,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL3PoutputFreq_Value,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART12Freq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,UCPD1outputFreq_Value,USART10Freq_Value,USART11Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value
|
||||||
|
RCC.LPTIM1Freq_Value=250000000
|
||||||
|
RCC.LPTIM2Freq_Value=250000000
|
||||||
|
RCC.LPTIM3Freq_Value=250000000
|
||||||
|
RCC.LPTIM4Freq_Value=250000000
|
||||||
|
RCC.LPTIM5Freq_Value=250000000
|
||||||
|
RCC.LPTIM6Freq_Value=250000000
|
||||||
|
RCC.LPUART1Freq_Value=250000000
|
||||||
|
RCC.LSCOPinFreq_Value=32000
|
||||||
|
RCC.LSIRC_VALUE=32000
|
||||||
|
RCC.MCO1PinFreq_Value=64000000
|
||||||
|
RCC.MCO2PinFreq_Value=250000000
|
||||||
|
RCC.OCTOSPIMFreq_Value=250000000
|
||||||
|
RCC.PLL2PoutputFreq_Value=258000000
|
||||||
|
RCC.PLL2QoutputFreq_Value=258000000
|
||||||
|
RCC.PLL2RoutputFreq_Value=258000000
|
||||||
|
RCC.PLL3PoutputFreq_Value=258000000
|
||||||
|
RCC.PLL3QoutputFreq_Value=258000000
|
||||||
|
RCC.PLL3RoutputFreq_Value=258000000
|
||||||
|
RCC.PLLM=4
|
||||||
|
RCC.PLLN=250
|
||||||
|
RCC.PLLPoutputFreq_Value=250000000
|
||||||
|
RCC.PLLQoutputFreq_Value=250000000
|
||||||
|
RCC.PLLSourceVirtual=RCC_PLL1_SOURCE_HSE
|
||||||
|
RCC.PWRFreq_Value=250000000
|
||||||
|
RCC.RNGFreq_Value=48000000
|
||||||
|
RCC.SAI1Freq_Value=258000000
|
||||||
|
RCC.SAI2Freq_Value=258000000
|
||||||
|
RCC.SDMMC1Freq_Value=250000000
|
||||||
|
RCC.SDMMC2Freq_Value=250000000
|
||||||
|
RCC.SPI1Freq_Value=250000000
|
||||||
|
RCC.SPI2Freq_Value=250000000
|
||||||
|
RCC.SPI3Freq_Value=250000000
|
||||||
|
RCC.SPI4Freq_Value=250000000
|
||||||
|
RCC.SPI5Freq_Value=250000000
|
||||||
|
RCC.SPI6Freq_Value=250000000
|
||||||
|
RCC.SYSCLKFreq_VALUE=250000000
|
||||||
|
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||||
|
RCC.UART12Freq_Value=250000000
|
||||||
|
RCC.UART4Freq_Value=250000000
|
||||||
|
RCC.UART5Freq_Value=250000000
|
||||||
|
RCC.UART7Freq_Value=250000000
|
||||||
|
RCC.UART8Freq_Value=250000000
|
||||||
|
RCC.UART9Freq_Value=250000000
|
||||||
|
RCC.UCPD1outputFreq_Value=16000000
|
||||||
|
RCC.USART10Freq_Value=250000000
|
||||||
|
RCC.USART11Freq_Value=250000000
|
||||||
|
RCC.USART1Freq_Value=250000000
|
||||||
|
RCC.USART2Freq_Value=250000000
|
||||||
|
RCC.USART3Freq_Value=250000000
|
||||||
|
RCC.USART6Freq_Value=250000000
|
||||||
|
RCC.USBFreq_Value=48000000
|
||||||
|
RCC.VCOInput2Freq_Value=4000000
|
||||||
|
RCC.VCOInput3Freq_Value=4000000
|
||||||
|
RCC.VCOInputFreq_Value=2000000
|
||||||
|
RCC.VCOOutputFreq_Value=500000000
|
||||||
|
RCC.VCOPLL2OutputFreq_Value=516000000
|
||||||
|
RCC.VCOPLL3OutputFreq_Value=516000000
|
||||||
|
SH.ADCx_INP18.0=ADC1_INP18
|
||||||
|
SH.ADCx_INP18.ConfNb=1
|
||||||
|
SH.GPXTI13.0=GPIO_EXTI13
|
||||||
|
SH.GPXTI13.ConfNb=1
|
||||||
|
SH.GPXTI7.0=GPIO_EXTI7
|
||||||
|
SH.GPXTI7.ConfNb=1
|
||||||
|
USB.IPParameters=VirtualMode
|
||||||
|
USB.VirtualMode=Device_Only
|
||||||
|
VP_BOOTPATH_VS_BOOTPATH.Mode=BP_Activate
|
||||||
|
VP_BOOTPATH_VS_BOOTPATH.Signal=BOOTPATH_VS_BOOTPATH
|
||||||
|
VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache
|
||||||
|
VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE
|
||||||
|
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
|
||||||
|
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
|
||||||
|
VP_PWR_VS_DBSignals.Mode=DisableDeadBatterySignals
|
||||||
|
VP_PWR_VS_DBSignals.Signal=PWR_VS_DBSignals
|
||||||
|
VP_PWR_VS_LPOM.Mode=PowerOptimisation
|
||||||
|
VP_PWR_VS_LPOM.Signal=PWR_VS_LPOM
|
||||||
|
VP_PWR_VS_SECSignals.Mode=Security/Privilege
|
||||||
|
VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals
|
||||||
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
|
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||||
|
board=NUCLEO-H563ZI
|
||||||
|
boardIOC=true
|
||||||
8
hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
Normal file
8
hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
Normal file
@ -0,0 +1,8 @@
|
|||||||
|
set(MCU_VARIANT stm32h573xx)
|
||||||
|
set(JLINK_DEVICE stm32h573ii)
|
||||||
|
|
||||||
|
function(update_board TARGET)
|
||||||
|
target_compile_definitions(${TARGET} PUBLIC
|
||||||
|
STM32H573xx
|
||||||
|
)
|
||||||
|
endfunction()
|
||||||
115
hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
Normal file
115
hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
Normal file
@ -0,0 +1,115 @@
|
|||||||
|
/*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||||
|
* Copyright (c) 2023, HiFiPhile
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* This file is part of the TinyUSB stack.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BOARD_H_
|
||||||
|
#define BOARD_H_
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// LED
|
||||||
|
#define LED_PORT GPIOI
|
||||||
|
#define LED_PIN GPIO_PIN_9
|
||||||
|
#define LED_STATE_ON 0
|
||||||
|
|
||||||
|
// Button
|
||||||
|
#define BUTTON_PORT GPIOC
|
||||||
|
#define BUTTON_PIN GPIO_PIN_13
|
||||||
|
#define BUTTON_STATE_ACTIVE 0
|
||||||
|
|
||||||
|
// UART Enable for STLink VCOM
|
||||||
|
#define UART_DEV USART1
|
||||||
|
#define UART_CLK_EN __USART1_CLK_ENABLE
|
||||||
|
#define UART_GPIO_PORT GPIOA
|
||||||
|
#define UART_GPIO_AF GPIO_AF7_USART1
|
||||||
|
|
||||||
|
#define UART_TX_PIN GPIO_PIN_9
|
||||||
|
#define UART_RX_PIN GPIO_PIN_10
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// RCC Clock
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
static inline void SystemClock_Config(void) {
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
|
||||||
|
/** Configure the main internal regulator output voltage */
|
||||||
|
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||||||
|
* in the RCC_OscInitTypeDef structure.
|
||||||
|
Freq 250MHZ */
|
||||||
|
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL;
|
||||||
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 5;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 100;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 10;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||||
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
|
/** Initializes the CPU, AHB and APB buses clocks */
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
|
||||||
|
|
||||||
|
// Configure CRS clock source
|
||||||
|
__HAL_RCC_CRS_CLK_ENABLE();
|
||||||
|
RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
|
||||||
|
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
|
||||||
|
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
|
||||||
|
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
|
||||||
|
RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
|
||||||
|
RCC_CRSInitStruct.ErrorLimitValue = 34;
|
||||||
|
RCC_CRSInitStruct.HSI48CalibrationValue = 32;
|
||||||
|
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
|
||||||
|
|
||||||
|
/* Select HSI48 as USB clock source */
|
||||||
|
RCC_PeriphCLKInitTypeDef usb_clk = {0 };
|
||||||
|
usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||||
|
usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&usb_clk);
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_USB_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* BOARD_H_ */
|
||||||
7
hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
Normal file
7
hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
MCU_VARIANT = stm32h573xx
|
||||||
|
|
||||||
|
CFLAGS += \
|
||||||
|
-DSTM32H573xx
|
||||||
|
|
||||||
|
# For flash-jlink target
|
||||||
|
JLINK_DEVICE = stm32h573ii
|
||||||
213
hw/bsp/stm32h5/family.c
Normal file
213
hw/bsp/stm32h5/family.c
Normal file
@ -0,0 +1,213 @@
|
|||||||
|
/*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||||
|
* Copyright (c) 2023 HiFiPhile
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* This file is part of the TinyUSB stack.
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
// Suppress warning caused by mcu driver
|
||||||
|
#ifdef __GNUC__
|
||||||
|
#pragma GCC diagnostic push
|
||||||
|
#pragma GCC diagnostic ignored "-Wundef"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "stm32h5xx_hal.h"
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
#pragma GCC diagnostic pop
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "bsp/board_api.h"
|
||||||
|
|
||||||
|
TU_ATTR_UNUSED static void Error_Handler(void) {
|
||||||
|
}
|
||||||
|
|
||||||
|
#include "board.h"
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
void USB_DRD_FS_IRQHandler(void) {
|
||||||
|
tud_int_handler(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// MACRO TYPEDEF CONSTANT ENUM
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
UART_HandleTypeDef UartHandle;
|
||||||
|
|
||||||
|
void board_init(void) {
|
||||||
|
HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS
|
||||||
|
SystemClock_Config(); // implemented in board.h
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
|
||||||
|
// Enable All GPIOs clocks
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||||
|
|
||||||
|
//__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
//__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
UART_CLK_EN();
|
||||||
|
|
||||||
|
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||||
|
// 1ms tick timer
|
||||||
|
SysTick_Config(SystemCoreClock / 1000);
|
||||||
|
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||||
|
// Explicitly disable systick to prevent its ISR runs before scheduler start
|
||||||
|
SysTick->CTRL &= ~1U;
|
||||||
|
|
||||||
|
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||||
|
NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct;
|
||||||
|
|
||||||
|
// LED
|
||||||
|
GPIO_InitStruct.Pin = LED_PIN;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
board_led_write(false);
|
||||||
|
|
||||||
|
// Button
|
||||||
|
GPIO_InitStruct.Pin = BUTTON_PIN;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
#ifdef UART_DEV
|
||||||
|
// UART
|
||||||
|
GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = UART_GPIO_AF;
|
||||||
|
HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
UartHandle = (UART_HandleTypeDef) {
|
||||||
|
.Instance = UART_DEV,
|
||||||
|
.Init.BaudRate = CFG_BOARD_UART_BAUDRATE,
|
||||||
|
.Init.WordLength = UART_WORDLENGTH_8B,
|
||||||
|
.Init.StopBits = UART_STOPBITS_1,
|
||||||
|
.Init.Parity = UART_PARITY_NONE,
|
||||||
|
.Init.HwFlowCtl = UART_HWCONTROL_NONE,
|
||||||
|
.Init.Mode = UART_MODE_TX_RX,
|
||||||
|
.Init.OverSampling = UART_OVERSAMPLING_16,
|
||||||
|
.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
|
||||||
|
};
|
||||||
|
HAL_UART_Init(&UartHandle);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// USB Pins TODO double check USB clock and pin setup
|
||||||
|
// Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
|
||||||
|
GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_USB_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* Enable VDDUSB */
|
||||||
|
HAL_PWREx_EnableVddUSB();
|
||||||
|
}
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// Board porting API
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
|
||||||
|
void board_led_write(bool state) {
|
||||||
|
GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
|
||||||
|
HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t board_button_read(void) {
|
||||||
|
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
|
||||||
|
}
|
||||||
|
|
||||||
|
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
|
||||||
|
(void) max_len;
|
||||||
|
volatile uint32_t* stm32_uuid = (volatile uint32_t*) UID_BASE;
|
||||||
|
uint32_t* id32 = (uint32_t*) (uintptr_t) id;
|
||||||
|
uint8_t const len = 12;
|
||||||
|
|
||||||
|
id32[0] = stm32_uuid[0];
|
||||||
|
id32[1] = stm32_uuid[1];
|
||||||
|
id32[2] = stm32_uuid[2];
|
||||||
|
|
||||||
|
return len;
|
||||||
|
}
|
||||||
|
|
||||||
|
int board_uart_read(uint8_t* buf, int len) {
|
||||||
|
(void) buf;
|
||||||
|
(void) len;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int board_uart_write(void const* buf, int len) {
|
||||||
|
#ifdef UART_DEV
|
||||||
|
HAL_UART_Transmit(&UartHandle, (uint8_t*) (uintptr_t) buf, len, 0xffff);
|
||||||
|
return len;
|
||||||
|
#else
|
||||||
|
(void) buf;
|
||||||
|
(void) len;
|
||||||
|
(void) UartHandle;
|
||||||
|
return 0;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||||
|
volatile uint32_t system_ticks = 0;
|
||||||
|
|
||||||
|
void SysTick_Handler(void) {
|
||||||
|
system_ticks++;
|
||||||
|
HAL_IncTick();
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t board_millis(void) {
|
||||||
|
return system_ticks;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void HardFault_Handler(void) {
|
||||||
|
__asm("BKPT #0\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
// Required by __libc_init_array in startup code if we are compiling using
|
||||||
|
// -nostdlib/-nostartfiles.
|
||||||
|
void _init(void) {
|
||||||
|
|
||||||
|
}
|
||||||
116
hw/bsp/stm32h5/family.cmake
Normal file
116
hw/bsp/stm32h5/family.cmake
Normal file
@ -0,0 +1,116 @@
|
|||||||
|
include_guard()
|
||||||
|
|
||||||
|
if (NOT BOARD)
|
||||||
|
message(FATAL_ERROR "BOARD not specified")
|
||||||
|
endif ()
|
||||||
|
|
||||||
|
set(ST_FAMILY h5)
|
||||||
|
set(ST_PREFIX stm32${ST_FAMILY}xx)
|
||||||
|
|
||||||
|
set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
|
||||||
|
set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
|
||||||
|
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
|
||||||
|
|
||||||
|
# include board specific
|
||||||
|
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||||
|
|
||||||
|
# toolchain set up
|
||||||
|
set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
|
||||||
|
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
|
||||||
|
|
||||||
|
set(FAMILY_MCUS STM32H5 CACHE INTERNAL "")
|
||||||
|
|
||||||
|
|
||||||
|
#------------------------------------
|
||||||
|
# BOARD_TARGET
|
||||||
|
#------------------------------------
|
||||||
|
# only need to be built ONCE for all examples
|
||||||
|
function(add_board_target BOARD_TARGET)
|
||||||
|
if (TARGET ${BOARD_TARGET})
|
||||||
|
return()
|
||||||
|
endif ()
|
||||||
|
|
||||||
|
# Startup & Linker script
|
||||||
|
set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
|
||||||
|
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
|
||||||
|
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
|
||||||
|
|
||||||
|
string(REPLACE "stm32h" "STM32H" MCU_VARIANT_UPPER ${MCU_VARIANT})
|
||||||
|
set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
|
||||||
|
|
||||||
|
add_library(${BOARD_TARGET} STATIC
|
||||||
|
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
|
||||||
|
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
|
||||||
|
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
|
||||||
|
)
|
||||||
|
target_include_directories(${BOARD_TARGET} PUBLIC
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||||
|
${CMSIS_5}/CMSIS/Core/Include
|
||||||
|
${ST_CMSIS}/Include
|
||||||
|
${ST_HAL_DRIVER}/Inc
|
||||||
|
)
|
||||||
|
|
||||||
|
update_board(${BOARD_TARGET})
|
||||||
|
|
||||||
|
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||||
|
target_link_options(${BOARD_TARGET} PUBLIC
|
||||||
|
"LINKER:--script=${LD_FILE_GNU}"
|
||||||
|
-nostartfiles
|
||||||
|
# nanolib
|
||||||
|
--specs=nosys.specs --specs=nano.specs
|
||||||
|
)
|
||||||
|
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
|
||||||
|
target_link_options(${BOARD_TARGET} PUBLIC
|
||||||
|
"LINKER:--config=${LD_FILE_IAR}"
|
||||||
|
)
|
||||||
|
endif ()
|
||||||
|
endfunction()
|
||||||
|
|
||||||
|
|
||||||
|
#------------------------------------
|
||||||
|
# Functions
|
||||||
|
#------------------------------------
|
||||||
|
function(family_configure_example TARGET RTOS)
|
||||||
|
family_configure_common(${TARGET} ${RTOS})
|
||||||
|
|
||||||
|
# Board target
|
||||||
|
add_board_target(board_${BOARD})
|
||||||
|
|
||||||
|
#---------- Port Specific ----------
|
||||||
|
# These files are built for each example since it depends on example's tusb_config.h
|
||||||
|
target_sources(${TARGET} PUBLIC
|
||||||
|
# BSP
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
|
||||||
|
)
|
||||||
|
target_include_directories(${TARGET} PUBLIC
|
||||||
|
# family, hw, board
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||||
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||||
|
)
|
||||||
|
|
||||||
|
# Add TinyUSB target and port source
|
||||||
|
family_add_tinyusb(${TARGET} OPT_MCU_STM32H5 ${RTOS})
|
||||||
|
target_sources(${TARGET}-tinyusb PUBLIC
|
||||||
|
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
|
||||||
|
${TOP}/src/portable/st/typec/typec_stm32.c
|
||||||
|
)
|
||||||
|
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
|
||||||
|
|
||||||
|
# Link dependencies
|
||||||
|
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
|
||||||
|
|
||||||
|
# Flashing
|
||||||
|
family_flash_stlink(${TARGET})
|
||||||
|
family_flash_jlink(${TARGET})
|
||||||
|
endfunction()
|
||||||
62
hw/bsp/stm32h5/family.mk
Normal file
62
hw/bsp/stm32h5/family.mk
Normal file
@ -0,0 +1,62 @@
|
|||||||
|
ST_FAMILY = h5
|
||||||
|
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
|
||||||
|
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
|
||||||
|
|
||||||
|
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||||
|
CPU_CORE ?= cortex-m33
|
||||||
|
|
||||||
|
MCU_VARIANT_UPPER = $(subst stm32h,STM32H,$(MCU_VARIANT))
|
||||||
|
|
||||||
|
# --------------
|
||||||
|
# Compiler Flags
|
||||||
|
# --------------
|
||||||
|
CFLAGS += \
|
||||||
|
-DCFG_TUSB_MCU=OPT_MCU_STM32H5
|
||||||
|
|
||||||
|
# GCC Flags
|
||||||
|
CFLAGS_GCC += \
|
||||||
|
-flto \
|
||||||
|
-nostdlib -nostartfiles \
|
||||||
|
|
||||||
|
# suppress warning caused by vendor mcu driver
|
||||||
|
CFLAGS_GCC += \
|
||||||
|
-Wno-error=cast-align \
|
||||||
|
-Wno-error=undef \
|
||||||
|
-Wno-error=unused-parameter \
|
||||||
|
|
||||||
|
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
|
||||||
|
|
||||||
|
# -----------------
|
||||||
|
# Sources & Include
|
||||||
|
# -----------------
|
||||||
|
|
||||||
|
SRC_C += \
|
||||||
|
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
|
||||||
|
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
|
||||||
|
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c
|
||||||
|
|
||||||
|
INC += \
|
||||||
|
$(TOP)/$(BOARD_PATH) \
|
||||||
|
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||||
|
$(TOP)/$(ST_CMSIS)/Include \
|
||||||
|
$(TOP)/$(ST_HAL_DRIVER)/Inc
|
||||||
|
|
||||||
|
# Startup
|
||||||
|
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
|
||||||
|
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
|
||||||
|
|
||||||
|
# Linker
|
||||||
|
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
|
||||||
|
LD_FILE_GCC = $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT_UPPER)_FLASH.ld
|
||||||
|
|
||||||
|
# flash target using on-board stlink
|
||||||
|
flash: flash-stlink
|
||||||
355
hw/bsp/stm32h5/stm32h5xx_hal_conf.h
Normal file
355
hw/bsp/stm32h5/stm32h5xx_hal_conf.h
Normal file
@ -0,0 +1,355 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h5xx_hal_conf.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief HAL configuration file.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2018-2021 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32h5xx_HAL_CONF_H
|
||||||
|
#define STM32h5xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
/* #define HAL_ADC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CEC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_COMP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DAC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_EXTI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_FDCAN_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HCD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_I2C_MODULE_ENABLED */
|
||||||
|
/* #define HAL_I2S_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_PCD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RNG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_TIM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_USART_MODULE_ENABLED */
|
||||||
|
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* ########################## Register Callbacks selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules where register callback can be used
|
||||||
|
*/
|
||||||
|
#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_CEC_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_DAC_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_HCD_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_I2S_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_UART_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
|
||||||
|
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Core Speed oscillator (CSI) default value.
|
||||||
|
* This value is the default CSI range value after Reset.
|
||||||
|
*/
|
||||||
|
#if !defined (CSI_VALUE)
|
||||||
|
#define CSI_VALUE 4000000UL /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* CSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE 64000000UL /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
|
||||||
|
* This internal oscillator is mainly dedicated to provide a high precision clock to
|
||||||
|
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
|
||||||
|
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
|
||||||
|
* which is subject to manufacturing process variations.
|
||||||
|
*/
|
||||||
|
#if !defined (HSI48_VALUE)
|
||||||
|
#define HSI48_VALUE 48000000UL /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
|
||||||
|
The real value my vary depending on manufacturing process variations.*/
|
||||||
|
#endif /* HSI48_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Low Speed oscillator (LSI) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
#define LSI_VALUE 32000UL /*!< LSI Typical Value in Hz*/
|
||||||
|
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature.*/
|
||||||
|
|
||||||
|
#if !defined (LSI_STARTUP_TIME)
|
||||||
|
#define LSI_STARTUP_TIME 130UL /*!< Time out for LSI start up, in ms */
|
||||||
|
#endif /* LSI_STARTUP_TIME */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE 32768UL /*!< Value of the External oscillator in Hz*/
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT 5000UL /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* LSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External clock source for SPI/SAI peripheral
|
||||||
|
* This value is used by the SPI/SAI HAL module to compute the SPI/SAI clock source
|
||||||
|
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||||
|
|
||||||
|
*/
|
||||||
|
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||||
|
#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
|
||||||
|
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ############################################ System Configuration ################################################ */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define VDD_VALUE 3300UL /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority (lowest by default) */
|
||||||
|
#define USE_RTOS 0U
|
||||||
|
#define PREFETCH_ENABLE 0U /*!< Enable prefetch */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/* ################## SPI peripheral configuration ########################## */
|
||||||
|
|
||||||
|
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||||
|
* Activated: CRC code is present inside driver
|
||||||
|
* Deactivated: CRC code cleaned from driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USE_SPI_CRC 0U
|
||||||
|
|
||||||
|
/* ################## CRYP peripheral configuration ########################## */
|
||||||
|
|
||||||
|
#define USE_HAL_CRYP_SUSPEND_RESUME 1U
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
/* #define USE_FULL_ASSERT 1U */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include modules header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_adc.h"
|
||||||
|
#include "stm32h5xx_hal_adc_ex.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CEC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_cec.h"
|
||||||
|
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_COMP_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_comp.h"
|
||||||
|
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_cryp.h"
|
||||||
|
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_exti.h"
|
||||||
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_fdcan.h"
|
||||||
|
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HCD_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_hcd.h"
|
||||||
|
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_lptim.h"
|
||||||
|
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RNG_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_rng.h"
|
||||||
|
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_smbus.h"
|
||||||
|
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32h5xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for functions parameters check.
|
||||||
|
* @param expr If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t *file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32h5xx_HAL_CONF_H */
|
||||||
@ -210,6 +210,11 @@
|
|||||||
|
|
||||||
#define TUP_DCD_ENDPOINT_MAX 9
|
#define TUP_DCD_ENDPOINT_MAX 9
|
||||||
|
|
||||||
|
#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
|
||||||
|
#define TUP_USBIP_FSDEV
|
||||||
|
#define TUP_USBIP_FSDEV_STM32
|
||||||
|
#define TUP_DCD_ENDPOINT_MAX 8
|
||||||
|
|
||||||
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
|
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
|
||||||
// Device controller
|
// Device controller
|
||||||
#define TUP_USBIP_FSDEV
|
#define TUP_USBIP_FSDEV
|
||||||
|
|||||||
@ -242,7 +242,7 @@ void dcd_init (uint8_t rhport)
|
|||||||
}
|
}
|
||||||
USB->CNTR = 0; // Enable USB
|
USB->CNTR = 0; // Enable USB
|
||||||
|
|
||||||
#ifndef STM32G0 // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
|
#if !defined(STM32G0) && !defined(STM32H5) // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
|
||||||
USB->BTABLE = DCD_STM32_BTABLE_BASE;
|
USB->BTABLE = DCD_STM32_BTABLE_BASE;
|
||||||
#endif
|
#endif
|
||||||
USB->ISTR = 0; // Clear pending interrupts
|
USB->ISTR = 0; // Clear pending interrupts
|
||||||
@ -358,6 +358,9 @@ void dcd_int_enable (uint8_t rhport)
|
|||||||
NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
|
NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||||
|
NVIC_EnableIRQ(USB_DRD_FS_IRQn);
|
||||||
|
|
||||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||||
NVIC_EnableIRQ(USB_HP_IRQn);
|
NVIC_EnableIRQ(USB_HP_IRQn);
|
||||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||||
@ -415,6 +418,9 @@ void dcd_int_disable(uint8_t rhport)
|
|||||||
NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
|
NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||||
|
NVIC_DisableIRQ(USB_DRD_FS_IRQn);
|
||||||
|
|
||||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||||
NVIC_DisableIRQ(USB_HP_IRQn);
|
NVIC_DisableIRQ(USB_HP_IRQn);
|
||||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||||
|
|||||||
@ -110,6 +110,35 @@
|
|||||||
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||||
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||||
|
|
||||||
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||||
|
#include "stm32h5xx.h"
|
||||||
|
#define PMA_32BIT_ACCESS
|
||||||
|
#define PMA_LENGTH (2048u)
|
||||||
|
#undef USB_PMAADDR
|
||||||
|
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||||
|
#define USB_TypeDef USB_DRD_TypeDef
|
||||||
|
#define EP0R CHEP0R
|
||||||
|
#define USB_EP_CTR_RX USB_EP_VTRX
|
||||||
|
#define USB_EP_CTR_TX USB_EP_VTTX
|
||||||
|
#define USB_EP_T_FIELD USB_CHEP_UTYPE
|
||||||
|
#define USB_EPREG_MASK USB_CHEP_REG_MASK
|
||||||
|
#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
|
||||||
|
#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
|
||||||
|
#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
|
||||||
|
#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
|
||||||
|
#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
|
||||||
|
#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
|
||||||
|
#define USB_EPRX_STAT USB_CH_RX_VALID
|
||||||
|
#define USB_EPKIND_MASK USB_EP_KIND_MASK
|
||||||
|
#define USB USB_DRD_FS
|
||||||
|
#define USB_CNTR_FRES USB_CNTR_USBRST
|
||||||
|
#define USB_CNTR_RESUME USB_CNTR_L2RES
|
||||||
|
#define USB_ISTR_EP_ID USB_ISTR_IDN
|
||||||
|
#define USB_EPADDR_FIELD USB_CHEP_ADDR
|
||||||
|
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||||
|
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||||
|
|
||||||
|
|
||||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||||
#include "stm32wbxx.h"
|
#include "stm32wbxx.h"
|
||||||
#define PMA_LENGTH (1024u)
|
#define PMA_LENGTH (1024u)
|
||||||
|
|||||||
@ -86,6 +86,7 @@
|
|||||||
#define OPT_MCU_STM32WB 312 ///< ST WB
|
#define OPT_MCU_STM32WB 312 ///< ST WB
|
||||||
#define OPT_MCU_STM32U5 313 ///< ST U5
|
#define OPT_MCU_STM32U5 313 ///< ST U5
|
||||||
#define OPT_MCU_STM32L5 314 ///< ST L5
|
#define OPT_MCU_STM32L5 314 ///< ST L5
|
||||||
|
#define OPT_MCU_STM32H5 315 ///< ST H5
|
||||||
|
|
||||||
// Sony
|
// Sony
|
||||||
#define OPT_MCU_CXD56 400 ///< SONY CXD56
|
#define OPT_MCU_CXD56 400 ///< SONY CXD56
|
||||||
|
|||||||
@ -95,6 +95,9 @@ deps_optional = {
|
|||||||
'hw/mcu/st/cmsis_device_h7': ['https://github.com/STMicroelectronics/cmsis_device_h7.git',
|
'hw/mcu/st/cmsis_device_h7': ['https://github.com/STMicroelectronics/cmsis_device_h7.git',
|
||||||
'60dc2c913203dc8629dc233d4384dcc41c91e77f',
|
'60dc2c913203dc8629dc233d4384dcc41c91e77f',
|
||||||
'stm32h7'],
|
'stm32h7'],
|
||||||
|
'hw/mcu/st/cmsis_device_h5': ['https://github.com/STMicroelectronics/cmsis_device_h5.git',
|
||||||
|
'62b2cb0fbfe10c5791ee469bbde7b397c2fea8f5',
|
||||||
|
'stm32h5'],
|
||||||
'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git',
|
'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git',
|
||||||
'06748ca1f93827befdb8b794402320d94d02004f',
|
'06748ca1f93827befdb8b794402320d94d02004f',
|
||||||
'stm32l0'],
|
'stm32l0'],
|
||||||
@ -140,6 +143,9 @@ deps_optional = {
|
|||||||
'hw/mcu/st/stm32h7xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git',
|
'hw/mcu/st/stm32h7xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git',
|
||||||
'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04',
|
'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04',
|
||||||
'stm32h7'],
|
'stm32h7'],
|
||||||
|
'hw/mcu/st/stm32h5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h5xx_hal_driver.git',
|
||||||
|
'2cf77de584196d619cec1b4586c3b9e2820a254e',
|
||||||
|
'stm32h5'],
|
||||||
'hw/mcu/st/stm32l0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git',
|
'hw/mcu/st/stm32l0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git',
|
||||||
'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b',
|
'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b',
|
||||||
'stm32l0'],
|
'stm32l0'],
|
||||||
@ -170,7 +176,7 @@ deps_optional = {
|
|||||||
'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
|
'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
|
||||||
'20285262657d1b482d132d20d755c8c330d55c1f',
|
'20285262657d1b482d132d20d755c8c330d55c1f',
|
||||||
'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
|
'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
|
||||||
'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
|
'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5'
|
||||||
'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
|
'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
|
||||||
'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
|
'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
|
||||||
'e73e04ca63495672d955f9268e003cffe168fcd8',
|
'e73e04ca63495672d955f9268e003cffe168fcd8',
|
||||||
@ -204,16 +210,16 @@ def get_a_dep(d):
|
|||||||
# Init git deps if not existed
|
# Init git deps if not existed
|
||||||
if not p.exists():
|
if not p.exists():
|
||||||
p.mkdir(parents=True)
|
p.mkdir(parents=True)
|
||||||
run_cmd(f"git -C {p} init")
|
run_cmd(f"{git_cmd} init")
|
||||||
run_cmd(f"git -C {p} remote add origin {url}")
|
run_cmd(f"{git_cmd} remote add origin {url}")
|
||||||
|
|
||||||
# Check if commit is already fetched
|
# Check if commit is already fetched
|
||||||
result = run_cmd(f"git -C {p} rev-parse HEAD")
|
result = run_cmd(f"{git_cmd} rev-parse HEAD")
|
||||||
head = result.stdout.decode("utf-8").splitlines()[0]
|
head = result.stdout.decode("utf-8").splitlines()[0]
|
||||||
run_cmd(f"git -C {p} reset --hard")
|
run_cmd(f"{git_cmd} reset --hard")
|
||||||
if commit != head:
|
if commit != head:
|
||||||
run_cmd(f"git -C {p} fetch --depth 1 origin {commit}")
|
run_cmd(f"{git_cmd} fetch --depth 1 origin {commit}")
|
||||||
run_cmd(f"git -C {p} checkout FETCH_HEAD")
|
run_cmd(f"{git_cmd} checkout FETCH_HEAD")
|
||||||
|
|
||||||
return 0
|
return 0
|
||||||
|
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user