mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
remove pipe handle in host msc
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7a626dbc8b
commit
7c2056defb
@ -76,7 +76,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr)
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bool tuh_msc_is_busy(uint8_t dev_addr)
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{
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return msch_data[dev_addr-1].is_initialized &&
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hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].bulk_in);
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hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].ep_in);
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}
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uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr)
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@ -116,16 +116,16 @@ static tusb_error_t msch_command_xfer(uint8_t dev_addr, msch_interface_t * p_msc
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{ // there is data phase
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if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
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{
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED );
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}else
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{
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TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED );
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}
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}
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED);
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED);
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return TUSB_ERROR_NONE;
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}
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@ -225,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t *
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memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len);
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// TODO MSCH refractor test uinit ready
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
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TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED );
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return TUSB_ERROR_NONE;
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}
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@ -307,11 +307,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
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TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
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pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ?
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&p_msc->bulk_in : &p_msc->bulk_out;
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(*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc);
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TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) );
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TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc));
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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@ -365,7 +361,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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// NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence
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// Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work
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if ( hcd_pipe_is_stalled(dev_addr, p_msc->bulk_in) )
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if ( hcd_pipe_is_stalled(dev_addr, p_msc->ep_in) )
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{
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// clear stall TODO abstract clear stall function
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request = (tusb_control_request_t) {
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@ -378,7 +374,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL ));
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hcd_pipe_clear_stall(dev_addr, p_msc->bulk_in);
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hcd_pipe_clear_stall(dev_addr, p_msc->ep_in);
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TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status
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//------------- SCSI Request Sense -------------//
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@ -417,8 +413,8 @@ void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t x
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void msch_close(uint8_t dev_addr)
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{
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(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_in);
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(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_out);
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(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_in);
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(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_out);
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tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t));
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osal_semaphore_reset(msch_sem_hdl);
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@ -187,9 +187,8 @@ void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes);
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//--------------------------------------------------------------------+
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#ifdef _TINY_USB_SOURCE_FILE_
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typedef struct {
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pipe_handle_t bulk_in, bulk_out;
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typedef struct
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{
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uint8_t itf_numr;
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uint8_t ep_in;
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uint8_t ep_out;
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@ -75,11 +75,10 @@ static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms)
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static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
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static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
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static inline ehci_qhd_t* qhd_find_free (void);
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static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
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static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr);
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static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr);
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// determine if a queue head has bus-related error
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static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd)
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@ -435,7 +434,7 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes)
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{
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//------------- set up QTD -------------//
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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ehci_qtd_t *p_qtd = qtd_find_free(dev_addr);
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TU_ASSERT(p_qtd);
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@ -453,7 +452,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t
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{
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TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) );
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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if ( int_on_complete )
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{ // the just added qtd is pointed by list_tail
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@ -467,7 +466,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t
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/// pipe_close should only be called as a part of unmount/safe-remove process
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bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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// async list needs async advance handshake to make sure host controller has released cached data
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// non-control does not use async advance, it will eventually free by control pipe close
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@ -494,19 +493,19 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
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bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL);
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}
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bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd);
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}
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tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr);
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ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
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p_qhd->qtd_overlay.halted = 0;
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// TODO reset data toggle ?
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return TUSB_ERROR_NONE;
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@ -839,7 +838,7 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd)
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return (ehci_qhd_t*) tu_align32(p_qhd->next.address);
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}
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static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr)
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static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
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@ -49,6 +49,9 @@
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extern "C" {
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#endif
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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typedef enum
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{
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HCD_EVENT_DEVICE_ATTACH,
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@ -92,13 +95,6 @@ enum {
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//#define HCD_MAX_XFER 16
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#endif
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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typedef struct {
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uint8_t reserved[4];
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} pipe_handle_t;
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//--------------------------------------------------------------------+
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// USBH-HCD API
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//--------------------------------------------------------------------+
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@ -131,7 +127,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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// PIPE API
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//--------------------------------------------------------------------+
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// TODO control xfer should be used via usbh layer
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bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet
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bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete);
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