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remove pipe handle in host msc

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hathach 2018-12-11 01:02:11 +07:00
parent 7a626dbc8b
commit 7c2056defb
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4 changed files with 26 additions and 37 deletions
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30
src/class/msc/msc_host.c
View File

@ -76,7 +76,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr)
bool tuh_msc_is_busy(uint8_t dev_addr) bool tuh_msc_is_busy(uint8_t dev_addr)
{ {
return msch_data[dev_addr-1].is_initialized && return msch_data[dev_addr-1].is_initialized &&
hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].bulk_in); hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].ep_in);
} }
uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr) uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr)
@ -116,16 +116,16 @@ static tusb_error_t msch_command_xfer(uint8_t dev_addr, msch_interface_t * p_msc
{ // there is data phase { // there is data phase
if (p_msch->cbw.dir & TUSB_DIR_IN_MASK) if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
{ {
TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED );
}else }else
{ {
TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED );
TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED );
} }
} }
TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED); TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED);
return TUSB_ERROR_NONE; return TUSB_ERROR_NONE;
} }
@ -225,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t *
memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len); memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len);
// TODO MSCH refractor test uinit ready // TODO MSCH refractor test uinit ready
TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED );
TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED ); TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED );
return TUSB_ERROR_NONE; return TUSB_ERROR_NONE;
} }
@ -307,11 +307,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType);
TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc));
&p_msc->bulk_in : &p_msc->bulk_out;
(*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc);
TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) );
if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
{ {
@ -365,7 +361,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
// NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence // NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence
// Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work // Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work
if ( hcd_pipe_is_stalled(dev_addr, p_msc->bulk_in) ) if ( hcd_pipe_is_stalled(dev_addr, p_msc->ep_in) )
{ {
// clear stall TODO abstract clear stall function // clear stall TODO abstract clear stall function
request = (tusb_control_request_t) { request = (tusb_control_request_t) {
@ -378,7 +374,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL )); TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL ));
hcd_pipe_clear_stall(dev_addr, p_msc->bulk_in); hcd_pipe_clear_stall(dev_addr, p_msc->ep_in);
TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status
//------------- SCSI Request Sense -------------// //------------- SCSI Request Sense -------------//
@ -417,8 +413,8 @@ void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t x
void msch_close(uint8_t dev_addr) void msch_close(uint8_t dev_addr)
{ {
(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_in); (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_in);
(void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_out); (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_out);
tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t)); tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t));
osal_semaphore_reset(msch_sem_hdl); osal_semaphore_reset(msch_sem_hdl);

5
src/class/msc/msc_host.h
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@ -187,9 +187,8 @@ void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes);
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
#ifdef _TINY_USB_SOURCE_FILE_ #ifdef _TINY_USB_SOURCE_FILE_
typedef struct { typedef struct
pipe_handle_t bulk_in, bulk_out; {
uint8_t itf_numr; uint8_t itf_numr;
uint8_t ep_in; uint8_t ep_in;
uint8_t ep_out; uint8_t ep_out;

17
src/host/ehci/ehci.c
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@ -75,11 +75,10 @@ static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms)
static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
static inline ehci_qhd_t* qhd_find_free (void); static inline ehci_qhd_t* qhd_find_free (void);
static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr); static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr);
// determine if a queue head has bus-related error // determine if a queue head has bus-related error
static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd)
@ -435,7 +434,7 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes)
{ {
//------------- set up QTD -------------// //------------- set up QTD -------------//
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); ehci_qtd_t *p_qtd = qtd_find_free(dev_addr);
TU_ASSERT(p_qtd); TU_ASSERT(p_qtd);
@ -453,7 +452,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t
{ {
TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) ); TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) );
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
if ( int_on_complete ) if ( int_on_complete )
{ // the just added qtd is pointed by list_tail { // the just added qtd is pointed by list_tail
@ -467,7 +466,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t
/// pipe_close should only be called as a part of unmount/safe-remove process /// pipe_close should only be called as a part of unmount/safe-remove process
bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
// async list needs async advance handshake to make sure host controller has released cached data // async list needs async advance handshake to make sure host controller has released cached data
// non-control does not use async advance, it will eventually free by control pipe close // non-control does not use async advance, it will eventually free by control pipe close
@ -494,19 +493,19 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr) bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL);
} }
bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr) bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd);
} }
tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
p_qhd->qtd_overlay.halted = 0; p_qhd->qtd_overlay.halted = 0;
// TODO reset data toggle ? // TODO reset data toggle ?
return TUSB_ERROR_NONE; return TUSB_ERROR_NONE;
@ -839,7 +838,7 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd)
return (ehci_qhd_t*) tu_align32(p_qhd->next.address); return (ehci_qhd_t*) tu_align32(p_qhd->next.address);
} }
static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr) static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;

11
src/host/hcd.h
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@ -49,6 +49,9 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
typedef enum typedef enum
{ {
HCD_EVENT_DEVICE_ATTACH, HCD_EVENT_DEVICE_ATTACH,
@ -92,13 +95,6 @@ enum {
//#define HCD_MAX_XFER 16 //#define HCD_MAX_XFER 16
#endif #endif
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
typedef struct {
uint8_t reserved[4];
} pipe_handle_t;
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// USBH-HCD API // USBH-HCD API
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -131,7 +127,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
// PIPE API // PIPE API
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// TODO control xfer should be used via usbh layer // TODO control xfer should be used via usbh layer
bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet
bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete);