mirror of
https://github.com/hathach/tinyusb.git
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bsp lpc11
This commit is contained in:
parent
1867ba0bc1
commit
80be1aa13d
2
.github/workflows/build_arm.yml
vendored
2
.github/workflows/build_arm.yml
vendored
@ -35,7 +35,7 @@ jobs:
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- 'broadcom_32bit'
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- 'imxrt'
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- 'kinetis_k32 kinetis_kl'
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- 'lpc15 lpc18'
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- 'lpc11 lpc15 lpc18'
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- 'lpc54 lpc55'
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- 'mm32 msp432e4'
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- 'nrf'
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24
hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
Normal file
24
hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
Normal file
@ -0,0 +1,24 @@
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MCU = 11uxx
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MCU_DRV = 11xx
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CFLAGS += \
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-DCORE_M0 \
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-DCFG_EXAMPLE_MSC_READONLY \
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-DCFG_EXAMPLE_VIDEO_READONLY \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'
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# mcu driver cause following warnings
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CFLAGS += \
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-Wno-error=strict-prototypes \
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-Wno-error=unused-parameter \
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-Wno-error=redundant-decls
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/lpc11u37.ld
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# For flash-jlink target
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JLINK_DEVICE = LPC11U37/401
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PYOCD_TARGET = lpc11u37
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# flash using pyocd
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flash: flash-pyocd
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@ -25,7 +25,7 @@
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*/
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#include "chip.h"
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#include "../board.h"
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#include "bsp/board.h"
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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18
hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk
Normal file
18
hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk
Normal file
@ -0,0 +1,18 @@
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MCU = 11u6x
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MCU_DRV = 11u6x
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CFLAGS += \
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-DCORE_M0PLUS \
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-D__VTOR_PRESENT=0 \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/lpc11u68.ld
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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PYOCD_TARGET = lpc11u68
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# flash using pyocd
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flash: flash-pyocd
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@ -25,7 +25,7 @@
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*/
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#include "chip.h"
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#include "../board.h"
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#include "bsp/board.h"
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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43
hw/bsp/lpc11/family.mk
Normal file
43
hw/bsp/lpc11/family.mk
Normal file
@ -0,0 +1,43 @@
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DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
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include $(TOP)/$(BOARD_PATH)/board.mk
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m0plus \
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-nostdlib \
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-D__USE_LPCOPEN \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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SRC_C += \
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \
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$(MCU_DIR)/src/chip_$(MCU_DRV).c \
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$(MCU_DIR)/src/clock_$(MCU_DRV).c \
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$(MCU_DIR)/src/iocon_$(MCU_DRV).c \
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$(MCU_DIR)/src/sysinit_$(MCU_DRV).c
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ifeq ($(MCU),11u6x)
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SRC_C += \
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$(MCU_DIR)/src/gpio_$(MCU_DRV).c \
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$(MCU_DIR)/src/syscon_$(MCU_DRV).c \
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else
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SRC_C += \
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$(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \
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$(MCU_DIR)/src/sysctl_$(MCU_DRV).c
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endif
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INC += \
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$(TOP)/$(MCU_DIR)/inc
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# For freeRTOS port source
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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@ -1,46 +0,0 @@
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DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m0 \
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-nostdlib \
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-DCORE_M0 \
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-D__USE_LPCOPEN \
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-DCFG_EXAMPLE_MSC_READONLY \
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-DCFG_EXAMPLE_VIDEO_READONLY \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls
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MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/$(BOARD)/lpc11u37.ld
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SRC_C += \
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \
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$(MCU_DIR)/src/chip_11xx.c \
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$(MCU_DIR)/src/clock_11xx.c \
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$(MCU_DIR)/src/gpio_11xx_1.c \
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$(MCU_DIR)/src/iocon_11xx.c \
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$(MCU_DIR)/src/sysctl_11xx.c \
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$(MCU_DIR)/src/sysinit_11xx.c
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INC += \
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$(TOP)/$(MCU_DIR)/inc
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# For freeRTOS port source
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
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# For flash-jlink target
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JLINK_DEVICE = LPC11U37/401
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# flash using pyocd
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flash: $(BUILD)/$(PROJECT).hex
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pyocd flash -t lpc11u37 $<
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@ -1,42 +0,0 @@
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DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m0plus \
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-nostdlib \
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-DCORE_M0PLUS \
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-D__VTOR_PRESENT=0 \
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-D__USE_LPCOPEN \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/$(BOARD)/lpc11u68.ld
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SRC_C += \
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \
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$(MCU_DIR)/src/chip_11u6x.c \
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$(MCU_DIR)/src/clock_11u6x.c \
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$(MCU_DIR)/src/gpio_11u6x.c \
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$(MCU_DIR)/src/iocon_11u6x.c \
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$(MCU_DIR)/src/syscon_11u6x.c \
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$(MCU_DIR)/src/sysinit_11u6x.c
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INC += \
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$(TOP)/$(MCU_DIR)/inc
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# For freeRTOS port source
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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# flash using pyocd
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flash: $(BUILD)/$(PROJECT).hex
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pyocd flash -t lpc11u68 $<
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