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able to build with host msc
This commit is contained in:
parent
9478c647e3
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125
examples/host/cdc_msc_hid/src/msc_app.c
Normal file
125
examples/host/cdc_msc_hid/src/msc_app.c
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@ -0,0 +1,125 @@
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/**************************************************************************/
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/*!
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@file msc_app.c
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@author hathach (tinyusb.org)
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2018, hathach (tinyusb.org)
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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This file is part of the tinyusb stack.
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*/
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/**************************************************************************/
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#include "tusb.h"
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#if CFG_TUH_MSC
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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//--------------------------------------------------------------------+
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//------------- IMPLEMENTATION -------------//
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void tuh_msc_mounted_cb(uint8_t dev_addr)
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{
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puts("\na MassStorage device is mounted");
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// //------------- Disk Information -------------//
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// // SCSI VendorID[8] & ProductID[16] from Inquiry Command
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// uint8_t const* p_vendor = tuh_msc_get_vendor_name(dev_addr);
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// uint8_t const* p_product = tuh_msc_get_product_name(dev_addr);
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//
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// for(uint8_t i=0; i<8; i++) putchar(p_vendor[i]);
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//
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// putchar(' ');
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// for(uint8_t i=0; i<16; i++) putchar(p_product[i]);
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// putchar('\n');
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//
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// uint32_t last_lba, block_size;
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// tuh_msc_get_capacity(dev_addr, &last_lba, &block_size);
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// printf("Disk Size: %d MB\n", (last_lba+1)/ ((1024*1024)/block_size) );
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// printf("LBA 0-0x%X Block Size: %d\n", last_lba, block_size);
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//
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// //------------- file system (only 1 LUN support) -------------//
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// uint8_t phy_disk = dev_addr-1;
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// disk_initialize(phy_disk);
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//
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// if ( disk_is_ready(phy_disk) )
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// {
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// if ( f_mount(phy_disk, &fatfs[phy_disk]) != FR_OK )
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// {
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// puts("mount failed");
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// return;
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// }
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//
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// puts("---------------------------------------------------------------------");
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// puts("- MASSSTORAGE CLASS CLI IS A IMMATURE CODE. DISK-WRITING COMMANDS");
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// puts("- SUCH AS cp(COPY), mkdir(MAKE DIRECTORY) ARE POTENTIAL TO DAMAGE");
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// puts("- YOUR USB THUMBDRIVE. USING THOSE COMMANDS ARE AT YOUR OWN RISK.");
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// puts("- THE AUTHOR HAS NO RESPONSIBILITY WITH YOUR DEVICE NOR ITS DATA");
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// puts("---------------------------------------------------------------------");
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//
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// f_chdrive(phy_disk); // change to newly mounted drive
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// f_chdir("/"); // root as current dir
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//
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// cli_init();
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// }
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}
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void tuh_msc_unmounted_cb(uint8_t dev_addr)
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{
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puts("\na MassStorage device is unmounted");
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// uint8_t phy_disk = dev_addr-1;
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//
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// f_mount(phy_disk, NULL); // unmount disk
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// disk_deinitialize(phy_disk);
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//
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// if ( phy_disk == f_get_current_drive() )
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// { // active drive is unplugged --> change to other drive
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// for(uint8_t i=0; i<CFG_TUSB_HOST_DEVICE_MAX; i++)
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// {
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// if ( disk_is_ready(i) )
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// {
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// f_chdrive(i);
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// cli_init(); // refractor, rename
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// }
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// }
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// }
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}
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// invoked ISR context
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void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes)
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{
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(void) dev_addr;
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(void) event;
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(void) xferred_bytes;
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}
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#endif
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@ -88,7 +88,7 @@
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#define CFG_TUSB_HOST_HID_KEYBOARD 0
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#define CFG_TUSB_HOST_HID_MOUSE 0
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#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported)
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#define CFG_TUH_MSC 0
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#define CFG_TUH_MSC 1
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#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports
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@ -51,13 +51,14 @@
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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CFG_TUSB_MEM_SECTION STATIC_VAR msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
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CFG_TUSB_MEM_SECTION static msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
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//------------- Initalization Data -------------//
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static osal_semaphore_def_t msch_sem_def;
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static osal_semaphore_t msch_sem_hdl;
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// buffer used to read scsi information when mounted, largest response data currently is inquiry
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t msch_buffer[sizeof(scsi_inquiry_data_t)];
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t msch_buffer[sizeof(scsi_inquiry_resp_t)];
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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@ -117,11 +118,11 @@ static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer)
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if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
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{
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.xfer_bytes) );
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) );
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}else
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{
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.xfer_bytes, false) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) );
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}
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}
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@ -136,7 +137,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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p_msch->cbw.xfer_bytes = sizeof(scsi_inquiry_data_t);
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p_msch->cbw.total_bytes = sizeof(scsi_inquiry_resp_t);
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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p_msch->cbw.cmd_len = sizeof(scsi_inquiry_t);
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@ -144,7 +145,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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scsi_inquiry_t cmd_inquiry =
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{
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.cmd_code = SCSI_CMD_INQUIRY,
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.alloc_length = sizeof(scsi_inquiry_data_t)
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.alloc_length = sizeof(scsi_inquiry_resp_t)
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};
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memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len);
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@ -160,7 +161,7 @@ tusb_error_t tusbh_msc_read_capacity10(uint8_t dev_addr, uint8_t lun, uint8_t *p
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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p_msch->cbw.xfer_bytes = sizeof(scsi_read_capacity10_data_t);
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p_msch->cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t);
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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p_msch->cbw.cmd_len = sizeof(scsi_read_capacity10_t);
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@ -186,7 +187,7 @@ tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_dat
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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p_msch->cbw.xfer_bytes = 18;
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p_msch->cbw.total_bytes = 18;
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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p_msch->cbw.cmd_len = sizeof(scsi_request_sense_t);
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@ -211,7 +212,7 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t *
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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p_msch->cbw.xfer_bytes = 0; // Number of bytes
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p_msch->cbw.total_bytes = 0; // Number of bytes
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p_msch->cbw.dir = TUSB_DIR_OUT;
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p_msch->cbw.cmd_len = sizeof(scsi_test_unit_ready_t);
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@ -238,7 +239,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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p_msch->cbw.xfer_bytes = p_msch->block_size*block_count; // Number of bytes
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p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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p_msch->cbw.cmd_len = sizeof(scsi_read10_t);
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@ -247,7 +248,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin
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{
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.cmd_code = SCSI_CMD_READ_10,
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.lba = __n2be(lba),
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.block_count = u16_le2be(block_count)
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.block_count = tu_u16_le2be(block_count)
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};
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memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len);
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@ -264,7 +265,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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p_msch->cbw.xfer_bytes = p_msch->block_size*block_count; // Number of bytes
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p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes
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p_msch->cbw.dir = TUSB_DIR_OUT;
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p_msch->cbw.cmd_len = sizeof(scsi_write10_t);
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@ -273,7 +274,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe
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{
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.cmd_code = SCSI_CMD_WRITE_10,
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.lba = __n2be(lba),
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.block_count = u16_le2be(block_count)
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.block_count = tu_u16_le2be(block_count)
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};
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memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len);
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@ -289,15 +290,13 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe
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void msch_init(void)
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{
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tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX);
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msch_sem_hdl = osal_semaphore_create(1, 0);
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msch_sem_hdl = osal_semaphore_create(&msch_sem_def);
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}
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tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
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bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
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{
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tusb_error_t error;
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OSAL_SUBTASK_BEGIN
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if (! ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass &&
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MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ) )
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{
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@ -310,14 +309,14 @@ tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_
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for(uint32_t i=0; i<2; i++)
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{
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STASK_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType);
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STASK_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer);
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TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType);
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TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer);
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pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ?
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&msch_data[dev_addr-1].bulk_in : &msch_data[dev_addr-1].bulk_out;
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(*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_MSC);
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STASK_ASSERT( pipehandle_is_valid(*p_pipe_hdl) );
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TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) );
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p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint );
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}
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@ -327,74 +326,73 @@ tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_
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//------------- Get Max Lun -------------//
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STASK_INVOKE(
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usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_INTERFACE),
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MSC_REQ_GET_MAX_LUN, 0, msch_data[dev_addr-1].interface_number,
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1, msch_buffer ),
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error
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);
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STASK_ASSERT( TUSB_ERROR_NONE == error /* && TODO STALL means zero */);
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tusb_control_request_t request = {
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.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN },
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.bRequest = MSC_REQ_GET_MAX_LUN,
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.wValue = 0,
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.wIndex = msch_data[dev_addr-1].interface_number,
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.wLength = 1
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};
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// TODO STALL means zero
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TU_ASSERT( usbh_control_xfer( dev_addr, &request, msch_buffer ) );
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msch_data[dev_addr-1].max_lun = msch_buffer[0];
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#if 0
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//------------- Reset -------------//
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STASK_INVOKE(
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usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_INTERFACE),
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MSC_REQ_RESET, 0, msch_data[dev_addr-1].interface_number,
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0, NULL ),
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error
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);
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request = (tusb_control_request_t) {
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.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT },
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.bRequest = MSC_REQ_RESET,
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.wValue = 0,
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.wIndex = msch_data[dev_addr-1].interface_number,
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.wLength = 0
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};
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TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) );
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#endif
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enum { SCSI_XFER_TIMEOUT = 2000 };
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//------------- SCSI Inquiry -------------//
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tusbh_msc_inquiry(dev_addr, 0, msch_buffer);
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osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error);
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STASK_ASSERT_ERR(error);
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TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) );
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memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_data_t*) msch_buffer)->vendor_id , 8);
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memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_data_t*) msch_buffer)->product_id, 16);
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memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_resp_t*) msch_buffer)->vendor_id , 8);
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memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_resp_t*) msch_buffer)->product_id, 16);
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//------------- SCSI Read Capacity 10 -------------//
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tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer);
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osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error);
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STASK_ASSERT_ERR(error);
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TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
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// NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence
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// Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work
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if ( hcd_pipe_is_stalled(msch_data[dev_addr-1].bulk_in) )
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{ // clear stall TODO abstract clear stall function
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STASK_INVOKE(
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usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_ENDPOINT),
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TUSB_REQ_CLEAR_FEATURE, 0, hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in),
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||||
0, NULL ),
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error
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||||
);
|
||||
STASK_ASSERT_ERR(error);
|
||||
{
|
||||
// clear stall TODO abstract clear stall function
|
||||
request = (tusb_control_request_t) {
|
||||
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_ENDPOINT, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT },
|
||||
.bRequest = TUSB_REQ_CLEAR_FEATURE,
|
||||
.wValue = 0,
|
||||
.wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in),
|
||||
.wLength = 0
|
||||
};
|
||||
|
||||
TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL ));
|
||||
|
||||
hcd_pipe_clear_stall(msch_data[dev_addr-1].bulk_in);
|
||||
osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); // wait for SCSI status
|
||||
STASK_ASSERT_ERR(error);
|
||||
TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status
|
||||
|
||||
//------------- SCSI Request Sense -------------//
|
||||
(void) tuh_msc_request_sense(dev_addr, 0, msch_buffer);
|
||||
osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error);
|
||||
STASK_ASSERT_ERR(error);
|
||||
TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
|
||||
|
||||
//------------- Re-read SCSI Read Capactity -------------//
|
||||
tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer);
|
||||
osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error);
|
||||
STASK_ASSERT_ERR(error);
|
||||
TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
|
||||
}
|
||||
|
||||
msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_data_t*)msch_buffer)->last_lba );
|
||||
msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_data_t*)msch_buffer)->block_size );
|
||||
msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->last_lba );
|
||||
msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->block_size );
|
||||
|
||||
msch_data[dev_addr-1].is_initialized = true;
|
||||
tuh_msc_mounted_cb(dev_addr);
|
||||
|
||||
OSAL_SUBTASK_END
|
||||
}
|
||||
|
||||
void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes)
|
||||
@ -406,7 +404,7 @@ void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_byte
|
||||
tuh_msc_isr(pipe_hdl.dev_addr, event, xferred_bytes);
|
||||
}else
|
||||
{ // still initializing under open subtask
|
||||
osal_semaphore_post(msch_sem_hdl);
|
||||
osal_semaphore_post(msch_sem_hdl, true);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -203,10 +203,11 @@ typedef struct {
|
||||
msc_csw_t csw;
|
||||
}msch_interface_t;
|
||||
|
||||
void msch_init(void);
|
||||
tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
|
||||
void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
|
||||
void msch_close(uint8_t dev_addr);
|
||||
void msch_init(void);
|
||||
bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
|
||||
void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
|
||||
void msch_close(uint8_t dev_addr);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
@ -294,7 +294,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[])
|
||||
bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[])
|
||||
{
|
||||
ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr);
|
||||
|
||||
@ -332,7 +332,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t con
|
||||
|
||||
p_qhd->qtd_overlay.next.address = (uint32_t) p_setup;
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
return true;
|
||||
}
|
||||
|
||||
tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
|
||||
|
@ -128,7 +128,7 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr);
|
||||
//--------------------------------------------------------------------+
|
||||
// TODO control xfer should be used via usbh layer
|
||||
tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) ATTR_WARN_UNUSED_RESULT;
|
||||
tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT;
|
||||
bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT;
|
||||
tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
|
||||
|
||||
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT;
|
||||
|
@ -291,7 +291,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[])
|
||||
bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[])
|
||||
{
|
||||
ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed;
|
||||
|
||||
@ -331,7 +331,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t con
|
||||
|
||||
OHCI_REG->command_status_bit.control_list_filled = 1;
|
||||
|
||||
return TUSB_ERROR_NONE;
|
||||
return true;
|
||||
}
|
||||
|
||||
tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
|
||||
|
@ -199,7 +199,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8
|
||||
dev->control.request = *request;
|
||||
dev->control.pipe_status = 0;
|
||||
|
||||
TU_ASSERT_ERR(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data), false);
|
||||
TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data));
|
||||
TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
|
||||
|
||||
osal_mutex_unlock(dev->control.mutex_hdl);
|
||||
|
@ -100,7 +100,7 @@ void test_addr0_control_close(void)
|
||||
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) );
|
||||
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr,
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr,
|
||||
&(tusb_control_request_t) {
|
||||
.bmRequestType_bit = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQ_TYPE_STANDARD, .recipient = TUSB_REQ_RECIPIENT_DEVICE },
|
||||
.bRequest = TUSB_REQ_SET_ADDRESS,
|
||||
@ -126,7 +126,7 @@ void test_isr_disconnect_then_async_advance_control_pipe(void)
|
||||
{
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) );
|
||||
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr,
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr,
|
||||
&(tusb_control_request_t) {
|
||||
.bmRequestType_bit = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQ_TYPE_STANDARD, .recipient = TUSB_REQ_RECIPIENT_DEVICE },
|
||||
.bRequest = TUSB_REQ_SET_ADDRESS,
|
||||
|
@ -149,7 +149,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) );
|
||||
|
||||
//------------- Code Under TEST -------------//
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
|
||||
p_setup = &ehci_data.addr0_qtd[0];
|
||||
p_data = &ehci_data.addr0_qtd[1];
|
||||
@ -171,7 +171,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
|
||||
void test_control_xfer_get(void)
|
||||
{
|
||||
//------------- Code Under TEST -------------//
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
|
||||
TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
|
||||
TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
|
||||
@ -206,7 +206,7 @@ void test_control_xfer_get(void)
|
||||
void test_control_xfer_set(void)
|
||||
{
|
||||
//------------- Code Under TEST -------------//
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data) );
|
||||
|
||||
TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
|
||||
TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
|
||||
@ -226,7 +226,7 @@ void test_control_xfer_set(void)
|
||||
|
||||
void test_control_xfer_complete_isr(void)
|
||||
{
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
|
||||
usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_SUCCESS, 18);
|
||||
|
||||
@ -245,7 +245,7 @@ void test_control_xfer_complete_isr(void)
|
||||
|
||||
void test_control_xfer_error_isr(void)
|
||||
{
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
|
||||
usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_FAILED, 0);
|
||||
|
||||
@ -264,7 +264,7 @@ void test_control_xfer_error_isr(void)
|
||||
|
||||
void test_control_xfer_error_stall(void)
|
||||
{
|
||||
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
|
||||
|
||||
usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_STALLED, 0);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user