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rename VERIFY_STATUS to VERIFY_ERR
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@ -95,14 +95,14 @@ static inline void verify_breakpoint(void)
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/*------------- Generator for VERIFY and VERIFY_HDLR -------------*/
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#define VERIFY_DEFINE(_cond, _handler, _error) do { if ( !(_cond) ) { _handler; return _error; } } while(0)
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/*------------- Generator for VERIFY_STATUS and VERIFY_STATUS_HDLR -------------*/
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#define VERIFY_STS_DEF2(sts, _handler) \
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/*------------- Generator for VERIFY_ERR and VERIFY_ERR_HDLR -------------*/
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#define VERIFY_ERR_DEF2(sts, _handler) \
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do { \
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uint32_t _status = (uint32_t)(sts); \
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if ( 0 != _status ) { _VERIFY_MESS(_status); _handler; return _status; }\
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} while(0)
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#define VERIFY_STS_DEF3(sts, _handler, _error) \
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#define VERIFY_ERR_DEF3(sts, _handler, _error) \
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do { \
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uint32_t _status = (uint32_t)(sts); \
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if ( 0 != _status ) { _VERIFY_MESS(_status); _handler; return _error; }\
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@ -135,23 +135,23 @@ static inline void verify_breakpoint(void)
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/*------------------------------------------------------------------*/
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/* VERIFY STATUS
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* - VERIFY_STS_1ARGS : return status of condition if failed
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* - VERIFY_STS_2ARGS : return provided status code if failed
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* - VERIFY_ERR_1ARGS : return status of condition if failed
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* - VERIFY_ERR_2ARGS : return provided status code if failed
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*------------------------------------------------------------------*/
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#define VERIFY_STS_1ARGS(sts) VERIFY_STS_DEF2(sts, )
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#define VERIFY_STS_2ARGS(sts, _error) VERIFY_STS_DEF3(sts, ,_error)
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#define VERIFY_ERR_1ARGS(sts) VERIFY_ERR_DEF2(sts, )
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#define VERIFY_ERR_2ARGS(sts, _error) VERIFY_ERR_DEF3(sts, ,_error)
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#define VERIFY_STATUS(...) GET_3RD_ARG(__VA_ARGS__, VERIFY_STS_2ARGS, VERIFY_STS_1ARGS)(__VA_ARGS__)
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#define VERIFY_ERR(...) GET_3RD_ARG(__VA_ARGS__, VERIFY_ERR_2ARGS, VERIFY_ERR_1ARGS)(__VA_ARGS__)
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/*------------------------------------------------------------------*/
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/* VERIFY STATUS WITH HANDLER
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* - VERIFY_STS_HDLR_2ARGS : execute handler, return status if failed
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* - VERIFY_STS_HDLR_3ARGS : execute handler, return provided error if failed
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* - VERIFY_ERR_HDLR_2ARGS : execute handler, return status if failed
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* - VERIFY_ERR_HDLR_3ARGS : execute handler, return provided error if failed
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*------------------------------------------------------------------*/
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#define VERIFY_STS_HDLR_2ARGS(sts, _handler) VERIFY_STS_DEF2(sts, _handler)
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#define VERIFY_STS_HDLR_3ARGS(sts, _handler, _error) VERIFY_STS_DEF3(sts, _handler, _error)
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#define VERIFY_ERR_HDLR_2ARGS(sts, _handler) VERIFY_ERR_DEF2(sts, _handler)
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#define VERIFY_ERR_HDLR_3ARGS(sts, _handler, _error) VERIFY_ERR_DEF3(sts, _handler, _error)
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#define VERIFY_STATUS_HDLR(...) GET_4TH_ARG(__VA_ARGS__, VERIFY_STS_HDLR_3ARGS, VERIFY_STS_HDLR_2ARGS)(__VA_ARGS__)
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#define VERIFY_ERR_HDLR(...) GET_4TH_ARG(__VA_ARGS__, VERIFY_ERR_HDLR_3ARGS, VERIFY_ERR_HDLR_2ARGS)(__VA_ARGS__)
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@ -170,8 +170,8 @@ static inline void verify_breakpoint(void)
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/* ASSERT Error
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* basically VERIFY Error with verify_breakpoint() as handler
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*------------------------------------------------------------------*/
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#define ASERT_ERR_1ARGS(_err) VERIFY_STS_DEF2(_err, verify_breakpoint())
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#define ASERT_ERR_2ARGS(_err, _ret) VERIFY_STS_DEF3(_err, verify_breakpoint(), _ret)
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#define ASERT_ERR_1ARGS(_err) VERIFY_ERR_DEF2(_err, verify_breakpoint())
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#define ASERT_ERR_2ARGS(_err, _ret) VERIFY_ERR_DEF3(_err, verify_breakpoint(), _ret)
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#define ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASERT_ERR_2ARGS, ASERT_ERR_1ARGS)(__VA_ARGS__)
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@ -78,8 +78,8 @@
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#define STASK_INVOKE(_subtask, _status) (_status) = _subtask
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//------------- Sub Task Assert -------------//
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#define STASK_ASSERT_ERR(_err) VERIFY_STATUS(_err)
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#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_STATUS_HDLR(_err, _func)
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#define STASK_ASSERT_ERR(_err) VERIFY_ERR(_err)
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#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_ERR_HDLR(_err, _func)
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#define STASK_ASSERT(_cond) VERIFY(_cond, TUSB_ERROR_OSAL_TASK_FAILED)
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#define STASK_ASSERT_HDLR(_cond, _func) VERIFY_HDLR(_cond, _func)
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@ -125,8 +125,8 @@ static inline osal_task_t osal_task_create(osal_func_t code, const char* name, u
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//------------- Sub Task Assert -------------//
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#define STASK_RETURN(error) do { TASK_RESTART; return error; } while(0)
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#define STASK_ASSERT_ERR(_err) VERIFY_STATUS_HDLR(_err, TASK_RESTART)
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#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_STATUS_HDLR(_err, _func; TASK_RESTART )
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#define STASK_ASSERT_ERR(_err) VERIFY_ERR_HDLR(_err, TASK_RESTART)
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#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_ERR_HDLR(_err, _func; TASK_RESTART )
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#define STASK_ASSERT(_cond) VERIFY_HDLR(_cond, TASK_RESTART)
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#define STASK_ASSERT_HDLR(_cond, _func) VERIFY_HDLR(_cond, _func; TASK_RESTART)
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@ -399,13 +399,13 @@ bool dcd_control_xfer(uint8_t rhport, tusb_dir_t dir, uint8_t * p_buffer, uint16
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dcd_data.control_dma.remaining_bytes = length;
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// lpc17xx already received the first DATA OUT packet by now
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VERIFY_STATUS ( pipe_control_xfer(ep_data, p_buffer, length), false );
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VERIFY_ERR ( pipe_control_xfer(ep_data, p_buffer, length), false );
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}
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//------------- Status Phase (opposite direct to Data) -------------//
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if (dir == TUSB_DIR_OUT)
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{ // only write for CONTROL OUT, CONTROL IN data will be retrieved in hal_dcd_isr // TODO ????
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VERIFY_STATUS ( pipe_control_write(NULL, 0), false );
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VERIFY_ERR ( pipe_control_write(NULL, 0), false );
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}
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return true;
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