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add lpc11u68 ses file

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hathach 2018-12-01 01:43:57 +07:00
parent c1186ad6a9
commit a157c7fdc9
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GPG Key ID: 2FA891220FBFD581
9 changed files with 13048 additions and 382 deletions
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145
examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Startup.s Normal file
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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 2014 - 2018 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* conditions are met: *
* *
* - Redistributions of source code must retain the above copyright *
* notice, this list of conditions and the following disclaimer. *
* *
* - Neither the name of SEGGER Microcontroller GmbH *
* nor the names of its contributors may be used to endorse or *
* promote products derived from this software without specific *
* prior written permission. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. *
* IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
*********************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* NO_STACK_INIT *
* *
* If defined, the stack pointer will not be initialised. *
* *
* NO_SYSTEM_INIT *
* *
* If defined, the SystemInit() function will not be called. By default *
* SystemInit() is called after reset to enable the clocks and memories to *
* be initialised prior to any C startup initialisation. *
* *
* NO_VTOR_CONFIG *
* *
* If defined, the vector table offset register will not be configured. *
* *
* MEMORY_INIT *
* *
* If defined, the MemoryInit() function will be called. By default *
* MemoryInit() is called after SystemInit() to enable an external memory *
* controller. *
* *
* STACK_INIT_VAL *
* *
* If defined, specifies the initial stack pointer value. If undefined, *
* the stack pointer will be initialised to point to the end of the *
* RAM segment. *
* *
* VECTORS_IN_RAM *
* *
* If defined, the exception vectors will be copied from Flash to RAM. *
* *
*****************************************************************************/
.syntax unified
.global Reset_Handler
.extern _vectors
.section .init, "ax"
.thumb_func
.equ VTOR_REG, 0xE000ED08
#ifndef STACK_INIT_VAL
#define STACK_INIT_VAL __RAM_segment_end__
#endif
Reset_Handler:
#ifndef NO_STACK_INIT
/* Initialize main stack */
ldr r0, =STACK_INIT_VAL
ldr r1, =0x7
bics r0, r1
mov sp, r0
#endif
#ifndef NO_SYSTEM_INIT
/* Initialize system */
ldr r0, =SystemInit
blx r0
.pushsection .init_array, "aw", %init_array
.word SystemCoreClockUpdate
.popsection
#endif
#ifdef MEMORY_INIT
ldr r0, =MemoryInit
blx r0
#endif
#ifdef VECTORS_IN_RAM
/* Copy exception vectors into RAM */
ldr r0, =__vectors_start__
ldr r1, =__vectors_end__
ldr r2, =__vectors_ram_start__
1:
cmp r0, r1
beq 2f
ldr r3, [r0]
str r3, [r2]
adds r0, r0, #4
adds r2, r2, #4
b 1b
2:
#endif
#ifndef NO_VTOR_CONFIG
/* Configure vector table offset register */
ldr r0, =VTOR_REG
#ifdef VECTORS_IN_RAM
ldr r1, =_vectors_ram
#else
ldr r1, =_vectors
#endif
str r1, [r0]
#endif
/* Jump to program start */
b _start

50
examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Target.js Normal file
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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 2014 - 2018 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* conditions are met: *
* *
* - Redistributions of source code must retain the above copyright *
* notice, this list of conditions and the following disclaimer. *
* *
* - Neither the name of SEGGER Microcontroller GmbH *
* nor the names of its contributors may be used to endorse or *
* promote products derived from this software without specific *
* prior written permission. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. *
* IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
*********************************************************************/
function Reset() {
TargetInterface.resetAndStop();
}
function EnableTrace(traceInterfaceType) {
// TODO: Enable trace
}

6
examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U68_MemoryMap.xml Normal file
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<!DOCTYPE Board_Memory_Definition_File>
<root name="LPC11U68">
<MemorySegment name="FLASH" start="0x00000000" size="0x00040000" access="ReadOnly" />
<MemorySegment name="RAM" start="0x10000000" size="0x00008000" access="Read/Write" />
<MemorySegment name="RAM2" start="0x20000000" size="0x00000800" access="Read/Write" />
</root>

11919
examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Registers.xml Normal file
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405
examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Vectors.s Normal file
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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 2014 - 2018 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* conditions are met: *
* *
* - Redistributions of source code must retain the above copyright *
* notice, this list of conditions and the following disclaimer. *
* *
* - Neither the name of SEGGER Microcontroller GmbH *
* nor the names of its contributors may be used to endorse or *
* promote products derived from this software without specific *
* prior written permission. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. *
* IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
*********************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* VECTORS_IN_RAM *
* *
* If defined, an area of RAM will large enough to store the vector table *
* will be reserved. *
* *
*****************************************************************************/
.syntax unified
.code 16
.section .init, "ax"
.align 2
/*****************************************************************************
* Default Exception Handlers *
*****************************************************************************/
.thumb_func
.weak NMI_Handler
NMI_Handler:
b .
.thumb_func
.weak HardFault_Handler
HardFault_Handler:
b .
.thumb_func
.weak SVC_Handler
SVC_Handler:
b .
.thumb_func
.weak PendSV_Handler
PendSV_Handler:
b .
.thumb_func
.weak SysTick_Handler
SysTick_Handler:
b .
.thumb_func
Dummy_Handler:
b .
#if defined(__OPTIMIZATION_SMALL)
.weak PIN_INT0_IRQHandler
.thumb_set PIN_INT0_IRQHandler,Dummy_Handler
.weak PIN_INT1_IRQHandler
.thumb_set PIN_INT1_IRQHandler,Dummy_Handler
.weak PIN_INT2_IRQHandler
.thumb_set PIN_INT2_IRQHandler,Dummy_Handler
.weak PIN_INT3_IRQHandler
.thumb_set PIN_INT3_IRQHandler,Dummy_Handler
.weak PIN_INT4_IRQHandler
.thumb_set PIN_INT4_IRQHandler,Dummy_Handler
.weak PIN_INT5_IRQHandler
.thumb_set PIN_INT5_IRQHandler,Dummy_Handler
.weak PIN_INT6_IRQHandler
.thumb_set PIN_INT6_IRQHandler,Dummy_Handler
.weak PIN_INT7_IRQHandler
.thumb_set PIN_INT7_IRQHandler,Dummy_Handler
.weak GINT0_IRQHandler
.thumb_set GINT0_IRQHandler,Dummy_Handler
.weak GINT1_IRQHandler
.thumb_set GINT1_IRQHandler,Dummy_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Dummy_Handler
.weak USART1_4_IRQHandler
.thumb_set USART1_4_IRQHandler,Dummy_Handler
.weak USART2_3_IRQHandler
.thumb_set USART2_3_IRQHandler,Dummy_Handler
.weak SCT0_1_IRQHandler
.thumb_set SCT0_1_IRQHandler,Dummy_Handler
.weak SSP1_IRQHandler
.thumb_set SSP1_IRQHandler,Dummy_Handler
.weak I2C0_IRQHandler
.thumb_set I2C0_IRQHandler,Dummy_Handler
.weak CT16B0_IRQHandler
.thumb_set CT16B0_IRQHandler,Dummy_Handler
.weak CT16B1_IRQHandler
.thumb_set CT16B1_IRQHandler,Dummy_Handler
.weak CT32B0_IRQHandler
.thumb_set CT32B0_IRQHandler,Dummy_Handler
.weak CT32B1_IRQHandler
.thumb_set CT32B1_IRQHandler,Dummy_Handler
.weak SSP0_IRQHandler
.thumb_set SSP0_IRQHandler,Dummy_Handler
.weak USART_IRQHandler
.thumb_set USART_IRQHandler,Dummy_Handler
.weak USB_IRQHandler
.thumb_set USB_IRQHandler,Dummy_Handler
.weak USB_FIQ_IRQHandler
.thumb_set USB_FIQ_IRQHandler,Dummy_Handler
.weak ADC_A_IRQHandler
.thumb_set ADC_A_IRQHandler,Dummy_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Dummy_Handler
.weak BOD_WDT_IRQHandler
.thumb_set BOD_WDT_IRQHandler,Dummy_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Dummy_Handler
.weak DMA_IRQHandler
.thumb_set DMA_IRQHandler,Dummy_Handler
.weak USBWAKEUP_IRQHandler
.thumb_set USBWAKEUP_IRQHandler,Dummy_Handler
#else
.thumb_func
.weak PIN_INT0_IRQHandler
PIN_INT0_IRQHandler:
b .
.thumb_func
.weak PIN_INT1_IRQHandler
PIN_INT1_IRQHandler:
b .
.thumb_func
.weak PIN_INT2_IRQHandler
PIN_INT2_IRQHandler:
b .
.thumb_func
.weak PIN_INT3_IRQHandler
PIN_INT3_IRQHandler:
b .
.thumb_func
.weak PIN_INT4_IRQHandler
PIN_INT4_IRQHandler:
b .
.thumb_func
.weak PIN_INT5_IRQHandler
PIN_INT5_IRQHandler:
b .
.thumb_func
.weak PIN_INT6_IRQHandler
PIN_INT6_IRQHandler:
b .
.thumb_func
.weak PIN_INT7_IRQHandler
PIN_INT7_IRQHandler:
b .
.thumb_func
.weak GINT0_IRQHandler
GINT0_IRQHandler:
b .
.thumb_func
.weak GINT1_IRQHandler
GINT1_IRQHandler:
b .
.thumb_func
.weak I2C1_IRQHandler
I2C1_IRQHandler:
b .
.thumb_func
.weak USART1_4_IRQHandler
USART1_4_IRQHandler:
b .
.thumb_func
.weak USART2_3_IRQHandler
USART2_3_IRQHandler:
b .
.thumb_func
.weak SCT0_1_IRQHandler
SCT0_1_IRQHandler:
b .
.thumb_func
.weak SSP1_IRQHandler
SSP1_IRQHandler:
b .
.thumb_func
.weak I2C0_IRQHandler
I2C0_IRQHandler:
b .
.thumb_func
.weak CT16B0_IRQHandler
CT16B0_IRQHandler:
b .
.thumb_func
.weak CT16B1_IRQHandler
CT16B1_IRQHandler:
b .
.thumb_func
.weak CT32B0_IRQHandler
CT32B0_IRQHandler:
b .
.thumb_func
.weak CT32B1_IRQHandler
CT32B1_IRQHandler:
b .
.thumb_func
.weak SSP0_IRQHandler
SSP0_IRQHandler:
b .
.thumb_func
.weak USART_IRQHandler
USART_IRQHandler:
b .
.thumb_func
.weak USB_IRQHandler
USB_IRQHandler:
b .
.thumb_func
.weak USB_FIQ_IRQHandler
USB_FIQ_IRQHandler:
b .
.thumb_func
.weak ADC_A_IRQHandler
ADC_A_IRQHandler:
b .
.thumb_func
.weak RTC_IRQHandler
RTC_IRQHandler:
b .
.thumb_func
.weak BOD_WDT_IRQHandler
BOD_WDT_IRQHandler:
b .
.thumb_func
.weak FLASH_IRQHandler
FLASH_IRQHandler:
b .
.thumb_func
.weak DMA_IRQHandler
DMA_IRQHandler:
b .
.thumb_func
.weak USBWAKEUP_IRQHandler
USBWAKEUP_IRQHandler:
b .
#endif
/*****************************************************************************
* Vector Table *
*****************************************************************************/
.section .vectors, "ax"
.align 2
.global _vectors
.extern __stack_end__
.extern Reset_Handler
_vectors:
.word __stack_end__
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SVC_Handler
.word 0 /* Reserved */
.word 0 /* Reserved */
.word PendSV_Handler
.word SysTick_Handler
.word PIN_INT0_IRQHandler
.word PIN_INT1_IRQHandler
.word PIN_INT2_IRQHandler
.word PIN_INT3_IRQHandler
.word PIN_INT4_IRQHandler
.word PIN_INT5_IRQHandler
.word PIN_INT6_IRQHandler
.word PIN_INT7_IRQHandler
.word GINT0_IRQHandler
.word GINT1_IRQHandler
.word I2C1_IRQHandler
.word USART1_4_IRQHandler
.word USART2_3_IRQHandler
.word SCT0_1_IRQHandler
.word SSP1_IRQHandler
.word I2C0_IRQHandler
.word CT16B0_IRQHandler
.word CT16B1_IRQHandler
.word CT32B0_IRQHandler
.word CT32B1_IRQHandler
.word SSP0_IRQHandler
.word USART_IRQHandler
.word USB_IRQHandler
.word USB_FIQ_IRQHandler
.word ADC_A_IRQHandler
.word RTC_IRQHandler
.word BOD_WDT_IRQHandler
.word FLASH_IRQHandler
.word DMA_IRQHandler
.word Dummy_Handler /* Reserved */
.word USBWAKEUP_IRQHandler
_vectors_end:
#ifdef VECTORS_IN_RAM
.section .vectors_ram, "ax"
.align 2
.global _vectors_ram
_vectors_ram:
.space _vectors_end - _vectors, 0
#endif

37
examples/device/cdc_msc_hid/ses/lpc11u6x/flash_placement.xml Normal file
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<!DOCTYPE Linker_Placement_File>
<Root name="Flash Section Placement">
<MemorySegment name="$(FLASH_NAME:FLASH)">
<ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START:)" />
<ProgramSection alignment="4" load="Yes" name=".init" />
<ProgramSection alignment="4" load="Yes" name=".init_rodata" />
<ProgramSection alignment="4" load="Yes" name=".text" />
<ProgramSection alignment="4" load="Yes" name=".dtors" />
<ProgramSection alignment="4" load="Yes" name=".ctors" />
<ProgramSection alignment="4" load="Yes" name=".rodata" />
<ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" />
<ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" />
<ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" />
<ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" />
</MemorySegment>
<MemorySegment name="$(RAM_NAME:RAM);SRAM">
<ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START:$(SRAM_START:))" />
<ProgramSection alignment="4" load="No" name=".fast_run" />
<ProgramSection alignment="4" load="No" name=".data_run" />
<ProgramSection alignment="4" load="No" name=".bss" />
<ProgramSection alignment="4" load="No" name=".tbss" />
<ProgramSection alignment="4" load="No" name=".tdata_run" />
<ProgramSection alignment="4" load="No" name=".non_init" />
<ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" />
<ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" />
<ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" />
</MemorySegment>
<MemorySegment name="$(FLASH2_NAME:FLASH2)">
<ProgramSection alignment="4" load="Yes" name=".text2" />
<ProgramSection alignment="4" load="Yes" name=".rodata2" />
<ProgramSection alignment="4" load="Yes" runin=".data2_run" name=".data2" />
</MemorySegment>
<MemorySegment name="$(RAM2_NAME:RAM2)">
<ProgramSection alignment="4" load="No" name=".data2_run" />
<ProgramSection alignment="4" load="No" name=".bss2" />
</MemorySegment>
</Root>

71
examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject Normal file
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<!DOCTYPE CrossStudio_Project_File>
<solution Name="lpc11u6x" target="8" version="2">
<project Name="lpc11u6x">
<configuration
CMSIS_CORE="Yes"
Name="Common"
Placement="Flash"
Target="LPC11U68"
arm_architecture="v6M"
arm_core_type="Cortex-M0+"
arm_endian="Little"
arm_fpu_type="None"
arm_interwork="No"
arm_linker_heap_size="256"
arm_linker_process_stack_size="0"
arm_linker_stack_size="256"
arm_simulator_memory_simulation_parameter="ROM;0x00000000;0x00040000;RAM;0x10000000;0x00008000;RAM;0x20000000;0x00000800"
arm_target_debug_interface_type="ADIv5"
arm_target_device_name="LPC11U68"
arm_target_interface_type="SWD"
c_preprocessor_definitions="__LPC11U68__;__LPC1100_FAMILY;__LPC11U00_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1"
c_user_include_directories="$(ProjectDir)/CMSIS_5/CMSIS/Include;$(ProjectDir)/LPC1100/CMSIS/Device/Include/LPC11Uxx"
debug_register_definition_file="$(ProjectDir)/LPC11U6x_Registers.xml"
debug_target_connection="J-Link"
gcc_entry_point="Reset_Handler"
linker_memory_map_file="$(ProjectDir)/LPC11U68_MemoryMap.xml"
linker_section_placement_file="$(ProjectDir)/flash_placement.xml"
macros="DeviceHeaderFile=$(PackagesDir)/LPC1100/CMSIS/Device/Include/LPC11Uxx/LPC11U6x.h;DeviceLibraryIdentifier=M0l;DeviceSystemFile=$(PackagesDir)/LPC1100/CMSIS/Device/Source/system_LPC11U6x.c;DeviceVectorsFile=$(PackagesDir)/LPC1100/Source/LPC11U6x_Vectors.s;DeviceFamily=LPC1100;DeviceSubFamily=LPC11U00;Target=LPC11U68;Placement=Flash"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
target_script_file="$(ProjectDir)/LPC1100_Target.js"
target_trace_initialize_script="EnableTrace(&quot;$(TraceInterfaceType)&quot;)" />
<folder Name="CMSIS Files">
<file file_name="LPC1100/CMSIS/Device/Include/LPC11Uxx/LPC11U6x.h" />
<file file_name="LPC1100/CMSIS/Device/Source/system_LPC11U6x.c">
<configuration
Name="Common"
default_code_section=".init"
default_const_section=".init_rodata" />
</file>
</folder>
<folder Name="RTT Files">
<file file_name="SEGGER_RTT.c" />
<file file_name="SEGGER_RTT.h" />
<file file_name="SEGGER_RTT_Conf.h" />
<file file_name="SEGGER_RTT_SES.c" />
</folder>
<folder Name="Script Files">
<file file_name="LPC1100/Scripts/LPC1100_Target.js">
<configuration Name="Common" file_type="Reset Script" />
</file>
</folder>
<folder Name="Source Files">
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc" />
<file file_name="main.c" />
</folder>
<folder Name="System Files">
<file file_name="thumb_crt0.s" />
<file file_name="LPC1100/Source/LPC1100_Startup.s" />
<file file_name="LPC1100/Source/LPC11U6x_Vectors.s">
<configuration Name="Common" file_type="Assembly" />
</file>
</folder>
</project>
<configuration
Name="Debug"
c_preprocessor_definitions="DEBUG"
gcc_debugging_level="Level 3"
gcc_optimization_level="None" />
</solution>

415
examples/device/cdc_msc_hid/ses/lpc11u6x/thumb_crt0.s Normal file
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// **********************************************************************
// * SEGGER Microcontroller GmbH *
// * The Embedded Experts *
// **********************************************************************
// * *
// * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
// * (c) 2001 - 2018 Rowley Associates Limited *
// * *
// * www.segger.com Support: support@segger.com *
// * *
// **********************************************************************
// * *
// * All rights reserved. *
// * *
// * Redistribution and use in source and binary forms, with or *
// * without modification, are permitted provided that the following *
// * conditions are met: *
// * *
// * - Redistributions of source code must retain the above copyright *
// * notice, this list of conditions and the following disclaimer. *
// * *
// * - Neither the name of SEGGER Microcontroller GmbH *
// * nor the names of its contributors may be used to endorse or *
// * promote products derived from this software without specific *
// * prior written permission. *
// * *
// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
// * DISCLAIMED. *
// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
// * DAMAGE. *
// * *
// **********************************************************************
//
//
// Preprocessor Definitions
// ------------------------
// APP_ENTRY_POINT
//
// Defines the application entry point function, if undefined this setting
// defaults to "main".
//
// INITIALIZE_STACK
//
// If defined, the contents of the stack will be initialized to a the
// value 0xCC.
//
// INITIALIZE_SECONDARY_SECTIONS
//
// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized.
//
// INITIALIZE_TCM_SECTIONS
//
// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections
// will be initialized.
//
// INITIALIZE_USER_SECTIONS
//
// If defined, the function InitializeUserMemorySections will be called prior
// to entering main in order to allow the user to initialize any user defined
// memory sections.
//
// FULL_LIBRARY
//
// If defined then
// - argc, argv are setup by the debug_getargs.
// - the exit symbol is defined and executes on return from main.
// - the exit symbol calls destructors, atexit functions and then debug_exit.
//
// If not defined then
// - argc and argv are zero.
// - the exit symbol is defined, executes on return from main and loops
//
#ifndef APP_ENTRY_POINT
#define APP_ENTRY_POINT main
#endif
#ifndef ARGSSPACE
#define ARGSSPACE 128
#endif
.syntax unified
.global _start
.extern APP_ENTRY_POINT
.global exit
.weak exit
#ifdef INITIALIZE_USER_SECTIONS
.extern InitializeUserMemorySections
#endif
.section .init, "ax"
.code 16
.balign 2
.thumb_func
_start:
/* Set up main stack if size > 0 */
ldr r1, =__stack_end__
ldr r0, =__stack_start__
subs r2, r1, r0
beq 1f
#ifdef __ARM_EABI__
movs r2, #0x7
bics r1, r2
#endif
mov sp, r1
#ifdef INITIALIZE_STACK
movs r2, #0xCC
ldr r0, =__stack_start__
bl memory_set
#endif
1:
/* Set up process stack if size > 0 */
ldr r1, =__stack_process_end__
ldr r0, =__stack_process_start__
subs r2, r1, r0
beq 1f
#ifdef __ARM_EABI__
movs r2, #0x7
bics r1, r2
#endif
msr psp, r1
movs r2, #2
msr control, r2
#ifdef INITIALIZE_STACK
movs r2, #0xCC
bl memory_set
#endif
1:
/* Copy initialized memory sections into RAM (if necessary). */
ldr r0, =__data_load_start__
ldr r1, =__data_start__
ldr r2, =__data_end__
bl memory_copy
ldr r0, =__text_load_start__
ldr r1, =__text_start__
ldr r2, =__text_end__
bl memory_copy
ldr r0, =__fast_load_start__
ldr r1, =__fast_start__
ldr r2, =__fast_end__
bl memory_copy
ldr r0, =__ctors_load_start__
ldr r1, =__ctors_start__
ldr r2, =__ctors_end__
bl memory_copy
ldr r0, =__dtors_load_start__
ldr r1, =__dtors_start__
ldr r2, =__dtors_end__
bl memory_copy
ldr r0, =__rodata_load_start__
ldr r1, =__rodata_start__
ldr r2, =__rodata_end__
bl memory_copy
ldr r0, =__tdata_load_start__
ldr r1, =__tdata_start__
ldr r2, =__tdata_end__
bl memory_copy
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__data2_load_start__
ldr r1, =__data2_start__
ldr r2, =__data2_end__
bl memory_copy
ldr r0, =__text2_load_start__
ldr r1, =__text2_start__
ldr r2, =__text2_end__
bl memory_copy
ldr r0, =__rodata2_load_start__
ldr r1, =__rodata2_start__
ldr r2, =__rodata2_end__
bl memory_copy
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
#ifdef INITIALIZE_TCM_SECTIONS
ldr r0, =__data_tcm_load_start__
ldr r1, =__data_tcm_start__
ldr r2, =__data_tcm_end__
bl memory_copy
ldr r0, =__text_tcm_load_start__
ldr r1, =__text_tcm_start__
ldr r2, =__text_tcm_end__
bl memory_copy
ldr r0, =__rodata_tcm_load_start__
ldr r1, =__rodata_tcm_start__
ldr r2, =__rodata_tcm_end__
bl memory_copy
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
/* Zero the bss. */
ldr r0, =__bss_start__
ldr r1, =__bss_end__
movs r2, #0
bl memory_set
ldr r0, =__tbss_start__
ldr r1, =__tbss_end__
movs r2, #0
bl memory_set
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__bss2_start__
ldr r1, =__bss2_end__
mov r2, #0
bl memory_set
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
#ifdef INITIALIZE_TCM_SECTIONS
ldr r0, =__bss_tcm_start__
ldr r1, =__bss_tcm_end__
mov r2, #0
bl memory_set
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
/* Initialize the heap */
ldr r0, = __heap_start__
ldr r1, = __heap_end__
subs r1, r1, r0
cmp r1, #8
blt 1f
movs r2, #0
str r2, [r0]
adds r0, r0, #4
str r1, [r0]
1:
#ifdef INITIALIZE_USER_SECTIONS
ldr r2, =InitializeUserMemorySections
blx r2
#endif
/* Call constructors */
ldr r0, =__ctors_start__
ldr r1, =__ctors_end__
ctor_loop:
cmp r0, r1
beq ctor_end
ldr r2, [r0]
adds r0, #4
push {r0-r1}
blx r2
pop {r0-r1}
b ctor_loop
ctor_end:
/* Setup initial call frame */
movs r0, #0
mov lr, r0
mov r12, sp
.type start, function
start:
/* Jump to application entry point */
#ifdef FULL_LIBRARY
movs r0, #ARGSSPACE
ldr r1, =args
ldr r2, =debug_getargs
blx r2
ldr r1, =args
#else
movs r0, #0
movs r1, #0
#endif
ldr r2, =APP_ENTRY_POINT
blx r2
.thumb_func
exit:
#ifdef FULL_LIBRARY
mov r5, r0 // save the exit parameter/return result
/* Call destructors */
ldr r0, =__dtors_start__
ldr r1, =__dtors_end__
dtor_loop:
cmp r0, r1
beq dtor_end
ldr r2, [r0]
add r0, #4
push {r0-r1}
blx r2
pop {r0-r1}
b dtor_loop
dtor_end:
/* Call atexit functions */
ldr r2, =_execute_at_exit_fns
blx r2
/* Call debug_exit with return result/exit parameter */
mov r0, r5
ldr r2, =debug_exit
blx r2
#endif
/* Returned from application entry point, loop forever. */
exit_loop:
b exit_loop
.thumb_func
memory_copy:
cmp r0, r1
beq 2f
subs r2, r2, r1
beq 2f
1:
ldrb r3, [r0]
adds r0, r0, #1
strb r3, [r1]
adds r1, r1, #1
subs r2, r2, #1
bne 1b
2:
bx lr
.thumb_func
memory_set:
cmp r0, r1
beq 1f
strb r2, [r0]
adds r0, r0, #1
b memory_set
1:
bx lr
// default C/C++ library helpers
.macro HELPER helper_name
.section .text.\helper_name, "ax", %progbits
.balign 2
.global \helper_name
.weak \helper_name
\helper_name:
.thumb_func
.endm
.macro JUMPTO name
#if defined(__thumb__) && !defined(__thumb2__)
mov r12, r0
ldr r0, =\name
push {r0}
mov r0, r12
pop {pc}
#else
b \name
#endif
.endm
HELPER __aeabi_read_tp
ldr r0, =__tbss_start__-8
bx lr
HELPER abort
b .
HELPER __assert
b .
HELPER __aeabi_assert
b .
HELPER __sync_synchronize
bx lr
HELPER __getchar
JUMPTO debug_getchar
HELPER __putchar
JUMPTO debug_putchar
HELPER __open
JUMPTO debug_fopen
HELPER __close
JUMPTO debug_fclose
HELPER __write
mov r3, r0
mov r0, r1
movs r1, #1
JUMPTO debug_fwrite
HELPER __read
mov r3, r0
mov r0, r1
movs r1, #1
JUMPTO debug_fread
HELPER __seek
push {r4, lr}
mov r4, r0
bl debug_fseek
cmp r0, #0
bne 1f
mov r0, r4
bl debug_ftell
pop {r4, pc}
1:
ldr r0, =-1
pop {r4, pc}
// char __user_locale_name_buffer[];
.section .bss.__user_locale_name_buffer, "aw", %nobits
.global __user_locale_name_buffer
.weak __user_locale_name_buffer
__user_locale_name_buffer:
.word 0x0
#ifdef FULL_LIBRARY
.bss
args:
.space ARGSSPACE
#endif
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
.section .stack, "wa", %nobits
.section .stack_process, "wa", %nobits
.section .heap, "wa", %nobits

382
hw/bsp/lpcxpresso11u68/startup/xpresso/cr_startup_lpc11u.c
View File

@ -1,382 +0,0 @@
//*****************************************************************************
// +--+
// | ++----+
// +-++ |
// | |
// +-+--+ |
// | +--+--+
// +----+ Copyright (c) 2011 Code Red Technologies Ltd.
//
// Microcontroller Startup code for use with Red Suite
//
// Version : 110323
//
// Software License Agreement
//
// The software is owned by Code Red Technologies and/or its suppliers, and is
// protected under applicable copyright laws. All rights are reserved. Any
// use in violation of the foregoing restrictions may subject the user to criminal
// sanctions under applicable laws, as well as to civil liability for the breach
// of the terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
// CODE RED TECHNOLOGIES LTD.
//
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
#define SVCall_Handler SVC_Handler
// Code Red - if CMSIS is being used, then SystemInit() routine
// will be called by startup code rather than in application's main()
#if defined (__USE_CMSIS)
#include "LPC11Uxx.h"
#endif
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void SVCall_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void FLEX_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
void FLEX_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for redlib based applications
// main() is the entry point for newlib based applications
//
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
SVCall_Handler, // SVCall handler
0, // Reserved
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// LPC11U specific handlers
FLEX_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
FLEX_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
FLEX_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
FLEX_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
FLEX_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
FLEX_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
FLEX_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
FLEX_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
0, // 10 - Reserved
0, // 11 - Reserved
0, // 12 - Reserved
0, // 13 - Reserved
SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
I2C_IRQHandler, // 15 - I2C0
TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
UART_IRQHandler, // 21 - UART0
USB_IRQHandler, // 22 - USB IRQ
USB_FIQHandler, // 23 - USB FIQ
ADC_IRQHandler, // 24 - ADC (A/D Converter)
WDT_IRQHandler, // 25 - WDT (Watchdog Timer)
BOD_IRQHandler, // 26 - BOD (Brownout Detect)
FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
0, // 28 - Reserved
0, // 29 - Reserved
USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
0, // 31 - Reserved
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
#else
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the load address, execution address and length of the RW data section and
// the execution and length of the BSS (zero initialized) section.
// Note that these symbols are not normally used by the managed linker script
// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
// They are provide here simply so this startup code can be used with earlier
// versions of Red Suite which do not support the more advanced managed linker
// script mechanism introduced in the above version. To enable their use,
// define "USE_OLD_STYLE_DATA_BSS_INIT".
//*****************************************************************************
extern unsigned int _etext;
extern unsigned int _data;
extern unsigned int _edata;
extern unsigned int _bss;
extern unsigned int _ebss;
#endif
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void
ResetISR(void) {
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
#else
// Use Old Style Data and BSS section initialization.
// This will only initialize a single RAM bank.
unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
// Copy the data segment from flash to SRAM.
LoadAddr = &_etext;
ExeAddr = &_data;
EndAddr = &_edata;
SectionLen = (void*)EndAddr - (void*)ExeAddr;
data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
// Zero fill the bss segment
ExeAddr = &_bss;
EndAddr = &_ebss;
SectionLen = (void*)EndAddr - (void*)ExeAddr;
bss_init ((unsigned int)ExeAddr, SectionLen);
#endif
#ifdef __USE_CMSIS
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void SVCall_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void)
{
while(1)
{
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void)
{
while(1)
{
}
}