mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
Merge pull request #1901 from hathach/add-metro-rt1011
Add metro rt1011
This commit is contained in:
Ha Thach
GitHub
commit
ac60a03ea9
3
.github/workflows/trigger.yml
vendored
3
.github/workflows/trigger.yml
vendored
@ -55,6 +55,5 @@ jobs:
|
|||||||
git push origin ${{ github.event.release.tag_name }}
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git push origin ${{ github.event.release.tag_name }}
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||||||
|
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||||||
# Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release
|
# Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release
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||||||
bb={{ github.event.release.body }}
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bb="For release note, please checkout https://github.com/hathach/tinyusb/releases/tag/${{ github.event.release.tag_name }}"
|
||||||
bb=${bb//\n/\\\n}
|
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||||||
curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases
|
curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases
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@ -170,12 +170,7 @@ $(BUILD)/$(PROJECT).elf: $(OBJ)
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endif
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endif
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# UF2 generation, iMXRT need to strip to text only before conversion
|
# UF2 generation, iMXRT need to strip to text only before conversion
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ifeq ($(FAMILY),imxrt)
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ifneq ($(FAMILY),imxrt)
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$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
|
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@echo CREATE $@
|
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||||||
@$(OBJCOPY) -O ihex -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.hex
|
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$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $(BUILD)/$(PROJECT)-textonly.hex
|
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else
|
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$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).hex
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$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).hex
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||||||
@echo CREATE $@
|
@echo CREATE $@
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||||||
$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $^
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$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $^
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|||||||
53
hw/bsp/imxrt/boards/metro_m7_1011/board.h
Normal file
53
hw/bsp/imxrt/boards/metro_m7_1011/board.h
Normal file
@ -0,0 +1,53 @@
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|
/*
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|
* The MIT License (MIT)
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|
*
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|
* Copyright (c) 2019, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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||||||
|
* of this software and associated documentation files (the "Software"), to deal
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|
* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|
* copies of the Software, and to permit persons to whom the Software is
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|
* furnished to do so, subject to the following conditions:
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||||||
|
*
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|
* The above copyright notice and this permission notice shall be included in
|
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|
* all copies or substantial portions of the Software.
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||||||
|
*
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|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
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||||||
|
*
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|
* This file is part of the TinyUSB stack.
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|
*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#include "fsl_device_registers.h"
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// required since iMX RT10xx SDK include this file for board size
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#define BOARD_FLASH_SIZE (8*1024*1024)
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// LED
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#define LED_PINMUX IOMUXC_GPIO_03_GPIOMUX_IO03
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#define LED_PORT GPIO1
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#define LED_PIN 3
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#define LED_STATE_ON 1
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// D2 as button
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#define BUTTON_PINMUX IOMUXC_GPIO_13_GPIOMUX_IO13
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#define BUTTON_PORT GPIO1
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#define BUTTON_PIN 13
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#define BUTTON_STATE_ACTIVE 0
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// UART
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#define UART_PORT LPUART1
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#define UART_RX_PINMUX IOMUXC_GPIO_09_LPUART1_RXD
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#define UART_TX_PINMUX IOMUXC_GPIO_10_LPUART1_TXD
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|
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#endif /* BOARD_H_ */
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17
hw/bsp/imxrt/boards/metro_m7_1011/board.mk
Normal file
17
hw/bsp/imxrt/boards/metro_m7_1011/board.mk
Normal file
@ -0,0 +1,17 @@
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|
CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
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MCU_VARIANT = MIMXRT1011
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# LD file with uf2
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LD_FILE = $(BOARD_PATH)/$(BOARD).ld
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# For flash-jlink target
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JLINK_DEVICE = MIMXRT1011DAE5A
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# For flash-pyocd target
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PYOCD_TARGET = mimxrt1010
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# flash using pyocd
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flash: flash-uf2
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flash-uf2: $(BUILD)/$(PROJECT).uf2
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@echo copying $<
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@$(CP) $< /media/$(USER)/METROM7BOOT
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@ -0,0 +1,48 @@
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/*
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* Copyright 2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "evkmimxrt1010_flexspi_nor_config.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.xip_board"
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
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#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
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__attribute__((section(".boot_hdr.conf")))
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#elif defined(__ICCARM__)
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#pragma location = ".boot_hdr.conf"
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#endif
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const flexspi_nor_config_t qspiflash_config = {
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.memConfig =
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{
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
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.csHoldTime = 3u,
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.csSetupTime = 3u,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFlexSpiSerialClk_100MHz,
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.sflashA1Size = 16u * 1024u * 1024u,
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.lookupTable =
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{
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// Read LUTs
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 24),
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FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
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},
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},
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.blockSize = 64u * 1024u,
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.isUniformBlockSize = false,
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};
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#endif /* XIP_BOOT_HEADER_ENABLE */
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@ -0,0 +1,267 @@
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/*
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* Copyright 2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
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#define __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
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#include <stdint.h>
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#include <stdbool.h>
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#include "fsl_common.h"
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/*! @name Driver version */
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/*@{*/
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/*! @brief XIP_BOARD driver version 2.0.0. */
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#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
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/*@}*/
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/* FLEXSPI memory config block related definitions */
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#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
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#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
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#define FLEXSPI_CFG_BLK_SIZE (512)
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/* FLEXSPI Feature related definitions */
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#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
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/* Lookup table related definitions */
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#define CMD_INDEX_READ 0
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#define CMD_INDEX_READSTATUS 1
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#define CMD_INDEX_WRITEENABLE 2
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#define CMD_INDEX_WRITE 4
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#define CMD_LUT_SEQ_IDX_READ 0
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#define CMD_LUT_SEQ_IDX_READSTATUS 1
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#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
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#define CMD_LUT_SEQ_IDX_WRITE 9
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#define CMD_SDR 0x01
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|
#define CMD_DDR 0x21
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#define RADDR_SDR 0x02
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#define RADDR_DDR 0x22
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#define CADDR_SDR 0x03
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#define CADDR_DDR 0x23
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|
#define MODE1_SDR 0x04
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|
#define MODE1_DDR 0x24
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|
#define MODE2_SDR 0x05
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|
#define MODE2_DDR 0x25
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|
#define MODE4_SDR 0x06
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|
#define MODE4_DDR 0x26
|
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|
#define MODE8_SDR 0x07
|
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|
#define MODE8_DDR 0x27
|
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|
#define WRITE_SDR 0x08
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||||||
|
#define WRITE_DDR 0x28
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|
#define READ_SDR 0x09
|
||||||
|
#define READ_DDR 0x29
|
||||||
|
#define LEARN_SDR 0x0A
|
||||||
|
#define LEARN_DDR 0x2A
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|
#define DATSZ_SDR 0x0B
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||||||
|
#define DATSZ_DDR 0x2B
|
||||||
|
#define DUMMY_SDR 0x0C
|
||||||
|
#define DUMMY_DDR 0x2C
|
||||||
|
#define DUMMY_RWDS_SDR 0x0D
|
||||||
|
#define DUMMY_RWDS_DDR 0x2D
|
||||||
|
#define JMP_ON_CS 0x1F
|
||||||
|
#define STOP 0
|
||||||
|
|
||||||
|
#define FLEXSPI_1PAD 0
|
||||||
|
#define FLEXSPI_2PAD 1
|
||||||
|
#define FLEXSPI_4PAD 2
|
||||||
|
#define FLEXSPI_8PAD 3
|
||||||
|
|
||||||
|
#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
|
||||||
|
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
|
||||||
|
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
|
||||||
|
|
||||||
|
//!@brief Definitions for FlexSPI Serial Clock Frequency
|
||||||
|
typedef enum _FlexSpiSerialClockFreq
|
||||||
|
{
|
||||||
|
kFlexSpiSerialClk_30MHz = 1,
|
||||||
|
kFlexSpiSerialClk_50MHz = 2,
|
||||||
|
kFlexSpiSerialClk_60MHz = 3,
|
||||||
|
kFlexSpiSerialClk_75MHz = 4,
|
||||||
|
kFlexSpiSerialClk_80MHz = 5,
|
||||||
|
kFlexSpiSerialClk_100MHz = 6,
|
||||||
|
kFlexSpiSerialClk_120MHz = 7,
|
||||||
|
kFlexSpiSerialClk_133MHz = 8,
|
||||||
|
} flexspi_serial_clk_freq_t;
|
||||||
|
|
||||||
|
//!@brief FlexSPI clock configuration type
|
||||||
|
enum
|
||||||
|
{
|
||||||
|
kFlexSpiClk_SDR, //!< Clock configure for SDR mode
|
||||||
|
kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
|
||||||
|
};
|
||||||
|
|
||||||
|
//!@brief FlexSPI Read Sample Clock Source definition
|
||||||
|
typedef enum _FlashReadSampleClkSource
|
||||||
|
{
|
||||||
|
kFlexSPIReadSampleClk_LoopbackInternally = 0,
|
||||||
|
kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1,
|
||||||
|
kFlexSPIReadSampleClk_LoopbackFromSckPad = 2,
|
||||||
|
kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
|
||||||
|
} flexspi_read_sample_clk_t;
|
||||||
|
|
||||||
|
//!@brief Misc feature bit definitions
|
||||||
|
enum
|
||||||
|
{
|
||||||
|
kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable
|
||||||
|
kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable
|
||||||
|
kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable
|
||||||
|
kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable
|
||||||
|
kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable
|
||||||
|
kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
|
||||||
|
kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication.
|
||||||
|
};
|
||||||
|
|
||||||
|
//!@brief Flash Type Definition
|
||||||
|
enum
|
||||||
|
{
|
||||||
|
kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR
|
||||||
|
kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND
|
||||||
|
kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH
|
||||||
|
kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
|
||||||
|
kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs
|
||||||
|
};
|
||||||
|
|
||||||
|
//!@brief Flash Pad Definitions
|
||||||
|
enum
|
||||||
|
{
|
||||||
|
kSerialFlash_1Pad = 1,
|
||||||
|
kSerialFlash_2Pads = 2,
|
||||||
|
kSerialFlash_4Pads = 4,
|
||||||
|
kSerialFlash_8Pads = 8,
|
||||||
|
};
|
||||||
|
|
||||||
|
//!@brief FlexSPI LUT Sequence structure
|
||||||
|
typedef struct _lut_sequence
|
||||||
|
{
|
||||||
|
uint8_t seqNum; //!< Sequence Number, valid number: 1-16
|
||||||
|
uint8_t seqId; //!< Sequence Index, valid number: 0-15
|
||||||
|
uint16_t reserved;
|
||||||
|
} flexspi_lut_seq_t;
|
||||||
|
|
||||||
|
//!@brief Flash Configuration Command Type
|
||||||
|
enum
|
||||||
|
{
|
||||||
|
kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc
|
||||||
|
kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
|
||||||
|
kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode
|
||||||
|
kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode
|
||||||
|
kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode
|
||||||
|
kDeviceConfigCmdType_Reset, //!< Reset device command
|
||||||
|
};
|
||||||
|
|
||||||
|
//!@brief FlexSPI Memory Configuration Block
|
||||||
|
typedef struct _FlexSPIConfig
|
||||||
|
{
|
||||||
|
uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL
|
||||||
|
uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
|
||||||
|
uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use
|
||||||
|
uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
|
||||||
|
uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3
|
||||||
|
uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3
|
||||||
|
uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
|
||||||
|
//! Serial NAND, need to refer to datasheet
|
||||||
|
uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
|
||||||
|
uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
|
||||||
|
//! Generic configuration, etc.
|
||||||
|
uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
|
||||||
|
//! DPI/QPI/OPI switch or reset command
|
||||||
|
flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
|
||||||
|
//! sequence number, [31:16] Reserved
|
||||||
|
uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration
|
||||||
|
uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
|
||||||
|
uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
|
||||||
|
flexspi_lut_seq_t
|
||||||
|
configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
|
||||||
|
uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use
|
||||||
|
uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
|
||||||
|
uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use
|
||||||
|
uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
|
||||||
|
//! details
|
||||||
|
uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details
|
||||||
|
uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
|
||||||
|
uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequency, device specific definitions, See System Boot
|
||||||
|
//! Chapter for more details
|
||||||
|
uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
|
||||||
|
//! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
|
||||||
|
uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use
|
||||||
|
uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1
|
||||||
|
uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2
|
||||||
|
uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1
|
||||||
|
uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2
|
||||||
|
uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value
|
||||||
|
uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
|
||||||
|
uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
|
||||||
|
uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value
|
||||||
|
uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command
|
||||||
|
uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands
|
||||||
|
uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
|
||||||
|
uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31
|
||||||
|
uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
|
||||||
|
//! busy flag is 0 when flash device is busy
|
||||||
|
uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences
|
||||||
|
flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
|
||||||
|
uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use
|
||||||
|
} flexspi_mem_config_t;
|
||||||
|
|
||||||
|
/* */
|
||||||
|
#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0
|
||||||
|
#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1
|
||||||
|
#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
|
||||||
|
#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3
|
||||||
|
#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4
|
||||||
|
#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5
|
||||||
|
#define NOR_CMD_INDEX_DUMMY 6 //!< 6
|
||||||
|
#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7
|
||||||
|
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
|
||||||
|
CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
|
||||||
|
2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
|
||||||
|
CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
|
||||||
|
4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
|
||||||
|
CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
|
||||||
|
14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
|
||||||
|
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
|
||||||
|
15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Serial NOR configuration block
|
||||||
|
*/
|
||||||
|
typedef struct _flexspi_nor_config
|
||||||
|
{
|
||||||
|
flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
|
||||||
|
uint32_t pageSize; //!< Page size of Serial NOR
|
||||||
|
uint32_t sectorSize; //!< Sector size of Serial NOR
|
||||||
|
uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command
|
||||||
|
uint8_t isUniformBlockSize; //!< Sector/Block size is the same
|
||||||
|
uint8_t reserved0[2]; //!< Reserved for future use
|
||||||
|
uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3
|
||||||
|
uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command
|
||||||
|
uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false
|
||||||
|
uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP command execution
|
||||||
|
uint32_t blockSize; //!< Block size
|
||||||
|
uint32_t reserve2[11]; //!< Reserved for future use
|
||||||
|
} flexspi_nor_config_t;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__ */
|
||||||
270
hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
Normal file
270
hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
Normal file
@ -0,0 +1,270 @@
|
|||||||
|
/*
|
||||||
|
** ###################################################################
|
||||||
|
** Processors: MIMXRT1011CAE4A
|
||||||
|
** MIMXRT1011DAE5A
|
||||||
|
**
|
||||||
|
** Compiler: GNU C Compiler
|
||||||
|
** Reference manual: IMXRT1010RM Rev.0, 09/2019
|
||||||
|
** Version: rev. 1.0, 2019-08-01
|
||||||
|
** Build: b210709
|
||||||
|
**
|
||||||
|
** Abstract:
|
||||||
|
** Linker file for the GNU C Compiler
|
||||||
|
**
|
||||||
|
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||||
|
** Copyright 2016-2021 NXP
|
||||||
|
** All rights reserved.
|
||||||
|
**
|
||||||
|
** SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
**
|
||||||
|
** http: www.nxp.com
|
||||||
|
** mail: support@nxp.com
|
||||||
|
**
|
||||||
|
** ###################################################################
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Entry Point */
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
|
||||||
|
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
|
||||||
|
VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
|
||||||
|
|
||||||
|
/* Specify the memory areas */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
m_flash_config (RX) : ORIGIN = 0x60000400, LENGTH = 0x00000C00
|
||||||
|
m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
|
||||||
|
|
||||||
|
m_interrupts (RX) : ORIGIN = 0x6000C000, LENGTH = 0x00000400
|
||||||
|
m_text (RX) : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400)
|
||||||
|
m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00008000
|
||||||
|
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00008000
|
||||||
|
m_data2 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00010000
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Define output sections */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
__NCACHE_REGION_START = ORIGIN(m_data2);
|
||||||
|
__NCACHE_REGION_SIZE = 0;
|
||||||
|
|
||||||
|
.flash_config :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__FLASH_BASE = .;
|
||||||
|
KEEP(* (.boot_hdr.conf)) /* flash config section */
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > m_flash_config
|
||||||
|
|
||||||
|
ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
|
||||||
|
|
||||||
|
.ivt : AT(ivt_begin)
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(* (.boot_hdr.ivt)) /* ivt section */
|
||||||
|
KEEP(* (.boot_hdr.boot_data)) /* boot section */
|
||||||
|
KEEP(* (.boot_hdr.dcd_data)) /* dcd section */
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > m_ivt
|
||||||
|
|
||||||
|
/* The startup code goes first into internal RAM */
|
||||||
|
.interrupts :
|
||||||
|
{
|
||||||
|
__VECTOR_TABLE = .;
|
||||||
|
__Vectors = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > m_interrupts
|
||||||
|
|
||||||
|
/* The program code and other data goes into internal RAM */
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text) /* .text sections (code) */
|
||||||
|
*(.text*) /* .text* sections (code) */
|
||||||
|
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||||
|
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||||
|
*(.glue_7) /* glue arm to thumb code */
|
||||||
|
*(.glue_7t) /* glue thumb to arm code */
|
||||||
|
*(.eh_frame)
|
||||||
|
KEEP (*(.init))
|
||||||
|
KEEP (*(.fini))
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.ARM.extab :
|
||||||
|
{
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.ARM :
|
||||||
|
{
|
||||||
|
__exidx_start = .;
|
||||||
|
*(.ARM.exidx*)
|
||||||
|
__exidx_end = .;
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.ctors :
|
||||||
|
{
|
||||||
|
__CTOR_LIST__ = .;
|
||||||
|
/* gcc uses crtbegin.o to find the start of
|
||||||
|
the constructors, so we make sure it is
|
||||||
|
first. Because this is a wildcard, it
|
||||||
|
doesn't matter if the user does not
|
||||||
|
actually link against crtbegin.o; the
|
||||||
|
linker won't look for a file to match a
|
||||||
|
wildcard. The wildcard also means that it
|
||||||
|
doesn't matter which directory crtbegin.o
|
||||||
|
is in. */
|
||||||
|
KEEP (*crtbegin.o(.ctors))
|
||||||
|
KEEP (*crtbegin?.o(.ctors))
|
||||||
|
/* We don't want to include the .ctor section from
|
||||||
|
from the crtend.o file until after the sorted ctors.
|
||||||
|
The .ctor section from the crtend file contains the
|
||||||
|
end of ctors marker and it must be last */
|
||||||
|
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
|
||||||
|
KEEP (*(SORT(.ctors.*)))
|
||||||
|
KEEP (*(.ctors))
|
||||||
|
__CTOR_END__ = .;
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.dtors :
|
||||||
|
{
|
||||||
|
__DTOR_LIST__ = .;
|
||||||
|
KEEP (*crtbegin.o(.dtors))
|
||||||
|
KEEP (*crtbegin?.o(.dtors))
|
||||||
|
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
|
||||||
|
KEEP (*(SORT(.dtors.*)))
|
||||||
|
KEEP (*(.dtors))
|
||||||
|
__DTOR_END__ = .;
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.preinit_array :
|
||||||
|
{
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||||
|
KEEP (*(.preinit_array*))
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.init_array :
|
||||||
|
{
|
||||||
|
PROVIDE_HIDDEN (__init_array_start = .);
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array*))
|
||||||
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
.fini_array :
|
||||||
|
{
|
||||||
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
KEEP (*(SORT(.fini_array.*)))
|
||||||
|
KEEP (*(.fini_array*))
|
||||||
|
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||||
|
} > m_text
|
||||||
|
|
||||||
|
__etext = .; /* define a global symbol at end of code */
|
||||||
|
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
|
||||||
|
|
||||||
|
.interrupts_ram :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__VECTOR_RAM__ = .;
|
||||||
|
__interrupts_ram_start__ = .; /* Create a global symbol at data start */
|
||||||
|
*(.m_interrupts_ram) /* This is a user defined section */
|
||||||
|
. += VECTOR_RAM_SIZE;
|
||||||
|
. = ALIGN(4);
|
||||||
|
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
|
||||||
|
__RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
|
||||||
|
|
||||||
|
.data : AT(__DATA_ROM)
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__DATA_RAM = .;
|
||||||
|
__data_start__ = .; /* create a global symbol at data start */
|
||||||
|
*(m_usb_dma_init_data)
|
||||||
|
*(.data) /* .data sections */
|
||||||
|
*(.data*) /* .data* sections */
|
||||||
|
*(DataQuickAccess) /* quick access data section */
|
||||||
|
KEEP(*(.jcr*))
|
||||||
|
. = ALIGN(4);
|
||||||
|
__data_end__ = .; /* define a global symbol at data end */
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
__ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
|
||||||
|
|
||||||
|
.ram_function : AT(__ram_function_flash_start)
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__ram_function_start__ = .;
|
||||||
|
*(CodeQuickAccess)
|
||||||
|
. = ALIGN(128);
|
||||||
|
__ram_function_end__ = .;
|
||||||
|
} > m_qacode
|
||||||
|
|
||||||
|
__NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
|
||||||
|
.ncache.init : AT(__NDATA_ROM)
|
||||||
|
{
|
||||||
|
__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
||||||
|
*(NonCacheable.init)
|
||||||
|
. = ALIGN(4);
|
||||||
|
__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
|
||||||
|
} > m_data
|
||||||
|
. = __noncachedata_init_end__;
|
||||||
|
.ncache :
|
||||||
|
{
|
||||||
|
*(NonCacheable)
|
||||||
|
. = ALIGN(4);
|
||||||
|
__noncachedata_end__ = .; /* define a global symbol at ncache data end */
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
|
||||||
|
text_end = ORIGIN(m_text) + LENGTH(m_text);
|
||||||
|
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
||||||
|
|
||||||
|
/* Uninitialized data section */
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
/* This is used by the startup in order to initialize the .bss section */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__START_BSS = .;
|
||||||
|
__bss_start__ = .;
|
||||||
|
*(m_usb_dma_noninit_data)
|
||||||
|
*(.bss)
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN(4);
|
||||||
|
__bss_end__ = .;
|
||||||
|
__END_BSS = .;
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
.heap :
|
||||||
|
{
|
||||||
|
. = ALIGN(8);
|
||||||
|
__end__ = .;
|
||||||
|
PROVIDE(end = .);
|
||||||
|
__HeapBase = .;
|
||||||
|
. += HEAP_SIZE;
|
||||||
|
__HeapLimit = .;
|
||||||
|
__heap_limit = .; /* Add for _sbrk */
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(8);
|
||||||
|
. += STACK_SIZE;
|
||||||
|
} > m_data
|
||||||
|
|
||||||
|
/* Initializes stack on the end of block */
|
||||||
|
__StackTop = ORIGIN(m_data) + LENGTH(m_data);
|
||||||
|
__StackLimit = __StackTop - STACK_SIZE;
|
||||||
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
|
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||||
|
|
||||||
|
ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
|
||||||
|
}
|
||||||
@ -57,8 +57,7 @@ void board_init(void)
|
|||||||
{
|
{
|
||||||
// make sure the dcache is on.
|
// make sure the dcache is on.
|
||||||
#if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
|
#if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
|
||||||
if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR))
|
if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR)) SCB_EnableDCache();
|
||||||
SCB_EnableDCache();
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Init clock
|
// Init clock
|
||||||
|
|||||||
@ -28,7 +28,7 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error
|
|||||||
MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
|
MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
|
||||||
|
|
||||||
# All source paths should be relative to the top level.
|
# All source paths should be relative to the top level.
|
||||||
LD_FILE = $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld
|
LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld
|
||||||
|
|
||||||
# TODO for net_lwip_webserver example, but may not needed !!
|
# TODO for net_lwip_webserver example, but may not needed !!
|
||||||
LDFLAGS += \
|
LDFLAGS += \
|
||||||
@ -61,3 +61,9 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
|
|||||||
# For freeRTOS port source
|
# For freeRTOS port source
|
||||||
FREERTOS_PORT = ARM_CM7/r0p1
|
FREERTOS_PORT = ARM_CM7/r0p1
|
||||||
|
|
||||||
|
# UF2 generation, iMXRT need to strip to text only before conversion
|
||||||
|
APPLICATION_ADDR = 0x6000C000
|
||||||
|
$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
|
||||||
|
@echo CREATE $@
|
||||||
|
@$(OBJCOPY) -O binary -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.bin
|
||||||
|
$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b $(APPLICATION_ADDR) -c -o $@ $(BUILD)/$(PROJECT)-textonly.bin
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user