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add CFG_TUD_DWC2_SLAVE_ENABLE = 1 as default
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@ -247,6 +247,10 @@
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// USBIP
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//--------------------------------------------------------------------+
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#ifndef CFG_TUD_DWC2_SLAVE_ENABLE
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#define CFG_TUD_DWC2_SLAVE_ENABLE 1
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#endif
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// DWC2 controller: use DMA for data transfer
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// For processors with data cache enabled, USB endpoint buffer region
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// (defined by CFG_TUSB_MEM_SECTION) must be declared as non-cacheable.
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