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Merge pull request #175 from pigrew/clear_feature_ordering
Clear feature ordering
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commit
b1d29947bc
@ -499,10 +499,6 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
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uint8_t const drv_id = _usbd_dev.ep2drv[ep_num][ep_dir];
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TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT);
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// Some classes such as TMC needs to clear/re-init its buffer when receiving CLEAR_FEATURE request
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// We will forward all request targeted endpoint to its class driver
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// - For non-standard request: driver can ACK or Stall the request by return true/false
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// - For standard request: usbd decide the ACK stage regardless of driver return value
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bool ret = false;
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if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type )
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@ -511,12 +507,6 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
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usbd_control_set_complete_callback(usbd_class_drivers[drv_id].control_complete);
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}
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// Invoke class driver first if available
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if ( usbd_class_drivers[drv_id].control_request )
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{
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ret = usbd_class_drivers[drv_id].control_request(rhport, p_request);
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}
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// Then handle if it is standard request
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if ( TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type )
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{
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@ -552,7 +542,18 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
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default: TU_BREAKPOINT(); return false;
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}
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}
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// Some classes such as TMC needs to clear/re-init its buffer when receiving CLEAR_FEATURE request
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// We will forward all request targeted endpoint to its class driver
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// For class-type requests: must (call tud_control_status(); return true) or (return false)
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// For std-type requests: non-std request codes are already discarded.
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// must not call tud_control_status(), and return value will have no effect
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// class driver is invoked last, so that EP already has EP stall cleared (in event of clear feature EP halt)
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if ( usbd_class_drivers[drv_id].control_request &&
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usbd_class_drivers[drv_id].control_request(rhport, p_request))
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{
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ret = true;
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}
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return ret;
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}
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break;
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@ -633,7 +634,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc,
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ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id;
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}
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len += tu_desc_len(p_desc);
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len = (uint16_t)(len + tu_desc_len(p_desc));
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p_desc = tu_desc_next(p_desc);
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}
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}
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@ -804,7 +805,7 @@ bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count
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{
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tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc;
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TU_VERIFY(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && xfer_type == desc_ep->bmAttributes.xfer);
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TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && xfer_type == desc_ep->bmAttributes.xfer);
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TU_ASSERT(dcd_edpt_open(rhport, desc_ep));
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if ( tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN )
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@ -870,6 +871,7 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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dcd_edpt_stall(rhport, ep_addr);
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_usbd_dev.ep_stall_map[dir] = (uint8_t) tu_bit_set(_usbd_dev.ep_stall_map[dir], epnum);
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_usbd_dev.ep_busy_map[dir] = (uint8_t) tu_bit_set(_usbd_dev.ep_busy_map[dir], epnum);
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}
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void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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@ -878,6 +880,7 @@ void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_edpt_clear_stall(rhport, ep_addr);
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_usbd_dev.ep_busy_map[dir] = (uint8_t) tu_bit_clear(_usbd_dev.ep_busy_map[dir], epnum);
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_usbd_dev.ep_stall_map[dir] = (uint8_t) tu_bit_clear(_usbd_dev.ep_stall_map[dir], epnum);
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}
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@ -122,7 +122,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
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}
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_control_state.total_transferred += xferred_bytes;
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_control_state.buffer += xferred_bytes;
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_control_state.buffer = ((uint8_t*)_control_state.buffer) + xferred_bytes;
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if ( _control_state.total_len == _control_state.total_transferred || xferred_bytes < CFG_TUD_ENDOINT0_SIZE )
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{
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@ -331,7 +331,9 @@ static const tusb_desc_endpoint_t ep0IN_desc =
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.bEndpointAddress = 0x80
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};
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#if defined(__GNUC__) && (__GNUC__ >= 7)
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#pragma GCC diagnostic pop
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#endif
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static void dcd_handle_bus_reset(void)
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{
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@ -349,7 +351,6 @@ static void dcd_handle_bus_reset(void)
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dcd_edpt_open (0, &ep0IN_desc);
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newDADDR = 0u;
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USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero.
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pcd_set_ep_rx_status(USB, 0, USB_EP_RX_VALID); // And start accepting SETUP on EP0
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}
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// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed.
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@ -518,8 +519,22 @@ static uint16_t dcd_ep_ctr_handler(void)
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static void dcd_fs_irqHandler(void) {
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uint16_t int_status = USB->ISTR;
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// unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | USB_ISTR_ESOF | USB_ISTR_L1REQ )
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uint32_t int_status = USB->ISTR;
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//const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
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// | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
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// unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
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// The ST driver loops here on the CTR bit, but that loop has been moved into the
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// dcd_ep_ctr_handler(), so less need to loop here. The other interrupts shouldn't
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// be triggered repeatedly.
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if(int_status & USB_ISTR_RESET) {
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// USBRST is start of reset.
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reg16_clear_bits(&USB->ISTR, USB_ISTR_RESET);
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dcd_handle_bus_reset();
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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return; // Don't do the rest of the things here; perhaps they've been cleared?
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}
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if (int_status & USB_ISTR_CTR)
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{
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@ -528,12 +543,7 @@ static void dcd_fs_irqHandler(void) {
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dcd_ep_ctr_handler();
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reg16_clear_bits(&USB->ISTR, USB_ISTR_CTR);
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}
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if(int_status & USB_ISTR_RESET) {
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// USBRST is start of reset.
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reg16_clear_bits(&USB->ISTR, USB_ISTR_RESET);
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dcd_handle_bus_reset();
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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}
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if (int_status & USB_ISTR_WKUP)
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{
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reg16_clear_bits(&USB->CNTR, USB_CNTR_LPMODE);
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@ -544,6 +554,9 @@ static void dcd_fs_irqHandler(void) {
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if (int_status & USB_ISTR_SUSP)
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{
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/* Suspend is asserted for both suspend and unplug events. without Vbus monitoring,
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* these events cannot be differentiated, so we only trigger suspend. */
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/* Force low-power mode in the macrocell */
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USB->CNTR |= USB_CNTR_FSUSP;
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USB->CNTR |= USB_CNTR_LPMODE;
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@ -696,25 +709,19 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void)rhport;
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if (ep_addr == 0) { // CTRL EP0 (OUT for setup)
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pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
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if (ep_addr & 0x80)
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{ // IN
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pcd_set_ep_tx_status(USB, ep_addr & 0x7F, USB_EP_TX_STALL);
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}
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if (ep_addr & 0x80) { // IN
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ep_addr &= 0x7F;
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pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
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} else { // OUT
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pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_STALL);
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else
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{ // OUT
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pcd_set_ep_rx_status(USB, ep_addr, USB_EP_RX_STALL);
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}
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void)rhport;
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if (ep_addr == 0)
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{
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pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
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}
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if (ep_addr & 0x80)
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{ // IN
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@ -730,7 +737,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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/* Reset to DATA0 if clearing stall condition. */
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pcd_clear_rx_dtog(USB,ep_addr);
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pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_VALID);
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pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_NAK);
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}
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}
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