mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
add linker and startup for lpcxpresso11u68 board
able to build and blink LED
This commit is contained in:
hathach
parent
6e443d1918
commit
b1f8aa175e
39
hw/bsp/lpcxpresso11u68/board.mk
Normal file
39
hw/bsp/lpcxpresso11u68/board.mk
Normal file
@ -0,0 +1,39 @@
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CFLAGS += \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m0plus \
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-nostdlib \
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-DCORE_M0PLUS \
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-D__VTOR_PRESENT=0 \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-D__USE_LPCOPEN \
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'-DCFG_TUSB_MEM_SECTION= __attribute__((section(".data.$RAM3")))' \
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'-DCFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))'
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld
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SRC_C += \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/chip_11u6x.c \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/clock_11u6x.c \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/gpio_11u6x.c \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/iocon_11u6x.c \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/syscon_11u6x.c \
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hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/sysinit_11u6x.c
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INC += \
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$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_11u6x/inc
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# For TinyUSB port source
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VENDOR = nxp
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CHIP_FAMILY = lpc11_13_15
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM0
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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JLINK_IF = swd
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# flash using jlink
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flash: flash-jlink
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@ -31,14 +31,8 @@
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#define LED_PIN 17
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#define LED_PIN 17
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#define LED_STATE_ON 0
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#define LED_STATE_ON 0
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static const struct {
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#define BUTTON_PORT 0
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uint8_t port;
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#define BUTTON_PIN 1
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uint8_t pin;
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} buttons[] = { { 0, 1 } };
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enum {
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BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
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};
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/* System oscillator rate and RTC oscillator rate */
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/* System oscillator rate and RTC oscillator rate */
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const uint32_t OscRateIn = 12000000;
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const uint32_t OscRateIn = 12000000;
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@ -78,14 +72,11 @@ void board_init(void)
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Chip_GPIO_Init(LPC_GPIO);
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Chip_GPIO_Init(LPC_GPIO);
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//------------- LED -------------//
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// LED
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Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
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Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
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//------------- BUTTON -------------//
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// BUTTON
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//for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOSetDir(buttons[i].port, buttons[i].pin, 0);
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Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
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//------------- UART -------------//
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//UARTInit(CFG_UART_BAUDRATE);
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// USB
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// USB
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Chip_USB_Init(); // Setup PLL clock, and power
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Chip_USB_Init(); // Setup PLL clock, and power
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@ -123,9 +114,8 @@ void board_led_write(bool state)
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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uint32_t board_button_read(void)
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uint32_t board_button_read(void)
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{
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{
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// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOGetPinValue(buttons[i].port, buttons[i].pin);
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// active low
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// return GPIOGetPinValue(buttons[0].port, buttons[0].pin) ? 0 : 1; // button is active low
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return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
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return 0;
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}
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}
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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@ -133,7 +123,6 @@ uint32_t board_button_read(void)
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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int board_uart_read(uint8_t* buf, int len)
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int board_uart_read(uint8_t* buf, int len)
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{
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{
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// *buffer = get_key(); TODO cannot find available code for uart getchar
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(void) buf;
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(void) buf;
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(void) len;
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(void) len;
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return 0;
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return 0;
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@ -141,7 +130,6 @@ int board_uart_read(uint8_t* buf, int len)
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int board_uart_write(void const * buf, int len)
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int board_uart_write(void const * buf, int len)
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{
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{
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//UARTSend(&c, 1);
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(void) buf;
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(void) buf;
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(void) len;
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(void) len;
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return 0;
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return 0;
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352
hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
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352
hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
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//*****************************************************************************
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// LPC11U6x Microcontroller Startup code for use with LPCXpresso IDE
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//
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// Version : 140113
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//*****************************************************************************
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//
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// Copyright(C) NXP Semiconductors, 2014
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// All rights reserved.
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//
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// Software that is described herein is for illustrative purposes only
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// which provides customers with programming information regarding the
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// LPC products. This software is supplied "AS IS" without any warranties of
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// any kind, and NXP Semiconductors and its licensor disclaim any and
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// all warranties, express or implied, including all implied warranties of
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// merchantability, fitness for a particular purpose and non-infringement of
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// intellectual property rights. NXP Semiconductors assumes no responsibility
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// or liability for the use of the software, conveys no license or rights under any
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// patent, copyright, mask work right, or any other intellectual property rights in
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// or to any products. NXP Semiconductors reserves the right to make changes
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// in the software without notification. NXP Semiconductors also makes no
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// representation or warranty that such application will be suitable for the
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// specified use without further testing or modification.
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//
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// Permission to use, copy, modify, and distribute this software and its
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// documentation is hereby granted, under NXP Semiconductors' and its
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// licensor's relevant copyrights in the software, without fee, provided that it
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// is used in conjunction with NXP Semiconductors microcontrollers. This
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// copyright, permission, and disclaimer notice must appear in all copies of
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// this code.
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//*****************************************************************************
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#if defined (__cplusplus)
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#ifdef __REDLIB__
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#error Redlib does not support C++
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#else
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//*****************************************************************************
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//
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// The entry point for the C++ library startup
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//
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//*****************************************************************************
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extern "C" {
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extern void __libc_init_array(void);
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}
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#endif
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#endif
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#define WEAK __attribute__ ((weak))
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#define ALIAS(f) __attribute__ ((weak, alias (#f)))
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//*****************************************************************************
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#if defined (__cplusplus)
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extern "C" {
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#endif
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//*****************************************************************************
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#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
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// Declaration of external SystemInit function
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extern void SystemInit(void);
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#endif
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// Patch the AEABI integer divide functions to use MCU's romdivide library
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#ifdef __USE_ROMDIVIDE
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// Location in memory that holds the address of the ROM Driver table
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#define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8))
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// Variables to store addresses of idiv and udiv functions within MCU ROM
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unsigned int *pDivRom_idiv;
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unsigned int *pDivRom_uidiv;
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#endif
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//*****************************************************************************
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//
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// Forward declaration of the default handlers. These are aliased.
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// When the application defines a handler (with the same name), this will
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// automatically take precedence over these weak definitions
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//
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//*****************************************************************************
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void ResetISR(void);
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WEAK void NMI_Handler(void);
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WEAK void HardFault_Handler(void);
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WEAK void SVC_Handler(void);
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WEAK void PendSV_Handler(void);
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WEAK void SysTick_Handler(void);
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WEAK void IntDefaultHandler(void);
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//*****************************************************************************
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//
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// Forward declaration of the specific IRQ handlers. These are aliased
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// to the IntDefaultHandler, which is a 'forever' loop. When the application
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// defines a handler (with the same name), this will automatically take
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// precedence over these weak definitions
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//
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//*****************************************************************************
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void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
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void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
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void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
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void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
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void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
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void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
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void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
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void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
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//*****************************************************************************
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// The entry point for the application.
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// __main() is the entry point for redlib based applications
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// main() is the entry point for newlib based applications
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//*****************************************************************************
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#if defined (__REDLIB__)
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extern void __main(void);
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#endif
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extern int main(void);
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//*****************************************************************************
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//
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// External declaration for the pointer to the stack top from the Linker Script
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//
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//*****************************************************************************
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extern void _vStackTop(void);
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//*****************************************************************************
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#if defined (__cplusplus)
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} // extern "C"
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#endif
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//*****************************************************************************
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//
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// The vector table. Note that the proper constructs must be placed on this to
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// ensure that it ends up at physical address 0x0000.0000.
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//
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//*****************************************************************************
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extern void (* const g_pfnVectors[])(void);
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__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
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void (* const g_pfnVectors[])(void) = {
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&_vStackTop, // The initial stack pointer
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ResetISR, // The reset handler
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NMI_Handler, // The NMI handler
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HardFault_Handler, // The hard fault handler
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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SVC_Handler, // SVCall handler
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0, // Reserved
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0, // Reserved
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PendSV_Handler, // The PendSV handler
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SysTick_Handler, // The SysTick handler
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// LPC11U6x specific handlers
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PIN_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
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PIN_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
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PIN_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
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PIN_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
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PIN_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
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PIN_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
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PIN_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
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PIN_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
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GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
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GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
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I2C1_IRQHandler, // 10 - I2C1
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USART1_4_IRQHandler, // 11 - combined USART1 & 4 interrupt
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USART2_3_IRQHandler, // 12 - combined USART2 & 3 interrupt
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SCT0_1_IRQHandler, // 13 - combined SCT0 and 1 interrupt
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SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
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I2C0_IRQHandler, // 15 - I2C0
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TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
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TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
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TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
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TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
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SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
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USART0_IRQHandler, // 21 - USART0
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USB_IRQHandler, // 22 - USB IRQ
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USB_FIQHandler, // 23 - USB FIQ
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ADCA_IRQHandler, // 24 - ADC A(A/D Converter)
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RTC_IRQHandler, // 25 - Real Time CLock interrpt
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BOD_WDT_IRQHandler, // 25 - Combined Brownout/Watchdog interrupt
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FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
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DMA_IRQHandler, // 28 - DMA interrupt
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ADCB_IRQHandler, // 24 - ADC B (A/D Converter)
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USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
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0, // 31 - Reserved
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};
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//*****************************************************************************
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// Functions to carry out the initialization of RW and BSS data sections. These
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// are written as separate functions rather than being inlined within the
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// ResetISR() function in order to cope with MCUs with multiple banks of
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// memory.
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//*****************************************************************************
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__attribute__ ((section(".after_vectors")))
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void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
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unsigned int *pulDest = (unsigned int*) start;
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unsigned int *pulSrc = (unsigned int*) romstart;
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unsigned int loop;
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for (loop = 0; loop < len; loop = loop + 4)
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*pulDest++ = *pulSrc++;
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}
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__attribute__ ((section(".after_vectors")))
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void bss_init(unsigned int start, unsigned int len) {
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unsigned int *pulDest = (unsigned int*) start;
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unsigned int loop;
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for (loop = 0; loop < len; loop = loop + 4)
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*pulDest++ = 0;
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}
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//*****************************************************************************
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// The following symbols are constructs generated by the linker, indicating
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// the location of various points in the "Global Section Table". This table is
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// created by the linker via the Code Red managed linker script mechanism. It
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// contains the load address, execution address and length of each RW data
|
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// section and the execution and length of each BSS (zero initialized) section.
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//*****************************************************************************
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extern unsigned int __data_section_table;
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extern unsigned int __data_section_table_end;
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||||||
|
extern unsigned int __bss_section_table;
|
||||||
|
extern unsigned int __bss_section_table_end;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// Reset entry point for your code.
|
||||||
|
// Sets up a simple runtime environment and initializes the C/C++
|
||||||
|
// library.
|
||||||
|
//*****************************************************************************
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void
|
||||||
|
ResetISR(void) {
|
||||||
|
|
||||||
|
// Optionally enable RAM banks that may be off by default at reset
|
||||||
|
#if !defined (DONT_ENABLE_DISABLED_RAMBANKS)
|
||||||
|
volatile unsigned int *SYSCON_SYSAHBCLKCTRL = (unsigned int *) 0x40048080;
|
||||||
|
// Ensure that RAM1(26) and USBSRAM(27) bits in SYSAHBCLKCTRL are set
|
||||||
|
*SYSCON_SYSAHBCLKCTRL |= (1 << 26) | (1 <<27);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Copy the data sections from flash to SRAM.
|
||||||
|
//
|
||||||
|
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||||
|
unsigned int *SectionTableAddr;
|
||||||
|
|
||||||
|
// Load base address of Global Section Table
|
||||||
|
SectionTableAddr = &__data_section_table;
|
||||||
|
|
||||||
|
// Copy the data sections from flash to SRAM.
|
||||||
|
while (SectionTableAddr < &__data_section_table_end) {
|
||||||
|
LoadAddr = *SectionTableAddr++;
|
||||||
|
ExeAddr = *SectionTableAddr++;
|
||||||
|
SectionLen = *SectionTableAddr++;
|
||||||
|
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||||
|
}
|
||||||
|
// At this point, SectionTableAddr = &__bss_section_table;
|
||||||
|
// Zero fill the bss segment
|
||||||
|
while (SectionTableAddr < &__bss_section_table_end) {
|
||||||
|
ExeAddr = *SectionTableAddr++;
|
||||||
|
SectionLen = *SectionTableAddr++;
|
||||||
|
bss_init(ExeAddr, SectionLen);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Patch the AEABI integer divide functions to use MCU's romdivide library
|
||||||
|
#ifdef __USE_ROMDIVIDE
|
||||||
|
// Get address of Integer division routines function table in ROM
|
||||||
|
unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4];
|
||||||
|
// Get addresses of integer divide routines in ROM
|
||||||
|
// These address are then used by the code in aeabi_romdiv_patch.s
|
||||||
|
pDivRom_idiv = (unsigned int *)div_ptr[0];
|
||||||
|
pDivRom_uidiv = (unsigned int *)div_ptr[1];
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
|
||||||
|
SystemInit();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (__cplusplus)
|
||||||
|
//
|
||||||
|
// Call C++ library initialisation
|
||||||
|
//
|
||||||
|
__libc_init_array();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (__REDLIB__)
|
||||||
|
// Call the Redlib library, which in turn calls main()
|
||||||
|
__main() ;
|
||||||
|
#else
|
||||||
|
main();
|
||||||
|
#endif
|
||||||
|
//
|
||||||
|
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||||
|
//
|
||||||
|
while (1) {
|
||||||
|
;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// Default exception handlers. Override the ones here by defining your own
|
||||||
|
// handler routines in your application code.
|
||||||
|
//*****************************************************************************
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void NMI_Handler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void HardFault_Handler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void SVC_Handler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void PendSV_Handler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void SysTick_Handler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||||
|
// handler is not present in the application code.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
__attribute__ ((section(".after_vectors")))
|
||||||
|
void IntDefaultHandler(void)
|
||||||
|
{ while(1) { }
|
||||||
|
}
|
||||||
242
hw/bsp/lpcxpresso11u68/lpc11u68.ld
Normal file
242
hw/bsp/lpcxpresso11u68/lpc11u68.ld
Normal file
@ -0,0 +1,242 @@
|
|||||||
|
/*
|
||||||
|
* GENERATED FILE - DO NOT EDIT
|
||||||
|
* (c) Code Red Technologies Ltd, 2008-2013
|
||||||
|
* (c) NXP Semiconductors 2013-2019
|
||||||
|
* Generated linker script file for LPC11U68
|
||||||
|
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||||
|
* Using Freemarker v2.3.23
|
||||||
|
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 4:55:54 PM
|
||||||
|
*/
|
||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
/* Define each memory region */
|
||||||
|
MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
|
||||||
|
Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||||
|
Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
|
||||||
|
Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Define a symbol for the top of each memory region */
|
||||||
|
__base_MFlash256 = 0x0 ; /* MFlash256 */
|
||||||
|
__base_Flash = 0x0 ; /* Flash */
|
||||||
|
__top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
|
||||||
|
__top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
|
||||||
|
__base_Ram0_32 = 0x10000000 ; /* Ram0_32 */
|
||||||
|
__base_RAM = 0x10000000 ; /* RAM */
|
||||||
|
__top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||||
|
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||||
|
__base_Ram1_2 = 0x20000000 ; /* Ram1_2 */
|
||||||
|
__base_RAM2 = 0x20000000 ; /* RAM2 */
|
||||||
|
__top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||||
|
__top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */
|
||||||
|
__base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */
|
||||||
|
__base_RAM3 = 0x20004000 ; /* RAM3 */
|
||||||
|
__top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||||
|
__top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */
|
||||||
|
|
||||||
|
ENTRY(ResetISR)
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* MAIN TEXT SECTION */
|
||||||
|
.text : ALIGN(4)
|
||||||
|
{
|
||||||
|
FILL(0xff)
|
||||||
|
__vectors_start__ = ABSOLUTE(.) ;
|
||||||
|
KEEP(*(.isr_vector))
|
||||||
|
/* Global Section Table */
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
__section_table_start = .;
|
||||||
|
__data_section_table = .;
|
||||||
|
LONG(LOADADDR(.data));
|
||||||
|
LONG( ADDR(.data));
|
||||||
|
LONG( SIZEOF(.data));
|
||||||
|
LONG(LOADADDR(.data_RAM2));
|
||||||
|
LONG( ADDR(.data_RAM2));
|
||||||
|
LONG( SIZEOF(.data_RAM2));
|
||||||
|
LONG(LOADADDR(.data_RAM3));
|
||||||
|
LONG( ADDR(.data_RAM3));
|
||||||
|
LONG( SIZEOF(.data_RAM3));
|
||||||
|
__data_section_table_end = .;
|
||||||
|
__bss_section_table = .;
|
||||||
|
LONG( ADDR(.bss));
|
||||||
|
LONG( SIZEOF(.bss));
|
||||||
|
LONG( ADDR(.bss_RAM2));
|
||||||
|
LONG( SIZEOF(.bss_RAM2));
|
||||||
|
LONG( ADDR(.bss_RAM3));
|
||||||
|
LONG( SIZEOF(.bss_RAM3));
|
||||||
|
__bss_section_table_end = .;
|
||||||
|
__section_table_end = . ;
|
||||||
|
/* End of Global Section Table */
|
||||||
|
|
||||||
|
*(.after_vectors*)
|
||||||
|
|
||||||
|
} > MFlash256
|
||||||
|
|
||||||
|
.text : ALIGN(4)
|
||||||
|
{
|
||||||
|
*(.text*)
|
||||||
|
*(.rodata .rodata.* .constdata .constdata.*)
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > MFlash256
|
||||||
|
/*
|
||||||
|
* for exception handling/unwind - some Newlib functions (in common
|
||||||
|
* with C++ and STDC++) use this.
|
||||||
|
*/
|
||||||
|
.ARM.extab : ALIGN(4)
|
||||||
|
{
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
} > MFlash256
|
||||||
|
|
||||||
|
__exidx_start = .;
|
||||||
|
|
||||||
|
.ARM.exidx : ALIGN(4)
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
} > MFlash256
|
||||||
|
__exidx_end = .;
|
||||||
|
|
||||||
|
_etext = .;
|
||||||
|
|
||||||
|
/* possible MTB section for Ram1_2 */
|
||||||
|
.mtb_buffer_RAM2 (NOLOAD) :
|
||||||
|
{
|
||||||
|
KEEP(*(.mtb.$RAM2*))
|
||||||
|
KEEP(*(.mtb.$Ram1_2*))
|
||||||
|
} > Ram1_2
|
||||||
|
|
||||||
|
/* DATA section for Ram1_2 */
|
||||||
|
|
||||||
|
.data_RAM2 : ALIGN(4)
|
||||||
|
{
|
||||||
|
FILL(0xff)
|
||||||
|
PROVIDE(__start_data_RAM2 = .) ;
|
||||||
|
*(.ramfunc.$RAM2)
|
||||||
|
*(.ramfunc.$Ram1_2)
|
||||||
|
*(.data.$RAM2*)
|
||||||
|
*(.data.$Ram1_2*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
PROVIDE(__end_data_RAM2 = .) ;
|
||||||
|
} > Ram1_2 AT>MFlash256
|
||||||
|
/* possible MTB section for Ram2USB_2 */
|
||||||
|
.mtb_buffer_RAM3 (NOLOAD) :
|
||||||
|
{
|
||||||
|
KEEP(*(.mtb.$RAM3*))
|
||||||
|
KEEP(*(.mtb.$Ram2USB_2*))
|
||||||
|
} > Ram2USB_2
|
||||||
|
|
||||||
|
/* DATA section for Ram2USB_2 */
|
||||||
|
|
||||||
|
.data_RAM3 : ALIGN(4)
|
||||||
|
{
|
||||||
|
FILL(0xff)
|
||||||
|
PROVIDE(__start_data_RAM3 = .) ;
|
||||||
|
*(.ramfunc.$RAM3)
|
||||||
|
*(.ramfunc.$Ram2USB_2)
|
||||||
|
*(.data.$RAM3*)
|
||||||
|
*(.data.$Ram2USB_2*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
PROVIDE(__end_data_RAM3 = .) ;
|
||||||
|
} > Ram2USB_2 AT>MFlash256
|
||||||
|
/* MAIN DATA SECTION */
|
||||||
|
/* Default MTB section */
|
||||||
|
.mtb_buffer_default (NOLOAD) :
|
||||||
|
{
|
||||||
|
KEEP(*(.mtb*))
|
||||||
|
} > Ram0_32
|
||||||
|
.uninit_RESERVED : ALIGN(4)
|
||||||
|
{
|
||||||
|
KEEP(*(.bss.$RESERVED*))
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
_end_uninit_RESERVED = .;
|
||||||
|
} > Ram0_32
|
||||||
|
|
||||||
|
/* Main DATA section (Ram0_32) */
|
||||||
|
.data : ALIGN(4)
|
||||||
|
{
|
||||||
|
FILL(0xff)
|
||||||
|
_data = . ;
|
||||||
|
*(vtable)
|
||||||
|
*(.ramfunc*)
|
||||||
|
*(.data*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
_edata = . ;
|
||||||
|
} > Ram0_32 AT>MFlash256
|
||||||
|
|
||||||
|
/* BSS section for Ram1_2 */
|
||||||
|
.bss_RAM2 : ALIGN(4)
|
||||||
|
{
|
||||||
|
PROVIDE(__start_bss_RAM2 = .) ;
|
||||||
|
*(.bss.$RAM2*)
|
||||||
|
*(.bss.$Ram1_2*)
|
||||||
|
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||||
|
PROVIDE(__end_bss_RAM2 = .) ;
|
||||||
|
} > Ram1_2
|
||||||
|
|
||||||
|
/* BSS section for Ram2USB_2 */
|
||||||
|
.bss_RAM3 : ALIGN(4)
|
||||||
|
{
|
||||||
|
PROVIDE(__start_bss_RAM3 = .) ;
|
||||||
|
*(.bss.$RAM3*)
|
||||||
|
*(.bss.$Ram2USB_2*)
|
||||||
|
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||||
|
PROVIDE(__end_bss_RAM3 = .) ;
|
||||||
|
} > Ram2USB_2
|
||||||
|
|
||||||
|
/* MAIN BSS SECTION */
|
||||||
|
.bss : ALIGN(4)
|
||||||
|
{
|
||||||
|
_bss = .;
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
_ebss = .;
|
||||||
|
PROVIDE(end = .);
|
||||||
|
} > Ram0_32
|
||||||
|
|
||||||
|
/* NOINIT section for Ram1_2 */
|
||||||
|
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||||
|
{
|
||||||
|
*(.noinit.$RAM2*)
|
||||||
|
*(.noinit.$Ram1_2*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
} > Ram1_2
|
||||||
|
|
||||||
|
/* NOINIT section for Ram2USB_2 */
|
||||||
|
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||||
|
{
|
||||||
|
*(.noinit.$RAM3*)
|
||||||
|
*(.noinit.$Ram2USB_2*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
} > Ram2USB_2
|
||||||
|
|
||||||
|
/* DEFAULT NOINIT SECTION */
|
||||||
|
.noinit (NOLOAD): ALIGN(4)
|
||||||
|
{
|
||||||
|
_noinit = .;
|
||||||
|
*(.noinit*)
|
||||||
|
. = ALIGN(4) ;
|
||||||
|
_end_noinit = .;
|
||||||
|
} > Ram0_32
|
||||||
|
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
|
||||||
|
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0);
|
||||||
|
|
||||||
|
/* ## Create checksum value (used in startup) ## */
|
||||||
|
PROVIDE(__valid_user_code_checksum = 0 -
|
||||||
|
(_vStackTop
|
||||||
|
+ (ResetISR + 1)
|
||||||
|
+ (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1)
|
||||||
|
+ (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1)
|
||||||
|
)
|
||||||
|
);
|
||||||
|
|
||||||
|
/* Provide basic symbols giving location and size of main text
|
||||||
|
* block, including initial values of RW data sections. Note that
|
||||||
|
* these will need extending to give a complete picture with
|
||||||
|
* complex images (e.g multiple Flash banks).
|
||||||
|
*/
|
||||||
|
_image_start = LOADADDR(.text);
|
||||||
|
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||||
|
_image_size = _image_end - _image_start;
|
||||||
|
}
|
||||||
Loading…
x
Reference in New Issue
Block a user