From b464f91a6e6e6cc4975b4acd442133422482daf1 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 30 Jan 2023 17:04:39 +0700 Subject: [PATCH] iar h7 --- .github/workflows/build_iar.yml | 1 + hw/bsp/stm32f7/boards/stlinkv3mini/board.mk | 2 +- hw/bsp/stm32h7/boards/daisyseed/board.mk | 9 ++++-- .../stm32h7/boards/stm32h723nucleo/board.mk | 9 ++++-- hw/bsp/stm32h7/boards/stm32h743eval/board.mk | 9 ++++-- .../stm32h7/boards/stm32h743nucleo/board.mk | 9 ++++-- hw/bsp/stm32h7/boards/stm32h745disco/board.mk | 9 ++++-- .../boards/waveshare_openh743i/board.h | 4 +-- .../boards/waveshare_openh743i/board.mk | 11 +++++-- hw/bsp/stm32h7/family.c | 5 +-- hw/bsp/stm32h7/family.mk | 32 +++++++++++++------ 11 files changed, 72 insertions(+), 28 deletions(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 1facd8ab9..e4b449528 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -31,6 +31,7 @@ jobs: - 'stm32f1' - 'stm32f4' - 'stm32f7' + - 'stm32h7' steps: - name: Clean workspace run: | diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk index c28dae9bf..e1d352cc9 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk @@ -7,8 +7,8 @@ CFLAGS += \ -DHSE_VALUE=25000000 \ # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s +GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld # IAR IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk index 68c62968e..4d718f04e 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.mk +++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk @@ -3,8 +3,13 @@ CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=16000000 # Default is FulSpeed port PORT ?= 0 -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s -LD_FILE = $(BOARD_PATH)/stm32h750ibkx_flash.ld +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s +GCC_LD_FILE = $(BOARD_PATH)/stm32h750ibkx_flash.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h750ibk6_m7 diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk index bbd0a0e58..57dfb7e64 100644 --- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk @@ -3,8 +3,13 @@ CFLAGS += -DSTM32H723xx -DHSE_VALUE=8000000 # Default is FulSpeed port PORT ?= 0 -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s -LD_FILE = $(BOARD_PATH)/stm32h723xx_flash.ld +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s +GCC_LD_FILE = $(BOARD_PATH)/stm32h723xx_flash.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h723xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h723zg diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk index b768a0ee6..78ff47c09 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk @@ -4,8 +4,13 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=25000000 PORT ?= 1 SPEED ?= high -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +GCC_LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h743xi diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk index fc670fe76..4bdd5b6a8 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk @@ -3,8 +3,13 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=8000000 # Default is FulSpeed port PORT ?= 0 -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +GCC_LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h743zi diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk index 384065bde..b51b109f6 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk @@ -6,8 +6,13 @@ CFLAGS += -DSTM32H745xx -DCORE_CM7 -DHSE_VALUE=25000000 # Default is FulSpeed port PORT ?= 0 -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s -LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s +GCC_LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h745xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf # For flash-jlink target JLINK_DEVICE = stm32h745xi_m7 diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h index 2b072e07c..cf6ad762e 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h @@ -212,9 +212,9 @@ static inline void board_stm32h7_post_init(void) // Reset PHY, change the delays as you see fit timer_board_delay(&tim2Handle, 5U); - HAL_GPIO_WritePin(ULPI_RST_PORT, ULPI_RST_PIN, 1U); + HAL_GPIO_WritePin(ULPI_RST_PORT, ULPI_RST_PIN, GPIO_PIN_SET); timer_board_delay(&tim2Handle, 20U); - HAL_GPIO_WritePin(ULPI_RST_PORT, ULPI_RST_PIN, 0U); + HAL_GPIO_WritePin(ULPI_RST_PORT, ULPI_RST_PIN, GPIO_PIN_RESET); timer_board_delay(&tim2Handle, 20U); //Disable the timer used for delays diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk index 4dfcc1cac..fbf4b55c6 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk @@ -3,15 +3,20 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=8000000 # Default is HS port PORT ?= 1 -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -LD_FILE = $(BOARD_PATH)/STM32H743IITX_FLASH.ld - # Use Timer module for ULPI PHY reset CFLAGS += -DHAL_TIM_MODULE_ENABLED SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim_ex.c +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +GCC_LD_FILE = $(BOARD_PATH)/STM32H743IITX_FLASH.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf + # For flash-jlink target JLINK_DEVICE = stm32h743ii diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 0aa8fe47f..28a2568fa 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -225,7 +225,8 @@ void board_init(void) void board_led_write(bool state) { - HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON)); + HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state); } uint32_t board_button_read(void) @@ -261,7 +262,7 @@ uint32_t board_millis(void) void HardFault_Handler(void) { - asm("bkpt"); + __asm("BKPT #0\n"); } // Required by __libc_init_array in startup code if we are compiling using diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index a1cd93b27..834347b4b 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -7,14 +7,10 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +# -------------- +# Compiler Flags +# -------------- CFLAGS += \ - -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m7 \ - -mfloat-abi=hard \ - -mfpu=fpv5-d16 \ - -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32H7 \ -DBOARD_TUD_RHPORT=$(PORT) @@ -30,10 +26,26 @@ else $(info "Using OTG_FS") endif -# suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align +# GCC Flags +GCC_CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-d16 \ + -nostdlib -nostartfiles -# All source paths should be relative to the top level. +# suppress warning caused by vendor mcu driver +GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align + +# IAR Flags +IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 +IAR_ASFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 + +# ----------------- +# Sources & Include +# ----------------- SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \