From b475656e9b8fef0302245d89950365c046d89e56 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 13 Mar 2014 11:05:30 +0700 Subject: [PATCH] rename startup* folder to toolchain folder --- mcu/lpc11uxx/iar/startup_lpc11xx.s | 196 ++++++++++ .../{startup_keil => keil}/lpc11uxx.sct | 0 .../{startup_keil => keil}/startup_LPC11Uxx.s | 0 .../cr_startup_lpc11u.c | 0 mcu/lpc13uxx/iar/startup_lpc13xx.s | 168 +++++++++ .../{startup_keil => keil}/lpc13uxx.sct | 0 .../{startup_keil => keil}/startup_LPC13Uxx.s | 0 .../cr_startup_lpc13u.c | 0 mcu/lpc175x_6x/iar/startup_LPC17xx.s | 356 ++++++++++++++++++ .../{startup_keil => keil}/startup_LPC17xx.s | 0 .../cr_startup_lpc176x.c | 0 .../{startup_iar => iar}/startup_LPC43xx.s | 0 mcu/lpc43xx/{ => keil}/keil_ram.ini | 22 +- .../{startup_keil => keil}/startup_LPC43xx.s | 0 .../cr_startup_lpc43xx.c | 0 15 files changed, 731 insertions(+), 11 deletions(-) create mode 100644 mcu/lpc11uxx/iar/startup_lpc11xx.s rename mcu/lpc11uxx/{startup_keil => keil}/lpc11uxx.sct (100%) rename mcu/lpc11uxx/{startup_keil => keil}/startup_LPC11Uxx.s (100%) rename mcu/lpc11uxx/{startup_xpresso => lpcxpresso}/cr_startup_lpc11u.c (100%) create mode 100644 mcu/lpc13uxx/iar/startup_lpc13xx.s rename mcu/lpc13uxx/{startup_keil => keil}/lpc13uxx.sct (100%) rename mcu/lpc13uxx/{startup_keil => keil}/startup_LPC13Uxx.s (100%) rename mcu/lpc13uxx/{startup_xpresso => lpcxpresso}/cr_startup_lpc13u.c (100%) create mode 100644 mcu/lpc175x_6x/iar/startup_LPC17xx.s rename mcu/lpc175x_6x/{startup_keil => keil}/startup_LPC17xx.s (100%) rename mcu/lpc175x_6x/{startup_xpresso => lpcxpresso}/cr_startup_lpc176x.c (100%) rename mcu/lpc43xx/{startup_iar => iar}/startup_LPC43xx.s (100%) rename mcu/lpc43xx/{ => keil}/keil_ram.ini (97%) rename mcu/lpc43xx/{startup_keil => keil}/startup_LPC43xx.s (100%) rename mcu/lpc43xx/{startup_xpresso => lpcxpresso}/cr_startup_lpc43xx.c (100%) diff --git a/mcu/lpc11uxx/iar/startup_lpc11xx.s b/mcu/lpc11uxx/iar/startup_lpc11xx.s new file mode 100644 index 000000000..4401ea953 --- /dev/null +++ b/mcu/lpc11uxx/iar/startup_lpc11xx.s @@ -0,0 +1,196 @@ +/************************************************** + * + * Part one of the system initialization code, contains low-level + * initialization, plain thumb variant. + * + * Copyright 2009 IAR Systems. All rights reserved. + * + * $Revision: 47021 $ + * + **************************************************/ + +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + + PUBLIC __vector_table + PUBLIC __vector_table_0x1c + DATA +__vector_table + DCD sfe(CSTACK) ; Top of Stack + DCD __iar_program_start ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler +__vector_table_0x1c + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Ha dler + DCD SysTick_Handler ; SysTick Handler + ; External Interrupts + DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx + DCD FLEX_INT1_IRQHandler + DCD FLEX_INT2_IRQHandler + DCD FLEX_INT3_IRQHandler + DCD FLEX_INT4_IRQHandler + DCD FLEX_INT5_IRQHandler + DCD FLEX_INT6_IRQHandler + DCD FLEX_INT7_IRQHandler + DCD GINT0_IRQHandler + DCD GINT1_IRQHandler ; PIO0 (0:7) + DCD Reserved_IRQHandler ; Reserved + DCD Reserved_IRQHandler + DCD Reserved_IRQHandler + DCD Reserved_IRQHandler + DCD SSP1_IRQHandler ; SSP1 + DCD I2C_IRQHandler ; I2C + DCD TIMER16_0_IRQHandler ; 16-bit Timer0 + DCD TIMER16_1_IRQHandler ; 16-bit Timer1 + DCD TIMER32_0_IRQHandler ; 32-bit Timer0 + DCD TIMER32_1_IRQHandler ; 32-bit Timer1 + DCD SSP0_IRQHandler ; SSP0 + DCD UART_IRQHandler ; UART + DCD USB_IRQHandler ; USB IRQ + DCD USB_FIQHandler ; USB FIQ + DCD ADC_IRQHandler ; A/D Converter + DCD WDT_IRQHandler ; Watchdog timer + DCD BOD_IRQHandler ; Brown Out Detect + DCD FMC_IRQHandler ; IP2111 Flash Memory Controller + DCD Reserved_IRQHandler ; Reserved + DCD Reserved_IRQHandler ; Reserved + DCD USBWakeup_IRQHandler ; USB wake up + DCD Reserved_IRQHandler ; Reserved + + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + SECTION .text:CODE:REORDER:NOROOT(1) + PUBWEAK NMI_Handler + PUBWEAK HardFault_Handler + PUBWEAK MemManage_Handler + PUBWEAK BusFault_Handler + PUBWEAK UsageFault_Handler + PUBWEAK SVC_Handler + PUBWEAK DebugMon_Handler + PUBWEAK PendSV_Handler + PUBWEAK SysTick_Handler + PUBWEAK FLEX_INT0_IRQHandler + PUBWEAK FLEX_INT1_IRQHandler + PUBWEAK FLEX_INT2_IRQHandler + PUBWEAK FLEX_INT3_IRQHandler + PUBWEAK FLEX_INT4_IRQHandler + PUBWEAK FLEX_INT5_IRQHandler + PUBWEAK FLEX_INT6_IRQHandler + PUBWEAK FLEX_INT7_IRQHandler + PUBWEAK GINT0_IRQHandler + PUBWEAK GINT1_IRQHandler + PUBWEAK SSP1_IRQHandler + PUBWEAK I2C_IRQHandler + PUBWEAK TIMER16_0_IRQHandler + PUBWEAK TIMER16_1_IRQHandler + PUBWEAK TIMER32_0_IRQHandler + PUBWEAK TIMER32_1_IRQHandler + PUBWEAK SSP0_IRQHandler + PUBWEAK UART_IRQHandler + PUBWEAK USB_IRQHandler + PUBWEAK USB_FIQHandler + PUBWEAK ADC_IRQHandler + PUBWEAK WDT_IRQHandler + PUBWEAK BOD_IRQHandler + PUBWEAK FMC_IRQHandler + PUBWEAK USBWakeup_IRQHandler + PUBWEAK Reserved_IRQHandler + +NMI_Handler +HardFault_Handler +MemManage_Handler +BusFault_Handler +UsageFault_Handler +SVC_Handler +DebugMon_Handler +PendSV_Handler +SysTick_Handler +FLEX_INT0_IRQHandler +FLEX_INT1_IRQHandler +FLEX_INT2_IRQHandler +FLEX_INT3_IRQHandler +FLEX_INT4_IRQHandler +FLEX_INT5_IRQHandler +FLEX_INT6_IRQHandler +FLEX_INT7_IRQHandler +GINT0_IRQHandler +GINT1_IRQHandler +SSP1_IRQHandler +I2C_IRQHandler +TIMER16_0_IRQHandler +TIMER16_1_IRQHandler +TIMER32_0_IRQHandler +TIMER32_1_IRQHandler +SSP0_IRQHandler +UART_IRQHandler +USB_IRQHandler +USB_FIQHandler +ADC_IRQHandler +WDT_IRQHandler +BOD_IRQHandler +FMC_IRQHandler +USBWakeup_IRQHandler +Reserved_IRQHandler +Default_Handler: + B Default_Handler + + SECTION .crp:CODE:ROOT(2) + DATA +/* Code Read Protection +NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode +CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300. + - Copy RAM to flash command can not write to Sector 0. + - Erase command can erase Sector 0 only when all sectors + are selected for erase. + - Compare command is disabled. + - Read Memory command is disabled. +CRP2 0x87654321 - Read Memory is disabled. + - Write to RAM is disabled. + - "Go" command is disabled. + - Copy RAM to flash is disabled. + - Compare is disabled. +CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry + by pulling PIO0_1 LOW is disabled if a valid user code is + present in flash sector 0. +Caution: If CRP3 is selected, no future factory testing can be +performed on the device. +*/ + DCD 0xFFFFFFFF + + END diff --git a/mcu/lpc11uxx/startup_keil/lpc11uxx.sct b/mcu/lpc11uxx/keil/lpc11uxx.sct similarity index 100% rename from mcu/lpc11uxx/startup_keil/lpc11uxx.sct rename to mcu/lpc11uxx/keil/lpc11uxx.sct diff --git a/mcu/lpc11uxx/startup_keil/startup_LPC11Uxx.s b/mcu/lpc11uxx/keil/startup_LPC11Uxx.s similarity index 100% rename from mcu/lpc11uxx/startup_keil/startup_LPC11Uxx.s rename to mcu/lpc11uxx/keil/startup_LPC11Uxx.s diff --git a/mcu/lpc11uxx/startup_xpresso/cr_startup_lpc11u.c b/mcu/lpc11uxx/lpcxpresso/cr_startup_lpc11u.c similarity index 100% rename from mcu/lpc11uxx/startup_xpresso/cr_startup_lpc11u.c rename to mcu/lpc11uxx/lpcxpresso/cr_startup_lpc11u.c diff --git a/mcu/lpc13uxx/iar/startup_lpc13xx.s b/mcu/lpc13uxx/iar/startup_lpc13xx.s new file mode 100644 index 000000000..98c10db85 --- /dev/null +++ b/mcu/lpc13uxx/iar/startup_lpc13xx.s @@ -0,0 +1,168 @@ +/************************************************** + * + * Part one of the system initialization code, contains low-level + * initialization, plain thumb variant. + * + * Copyright 2012 IAR Systems. All rights reserved. + * + * $Revision: 50057 $ + * + **************************************************/ + +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + PUBLIC __vector_table + PUBLIC __vector_table_0x1c + + DATA +__vector_table + DCD sfe(CSTACK) ; Top of Stack + DCD __iar_program_start ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler +__vector_table_0x1c + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + DCD FLEX_INT0_IRQHandler ; GPIO pin interrupt 0 + DCD FLEX_INT1_IRQHandler ; GPIO pin interrupt 1 + DCD FLEX_INT2_IRQHandler ; GPIO pin interrupt 2 + DCD FLEX_INT3_IRQHandler ; GPIO pin interrupt 3 + DCD FLEX_INT4_IRQHandler ; GPIO pin interrupt 4 + DCD FLEX_INT5_IRQHandler ; GPIO pin interrupt 5 + DCD FLEX_INT6_IRQHandler ; GPIO pin interrupt 6 + DCD FLEX_INT7_IRQHandler ; GPIO pin interrupt 7 + DCD GINT0_IRQHandler ; GPIO GROUP0 interrupt + DCD GINT1_IRQHandler ; GPIO GROUP1 interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SSP1_IRQHandler ; SSP1 interrupt + DCD I2C_IRQHandler ; I2C interrupt + DCD CT16B0_IRQHandler ; CT16B0 Match 0-3, Capture 0 + DCD CT16B1_IRQHandler ; CT16B1 Match 0-3, Capture 0 + DCD CT32B0_IRQHandler ; CT32B0 Match 0-3, Capture 0 + DCD CT32B1_IRQHandler ; CT32B1 Match 0-3, Capture 0 + DCD SSP0_IRQHandler ; SSP0 interrupt + DCD USART_IRQHandler ; USART interrupt + DCD USB_IRQHandler ; USB_IRQ interrupt + DCD USB_FIQHandler ; USB_FIQ interrupt + DCD ADC_IRQHandler ; ADC interrupt + DCD WWDT_IRQHandler ; WWDT interrupt + DCD BOD_IRQHandler ; BOD interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD USBWakeup_IRQHandler ; USB_WAKEUP interrupt + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + + PUBWEAK NMI_Handler + PUBWEAK HardFault_Handler + PUBWEAK MemManage_Handler + PUBWEAK BusFault_Handler + PUBWEAK UsageFault_Handler + PUBWEAK SVC_Handler + PUBWEAK DebugMon_Handler + PUBWEAK PendSV_Handler + PUBWEAK SysTick_Handler + PUBWEAK FLEX_INT0_IRQHandler + PUBWEAK FLEX_INT1_IRQHandler + PUBWEAK FLEX_INT2_IRQHandler + PUBWEAK FLEX_INT3_IRQHandler + PUBWEAK FLEX_INT4_IRQHandler + PUBWEAK FLEX_INT5_IRQHandler + PUBWEAK FLEX_INT6_IRQHandler + PUBWEAK FLEX_INT7_IRQHandler + PUBWEAK GINT0_IRQHandler + PUBWEAK GINT1_IRQHandler + PUBWEAK SSP1_IRQHandler + PUBWEAK I2C_IRQHandler + PUBWEAK CT16B0_IRQHandler + PUBWEAK CT16B1_IRQHandler + PUBWEAK CT32B0_IRQHandler + PUBWEAK CT32B1_IRQHandler + PUBWEAK SSP0_IRQHandler + PUBWEAK USART_IRQHandler + PUBWEAK USB_IRQHandler + PUBWEAK USB_FIQHandler + PUBWEAK ADC_IRQHandler + PUBWEAK WWDT_IRQHandler + PUBWEAK BOD_IRQHandler + PUBWEAK USBWakeup_IRQHandler + + SECTION .text:CODE:REORDER(1) + THUMB + +NMI_Handler +HardFault_Handler +MemManage_Handler +BusFault_Handler +UsageFault_Handler +SVC_Handler +DebugMon_Handler +PendSV_Handler +SysTick_Handler +FLEX_INT0_IRQHandler +FLEX_INT1_IRQHandler +FLEX_INT2_IRQHandler +FLEX_INT3_IRQHandler +FLEX_INT4_IRQHandler +FLEX_INT5_IRQHandler +FLEX_INT6_IRQHandler +FLEX_INT7_IRQHandler +GINT0_IRQHandler +GINT1_IRQHandler +SSP1_IRQHandler +I2C_IRQHandler +CT16B0_IRQHandler +CT16B1_IRQHandler +CT32B0_IRQHandler +CT32B1_IRQHandler +SSP0_IRQHandler +USART_IRQHandler +USB_IRQHandler +USB_FIQHandler +ADC_IRQHandler +WWDT_IRQHandler +BOD_IRQHandler +USBWakeup_IRQHandler +Default_Handler + B Default_Handler + + END diff --git a/mcu/lpc13uxx/startup_keil/lpc13uxx.sct b/mcu/lpc13uxx/keil/lpc13uxx.sct similarity index 100% rename from mcu/lpc13uxx/startup_keil/lpc13uxx.sct rename to mcu/lpc13uxx/keil/lpc13uxx.sct diff --git a/mcu/lpc13uxx/startup_keil/startup_LPC13Uxx.s b/mcu/lpc13uxx/keil/startup_LPC13Uxx.s similarity index 100% rename from mcu/lpc13uxx/startup_keil/startup_LPC13Uxx.s rename to mcu/lpc13uxx/keil/startup_LPC13Uxx.s diff --git a/mcu/lpc13uxx/startup_xpresso/cr_startup_lpc13u.c b/mcu/lpc13uxx/lpcxpresso/cr_startup_lpc13u.c similarity index 100% rename from mcu/lpc13uxx/startup_xpresso/cr_startup_lpc13u.c rename to mcu/lpc13uxx/lpcxpresso/cr_startup_lpc13u.c diff --git a/mcu/lpc175x_6x/iar/startup_LPC17xx.s b/mcu/lpc175x_6x/iar/startup_LPC17xx.s new file mode 100644 index 000000000..65a706007 --- /dev/null +++ b/mcu/lpc175x_6x/iar/startup_LPC17xx.s @@ -0,0 +1,356 @@ +;/***************************************************************************** +; * @file: startup_LPC17xx.s +; * @purpose: CMSIS Cortex-M3 Core Device Startup File +; * for the NXP LPC17xx Device Series +; * @version: V1.03 +; * @date: 09. February 2010 +; *---------------------------------------------------------------------------- +; * +; * Copyright (C) 2010 ARM Limited. All rights reserved. +; * +; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx +; * processor based microcontrollers. This file can be freely distributed +; * within development tools that are supporting such ARM based processors. +; * +; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +; * +; ******************************************************************************/ + + +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + PUBLIC __vector_table_0x1c + PUBLIC __Vectors + PUBLIC __Vectors_End + PUBLIC __Vectors_Size + + DATA + +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler + + DCD NMI_Handler + DCD HardFault_Handler + DCD MemManage_Handler + DCD BusFault_Handler + DCD UsageFault_Handler +__vector_table_0x1c + DCD 0 + DCD 0 + DCD 0 + DCD 0 + DCD SVC_Handler + DCD DebugMon_Handler + DCD 0 + DCD PendSV_Handler + DCD SysTick_Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 16: Watchdog Timer + DCD TIMER0_IRQHandler ; 17: Timer0 + DCD TIMER1_IRQHandler ; 18: Timer1 + DCD TIMER2_IRQHandler ; 19: Timer2 + DCD TIMER3_IRQHandler ; 20: Timer3 + DCD UART0_IRQHandler ; 21: UART0 + DCD UART1_IRQHandler ; 22: UART1 + DCD UART2_IRQHandler ; 23: UART2 + DCD UART3_IRQHandler ; 24: UART3 + DCD PWM1_IRQHandler ; 25: PWM1 + DCD I2C0_IRQHandler ; 26: I2C0 + DCD I2C1_IRQHandler ; 27: I2C1 + DCD I2C2_IRQHandler ; 28: I2C2 + DCD SPI_IRQHandler ; 29: SPI + DCD SSP0_IRQHandler ; 30: SSP0 + DCD SSP1_IRQHandler ; 31: SSP1 + DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) + DCD RTC_IRQHandler ; 33: Real Time Clock + DCD EINT0_IRQHandler ; 34: External Interrupt 0 + DCD EINT1_IRQHandler ; 35: External Interrupt 1 + DCD EINT2_IRQHandler ; 36: External Interrupt 2 + DCD EINT3_IRQHandler ; 37: External Interrupt 3 + DCD ADC_IRQHandler ; 38: A/D Converter + DCD BOD_IRQHandler ; 39: Brown-Out Detect + DCD USB_IRQHandler ; 40: USB + DCD CAN_IRQHandler ; 41: CAN + DCD DMA_IRQHandler ; 42: General Purpose DMA + DCD I2S_IRQHandler ; 43: I2S + DCD ENET_IRQHandler ; 44: Ethernet + DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer + DCD MCPWM_IRQHandler ; 46: Motor Control PWM + DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface + DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) + DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt + DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt +__Vectors_End + +__Vectors EQU __vector_table +__Vectors_Size EQU __Vectors_End - __Vectors + + PUBLIC CRP_Value + RSEG CRPKEY :CODE(2) +CRP_Value + DCD 0xFFFFFFFF +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:REORDER(2) +Reset_Handler + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:REORDER(1) +NMI_Handler + B NMI_Handler + + PUBWEAK HardFault_Handler + SECTION .text:CODE:REORDER(1) +HardFault_Handler + B HardFault_Handler + + PUBWEAK MemManage_Handler + SECTION .text:CODE:REORDER(1) +MemManage_Handler + B MemManage_Handler + + PUBWEAK BusFault_Handler + SECTION .text:CODE:REORDER(1) +BusFault_Handler + B BusFault_Handler + + PUBWEAK UsageFault_Handler + SECTION .text:CODE:REORDER(1) +UsageFault_Handler + B UsageFault_Handler + + PUBWEAK SVC_Handler + SECTION .text:CODE:REORDER(1) +SVC_Handler + B SVC_Handler + + PUBWEAK DebugMon_Handler + SECTION .text:CODE:REORDER(1) +DebugMon_Handler + B DebugMon_Handler + + PUBWEAK PendSV_Handler + SECTION .text:CODE:REORDER(1) +PendSV_Handler + B PendSV_Handler + + PUBWEAK SysTick_Handler + SECTION .text:CODE:REORDER(1) +SysTick_Handler + B SysTick_Handler + + PUBWEAK WDT_IRQHandler + SECTION .text:CODE:REORDER(1) +WDT_IRQHandler + B WDT_IRQHandler + + PUBWEAK TIMER0_IRQHandler + SECTION .text:CODE:REORDER(1) +TIMER0_IRQHandler + B TIMER0_IRQHandler + + PUBWEAK TIMER1_IRQHandler + SECTION .text:CODE:REORDER(1) +TIMER1_IRQHandler + B TIMER1_IRQHandler + + PUBWEAK TIMER2_IRQHandler + SECTION .text:CODE:REORDER(1) +TIMER2_IRQHandler + B TIMER2_IRQHandler + + PUBWEAK TIMER3_IRQHandler + SECTION .text:CODE:REORDER(1) +TIMER3_IRQHandler + B TIMER3_IRQHandler + + PUBWEAK UART0_IRQHandler + SECTION .text:CODE:REORDER(1) +UART0_IRQHandler + B UART0_IRQHandler + + PUBWEAK UART1_IRQHandler + SECTION .text:CODE:REORDER(1) +UART1_IRQHandler + B UART1_IRQHandler + + PUBWEAK UART2_IRQHandler + SECTION .text:CODE:REORDER(1) +UART2_IRQHandler + B UART2_IRQHandler + + PUBWEAK UART3_IRQHandler + SECTION .text:CODE:REORDER(1) +UART3_IRQHandler + B UART3_IRQHandler + + PUBWEAK PWM1_IRQHandler + SECTION .text:CODE:REORDER(1) +PWM1_IRQHandler + B PWM1_IRQHandler + + PUBWEAK I2C0_IRQHandler + SECTION .text:CODE:REORDER(1) +I2C0_IRQHandler + B I2C0_IRQHandler + + PUBWEAK I2C1_IRQHandler + SECTION .text:CODE:REORDER(1) +I2C1_IRQHandler + B I2C1_IRQHandler + + PUBWEAK I2C2_IRQHandler + SECTION .text:CODE:REORDER(1) +I2C2_IRQHandler + B I2C2_IRQHandler + + PUBWEAK SPI_IRQHandler + SECTION .text:CODE:REORDER(1) +SPI_IRQHandler + B SPI_IRQHandler + + PUBWEAK SSP0_IRQHandler + SECTION .text:CODE:REORDER(1) +SSP0_IRQHandler + B SSP0_IRQHandler + + PUBWEAK SSP1_IRQHandler + SECTION .text:CODE:REORDER(1) +SSP1_IRQHandler + B SSP1_IRQHandler + + PUBWEAK PLL0_IRQHandler + SECTION .text:CODE:REORDER(1) +PLL0_IRQHandler + B PLL0_IRQHandler + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + PUBWEAK EINT0_IRQHandler + SECTION .text:CODE:REORDER(1) +EINT0_IRQHandler + B EINT0_IRQHandler + + PUBWEAK EINT1_IRQHandler + SECTION .text:CODE:REORDER(1) +EINT1_IRQHandler + B EINT1_IRQHandler + + PUBWEAK EINT2_IRQHandler + SECTION .text:CODE:REORDER(1) +EINT2_IRQHandler + B EINT2_IRQHandler + + PUBWEAK EINT3_IRQHandler + SECTION .text:CODE:REORDER(1) +EINT3_IRQHandler + B EINT3_IRQHandler + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:REORDER(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK BOD_IRQHandler + SECTION .text:CODE:REORDER(1) +BOD_IRQHandler + B BOD_IRQHandler + + PUBWEAK USB_IRQHandler + SECTION .text:CODE:REORDER(1) +USB_IRQHandler + B USB_IRQHandler + + PUBWEAK CAN_IRQHandler + SECTION .text:CODE:REORDER(1) +CAN_IRQHandler + B CAN_IRQHandler + + PUBWEAK DMA_IRQHandler + SECTION .text:CODE:REORDER(1) +DMA_IRQHandler + B DMA_IRQHandler + + PUBWEAK I2S_IRQHandler + SECTION .text:CODE:REORDER(1) +I2S_IRQHandler + B I2S_IRQHandler + + PUBWEAK ENET_IRQHandler + SECTION .text:CODE:REORDER(1) +ENET_IRQHandler + B ENET_IRQHandler + + PUBWEAK RIT_IRQHandler + SECTION .text:CODE:REORDER(1) +RIT_IRQHandler + B RIT_IRQHandler + + PUBWEAK MCPWM_IRQHandler + SECTION .text:CODE:REORDER(1) +MCPWM_IRQHandler + B MCPWM_IRQHandler + + PUBWEAK QEI_IRQHandler + SECTION .text:CODE:REORDER(1) +QEI_IRQHandler + B QEI_IRQHandler + + PUBWEAK PLL1_IRQHandler + SECTION .text:CODE:REORDER(1) +PLL1_IRQHandler + B PLL1_IRQHandler + + PUBWEAK USBActivity_IRQHandler + SECTION .text:CODE:REORDER(1) +USBActivity_IRQHandler + B USBActivity_IRQHandler + + PUBWEAK CANActivity_IRQHandler + SECTION .text:CODE:REORDER(1) +CANActivity_IRQHandler + B CANActivity_IRQHandler + + END diff --git a/mcu/lpc175x_6x/startup_keil/startup_LPC17xx.s b/mcu/lpc175x_6x/keil/startup_LPC17xx.s similarity index 100% rename from mcu/lpc175x_6x/startup_keil/startup_LPC17xx.s rename to mcu/lpc175x_6x/keil/startup_LPC17xx.s diff --git a/mcu/lpc175x_6x/startup_xpresso/cr_startup_lpc176x.c b/mcu/lpc175x_6x/lpcxpresso/cr_startup_lpc176x.c similarity index 100% rename from mcu/lpc175x_6x/startup_xpresso/cr_startup_lpc176x.c rename to mcu/lpc175x_6x/lpcxpresso/cr_startup_lpc176x.c diff --git a/mcu/lpc43xx/startup_iar/startup_LPC43xx.s b/mcu/lpc43xx/iar/startup_LPC43xx.s similarity index 100% rename from mcu/lpc43xx/startup_iar/startup_LPC43xx.s rename to mcu/lpc43xx/iar/startup_LPC43xx.s diff --git a/mcu/lpc43xx/keil_ram.ini b/mcu/lpc43xx/keil/keil_ram.ini similarity index 97% rename from mcu/lpc43xx/keil_ram.ini rename to mcu/lpc43xx/keil/keil_ram.ini index 8d7116082..f7e3d1b83 100644 --- a/mcu/lpc43xx/keil_ram.ini +++ b/mcu/lpc43xx/keil/keil_ram.ini @@ -1,11 +1,11 @@ - -FUNC void Setup (unsigned int region) { - region &= 0xFFFF0000; - SP = _RDWORD(region); // Setup Stack Pointer - PC = _RDWORD(region + 4); // Setup Program Counter - _WDWORD(0xE000ED08, region); // Setup Vector Table Offset Register -} - -//LOAD "Board NGX4330\\host_os_none.axf" INCREMENTAL -LOAD %L INCREMENTAL -Setup(__scatterload); // Get ready to execute image in SRAM or whatever region it is in g,main + +FUNC void Setup (unsigned int region) { + region &= 0xFFFF0000; + SP = _RDWORD(region); // Setup Stack Pointer + PC = _RDWORD(region + 4); // Setup Program Counter + _WDWORD(0xE000ED08, region); // Setup Vector Table Offset Register +} + +//LOAD "Board NGX4330\\host_os_none.axf" INCREMENTAL +LOAD %L INCREMENTAL +Setup(__scatterload); // Get ready to execute image in SRAM or whatever region it is in g,main diff --git a/mcu/lpc43xx/startup_keil/startup_LPC43xx.s b/mcu/lpc43xx/keil/startup_LPC43xx.s similarity index 100% rename from mcu/lpc43xx/startup_keil/startup_LPC43xx.s rename to mcu/lpc43xx/keil/startup_LPC43xx.s diff --git a/mcu/lpc43xx/startup_xpresso/cr_startup_lpc43xx.c b/mcu/lpc43xx/lpcxpresso/cr_startup_lpc43xx.c similarity index 100% rename from mcu/lpc43xx/startup_xpresso/cr_startup_lpc43xx.c rename to mcu/lpc43xx/lpcxpresso/cr_startup_lpc43xx.c