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detect bus reset

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This commit is contained in:
hathach 2019-11-27 14:49:19 +07:00
parent 302746d02c
commit bc21714c7e
2 changed files with 14 additions and 10 deletions
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5
hw/bsp/samg55xplained/samg55xplained.c
View File

@ -45,12 +45,8 @@
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
//struct usart_async_descriptor _edbg_com;
//static uint8_t _edbg_com_buf[64];
struct _usart_sync_device _edbg_com;
//------------- IMPLEMENTATION -------------//
void board_init(void)
{
@ -81,7 +77,6 @@ void board_init(void)
_usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&_edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
SysTick_Config(CONF_CPU_FREQUENCY / 1000);

19
src/portable/microchip/samg/dcd_samg.c
View File

@ -41,10 +41,10 @@
*------------------------------------------------------------------*/
// Set up endpoint 0, clear all other endpoints
//static void bus_reset(void)
//{
//
//}
static void bus_reset(void)
{
}
// Initialize controller to device mode
void dcd_init (uint8_t rhport)
@ -133,9 +133,18 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
//--------------------------------------------------------------------+
void dcd_isr(uint8_t rhport)
{
(void) rhport;
uint32_t const intr_mask = UDP->UDP_IMR;
uint32_t const intr_status = UDP->UDP_ISR & intr_mask;
// clear interrupt
UDP->UDP_ICR = intr_status;
// Bus reset
if (intr_status & UDP_ISR_ENDBUSRES)
{
bus_reset();
dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true);
}
}
#endif