mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
renesas_ra: add support for HS port
This commit is contained in:
Martino Facchin
parent
2afef458be
commit
be54870c3b
@ -22,6 +22,7 @@ CFLAGS += \
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SRC_C += \
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src/portable/renesas/rusb2/dcd_rusb2.c \
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src/portable/renesas/rusb2/hcd_rusb2.c \
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src/portable/renesas/rusb2/rusb2_ra.c \
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hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
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hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \
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hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \
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@ -47,6 +48,7 @@ INC += \
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$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \
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$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \
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$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \
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$(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all \
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$(TOP)/$(FSP_MCU_DIR) \
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$(TOP)/$(FSP_BOARD_DIR)
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@ -52,8 +52,10 @@
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/* LINK core registers */
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#if defined(__CCRX__)
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#define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
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#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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#define RUSB2 ((R_USB_HS0_Type*)R_USB_HS0_BASE)
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#else
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#define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
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#define RUSB2 ((R_USB_FS0_Type*)R_USB_FS0_BASE)
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#endif
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/* Start of definition of packed structs (used by the CCRX toolchain) */
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@ -81,6 +83,18 @@ typedef union TU_ATTR_PACKED {
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volatile uint16_t u16;
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} hw_fifo_t;
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typedef union TU_ATTR_PACKED {
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struct {
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volatile uint32_t : 24;
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volatile uint32_t u8: 8;
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};
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struct {
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volatile uint32_t : 16;
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volatile uint32_t u16: 16;
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};
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volatile uint32_t u32;
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} hw_fifo32_t;
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typedef struct TU_ATTR_PACKED
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{
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void *buf; /* the start address of a transfer data buffer */
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@ -185,14 +199,18 @@ static inline void pipe_wait_for_ready(unsigned num)
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static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
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{
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
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#else
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volatile hw_fifo_t *reg = (volatile hw_fifo_t*) fifo;
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#endif
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uintptr_t addr = (uintptr_t)buf;
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while (len >= 2) {
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reg->u16 = *(const uint16_t *)addr;
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addr += 2;
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len -= 2;
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}
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if (len) {
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if (len > 0) {
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reg->u8 = *(const uint8_t *)addr;
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++addr;
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}
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@ -519,12 +537,17 @@ static void process_bus_reset(uint8_t rhport)
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++ctr;
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}
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tu_varclr(&_dcd);
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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dcd_event_bus_reset(rhport, TUSB_SPEED_HIGH, true);
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#else
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dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
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#endif
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}
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static void process_set_address(uint8_t rhport)
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{
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const uint32_t addr = RUSB2->USBADDR_b.USBADDR;
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const uint32_t addr = RUSB2->USBADDR & 0xFF;
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if (!addr) return;
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const tusb_control_request_t setup_packet = {
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#if defined(__CCRX__)
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@ -572,34 +595,53 @@ void dcd_init(uint8_t rhport)
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{
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(void)rhport;
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#if 0 // previously present in the rx driver before generalization
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uint32_t pswi = disable_interrupt();
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
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MSTP(USB0) = 0;
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
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enable_interrupt(pswi);
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#endif
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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RUSB2->SYSCFG_b.HSE = 1;
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RUSB2->PHYSET_b.DIRPD = 0;
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R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
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RUSB2->PHYSET_b.PLLRESET = 0;
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//RUSB2->PHYSET_b.REPSTART = 1;
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RUSB2->SYSCFG_b.DRPD = 0;
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RUSB2->SYSCFG_b.USBE = 1;
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RUSB2->LPSTS_b.SUSPENDM = 1;
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while (!RUSB2->PLLSTA_b.PLLLOCK);
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//RUSB2->BUSWAIT |= 0x0F00U;
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//RUSB2->PHYSET_b.REPSEL = 1;
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RUSB2->CFIFOSEL_b.MBW = 1;
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RUSB2->D0FIFOSEL_b.MBW = 1;
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RUSB2->D1FIFOSEL_b.MBW = 1;
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RUSB2->INTSTS0 = 0;
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#else
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RUSB2->SYSCFG_b.SCKE = 1;
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while (!RUSB2->SYSCFG_b.SCKE) ;
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RUSB2->SYSCFG_b.DRPD = 0;
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RUSB2->SYSCFG_b.DCFM = 0;
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RUSB2->SYSCFG_b.USBE = 1;
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#endif
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// MCU specific PHY init
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rusb2_phy_init();
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#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
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RUSB2->PHYSLEW = 0x5;
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RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
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#define USB_VDCEN (0x0080U) /* b7: Regulator ON/OFF control */
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RUSB2->USBMC = (uint16_t) (RUSB2->USBMC | (USB_VDCEN));
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#endif
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/* Setup default control pipe */
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RUSB2->DCPMAXP_b.MXPS = 64;
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RUSB2->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
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RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
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RUSB2_INTSTS0_RESM_Msk;
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RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_NRDY_Msk;
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RUSB2->BEMPENB = 1;
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RUSB2->BRDYENB = 1;
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#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
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RUSB2->SYSCFG_b.DPRPU = 1; /* necessary in this position */
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#endif
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if (RUSB2->INTSTS0_b.VBSTS) {
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dcd_connect(rhport);
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}
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@ -630,6 +672,10 @@ void dcd_remote_wakeup(uint8_t rhport)
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void dcd_connect(uint8_t rhport)
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{
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(void)rhport;
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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RUSB2->SYSCFG_b.CNEN = 1;
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R_BSP_SoftwareDelay((uint32_t) 10, BSP_DELAY_UNITS_MILLISECONDS);
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#endif
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RUSB2->SYSCFG_b.DPRPU = 1;
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}
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@ -672,6 +718,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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/* setup pipe */
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dcd_int_disable(rhport);
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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RUSB2->PIPEBUF = 0x7C08;
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#endif
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RUSB2->PIPESEL = num;
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RUSB2->PIPEMAXP = mps;
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volatile uint16_t *ctr = get_pipectr(num);
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@ -826,6 +875,9 @@ void dcd_int_handler(uint8_t rhport)
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break;
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}
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}
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if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
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RUSB2->NRDYSTS = 0;
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}
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if (is0 & RUSB2_INTSTS0_CTRT_Msk) {
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if (is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA) {
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/* A setup packet has been received. */
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@ -48,8 +48,10 @@
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/* LINK core registers */
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#if defined(__CCRX__)
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#define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
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#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
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#define RUSB2 ((R_USB_HS0_Type*) R_USB_HS0_BASE)
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#else
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#define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
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#define RUSB2 ((R_USB_FS0_Type*) R_USB_FS0_BASE)
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#endif
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TU_ATTR_PACKED_BEGIN
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@ -477,31 +479,49 @@ bool hcd_init(uint8_t rhport)
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{
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(void)rhport;
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#if 0 // previously present in the rx driver before generalization
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uint32_t pswi = disable_interrupt();
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
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MSTP(USB0) = 0;
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
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enable_interrupt(pswi);
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#endif
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RUSB2->SYSCFG_b.SCKE = 1;
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while (!RUSB2->SYSCFG_b.SCKE) ;
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RUSB2->SYSCFG_b.DPRPU = 0;
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RUSB2->SYSCFG_b.DRPD = 0;
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
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RUSB2->SYSCFG_b.HSE = 1;
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RUSB2->PHYSET_b.HSEB = 0;
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RUSB2->PHYSET_b.DIRPD = 0;
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R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
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RUSB2->PHYSET_b.PLLRESET = 0;
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RUSB2->LPSTS_b.SUSPENDM = 1;
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while (!RUSB2->PLLSTA_b.PLLLOCK);
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RUSB2->SYSCFG_b.DRPD = 1;
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RUSB2->SYSCFG_b.DCFM = 1;
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RUSB2->SYSCFG_b.DPRPU = 0;
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RUSB2->SYSCFG_b.CNEN = 1;
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RUSB2->BUSWAIT |= 0x0F00U;
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RUSB2->SOFCFG_b.INTL = 1;
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RUSB2->DVSTCTR0_b.VBUSEN = 1;
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RUSB2->CFIFOSEL_b.MBW = 1;
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RUSB2->D0FIFOSEL_b.MBW = 1;
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RUSB2->D1FIFOSEL_b.MBW = 1;
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RUSB2->INTSTS0 = 0;
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for (volatile int i = 0; i < 30000; ++i) ;
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RUSB2->SYSCFG_b.USBE = 1;
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#else
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/* HOST DEVICE Full SPEED */
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RUSB2->SYSCFG_b.SCKE = 1; /* USB Clock enable */
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while (!RUSB2->SYSCFG_b.SCKE) ;
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RUSB2->SYSCFG_b.DPRPU = 0; /* D+ pull up enable - 0/disable in host mode */
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RUSB2->SYSCFG_b.DRPD = 1; /* D+/D- pull down - 1/in Host mode (pag.834)*/
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RUSB2->SYSCFG_b.DCFM = 1; /* HOST or Device - 1/HOST */
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RUSB2->DVSTCTR0_b.VBUSEN = 1;
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RUSB2->SYSCFG_b.DRPD = 1;
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for (volatile int i = 0; i < 30000; ++i) ;
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RUSB2->SYSCFG_b.USBE = 1;
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#endif
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// MCU specific PHY init
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rusb2_phy_init();
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#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
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RUSB2->PHYSLEW = 0x5;
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RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
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#endif
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/* Setup default control pipe */
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RUSB2->DCPCFG = RUSB2_PIPECFG_SHTNAK_Msk;
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16
src/portable/renesas/rusb2/rusb2_ra.c
Normal file
16
src/portable/renesas/rusb2/rusb2_ra.c
Normal file
@ -0,0 +1,16 @@
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#include "tusb_option.h"
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#include "rusb2_ra.h"
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#ifdef CFG_TUSB_RHPORT0_MODE
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IRQn_Type _usb_fs_irqn = USBFS_INT_IRQn;
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void tud_set_irq_usbfs(IRQn_Type q) {
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_usb_fs_irqn = q;
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}
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#endif
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#ifdef CFG_TUSB_RHPORT1_MODE
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IRQn_Type _usb_hs_irqn = USBHS_USB_INT_RESUME_IRQn;
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void tud_set_irq_usbhs(IRQn_Type q) {
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_usb_hs_irqn = q;
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}
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#endif
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@ -34,18 +34,45 @@ extern "C" {
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/* renesas fsp api */
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#include "bsp_api.h"
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#define RUSB2_REG_BASE (0x40090000)
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extern IRQn_Type _usb_fs_irqn;
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extern IRQn_Type _usb_hs_irqn;
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TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_EnableIRQ(TU_IRQn);
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#ifdef CFG_TUSB_RHPORT1_MODE
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#if (CFG_TUSB_RHPORT1_MODE != 0)
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if (rhport == 1) {
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NVIC_EnableIRQ(_usb_hs_irqn);
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}
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#endif
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#endif
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#ifdef CFG_TUSB_RHPORT0_MODE
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#if (CFG_TUSB_RHPORT0_MODE != 0)
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if (rhport == 0) {
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NVIC_EnableIRQ(_usb_fs_irqn);
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}
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#endif
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_DisableIRQ(TU_IRQn);
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#ifdef CFG_TUSB_RHPORT1_MODE
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#if (CFG_TUSB_RHPORT1_MODE != 0)
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if (rhport == 1) {
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NVIC_DisableIRQ(_usb_hs_irqn);
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}
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#endif
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#endif
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#ifdef CFG_TUSB_RHPORT0_MODE
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#if (CFG_TUSB_RHPORT0_MODE != 0)
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if (rhport == 0) {
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NVIC_DisableIRQ(_usb_fs_irqn);
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}
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#endif
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#endif
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}
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// MCU specific PHY init
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