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Merge pull request #136 from hathach/develop

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fix #132
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hathach 2019-09-11 11:16:47 +07:00 committed by GitHub
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21 changed files with 750 additions and 1959 deletions
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3
docs/boards.md
View File

@ -25,6 +25,7 @@ This code base already had supported for a handful of following boards
- [LPCXpresso 1769](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc1769:OM13000)
- [Keil MCB1800 Evaluation Board](http://www.keil.com/mcb1800)
- [Embedded Artists LPC4088 Quick Start board](https://www.embeddedartists.com/products/lpc4088-quickstart-board)
- [NGX LPC4330-Xplorer](https://www.nxp.com/design/designs/lpc4330-xplorer-board:OM13027)
- [Embedded Artists LPC4357 Developer Kit](http://www.embeddedartists.com/products/kits/lpc4357_kit.php)
- [LPCXpresso 51U68](https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpcxpresso51u68-for-the-lpc51u68-mcus:OM40005)
- [LPCXpresso 54114](https://www.nxp.com/design/microcontrollers-developer-resources/lpcxpresso-boards/lpcxpresso54114-board:OM13089)
@ -50,7 +51,7 @@ This code base already had supported for a handful of following boards
If you don't possess any of supported board above. Don't worry you can easily implemented your own one by following this guide as long as the mcu is supported.
- Create new makefile for your board at `hw/bsp/<board name>/board.mk` and linker file as well if needed.
- Create new source file for your board at `hw/bsp/<board name>/board_<board name>.c` and implement following APIs
- Create new source file for your board at `hw/bsp/<board name>/<board name>.c` and implement following APIs
### Board APIs

9
examples/readme.md
View File

@ -30,9 +30,16 @@ $ make BOARD=feather_nrf52840_express all
## Flash
TODO: write more on flashing
`flash` target will use the on-board debugger (jlink/cmsisdap/stlink/dfu) to flash the binary. We should install those debugger/programmer software in advance. Futhermore, since external jlink can be used with most of the board, there is also `flash-jlink` target for out convenience.
```
$ make BOARD=feather_nrf52840_express flash
$ make BOARD=feather_nrf52840_express flash-jlink
```
Some board use uf2 bootloader for drag & drop in to mass storage device, uf2 can be generated with `uf2` target
```
$ make BOARD=feather_nrf52840_express all uf2
```

19
hw/bsp/ea4088qs/board.mk
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@ -11,6 +11,8 @@ CFLAGS += \
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc40xx/lpc_chip_40xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/ea4088qs/lpc4088.ld
@ -18,16 +20,17 @@ LD_FILE = hw/bsp/ea4088qs/lpc4088.ld
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/chip_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/clock_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/gpio_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/iocon_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/sysctl_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/sysinit_17xx_40xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/uart_17xx_40xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
$(MCU_DIR)/src/chip_17xx_40xx.c \
$(MCU_DIR)/src/clock_17xx_40xx.c \
$(MCU_DIR)/src/gpio_17xx_40xx.c \
$(MCU_DIR)/src/iocon_17xx_40xx.c \
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/src/uart_17xx_40xx.c
INC += \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_40xx/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

418
hw/bsp/ea4088qs/cr_startup_lpc40xx.c
View File

@ -1,418 +0,0 @@
//*****************************************************************************
// LPC407x_8x Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 140114
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2014
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern void SystemInit(void);
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void MemManage_Handler(void);
WEAK void BusFault_Handler(void);
WEAK void UsageFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void DebugMon_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
#if defined (__USE_LPCOPEN)
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
#else
void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
#endif
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
#if defined (__USE_LPCOPEN)
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
#else
void MCI_IRQHandler(void) ALIAS(IntDefaultHandler);
#endif
void UART4_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP2_IRQHandler(void) ALIAS(IntDefaultHandler);
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
void PWM0_IRQHandler(void) ALIAS(IntDefaultHandler);
void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
// Core Level - CM4
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// Chip Level - LPC40xx
WDT_IRQHandler, // 16, 0x40 - WDT
TIMER0_IRQHandler, // 17, 0x44 - TIMER0
TIMER1_IRQHandler, // 18, 0x48 - TIMER1
TIMER2_IRQHandler, // 19, 0x4c - TIMER2
TIMER3_IRQHandler, // 20, 0x50 - TIMER3
UART0_IRQHandler, // 21, 0x54 - UART0
UART1_IRQHandler, // 22, 0x58 - UART1
UART2_IRQHandler, // 23, 0x5c - UART2
UART3_IRQHandler, // 24, 0x60 - UART3
PWM1_IRQHandler, // 25, 0x64 - PWM1
I2C0_IRQHandler, // 26, 0x68 - I2C0
I2C1_IRQHandler, // 27, 0x6c - I2C1
I2C2_IRQHandler, // 28, 0x70 - I2C2
IntDefaultHandler, // 29, Not used
SSP0_IRQHandler, // 30, 0x78 - SSP0
SSP1_IRQHandler, // 31, 0x7c - SSP1
PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
RTC_IRQHandler, // 33, 0x84 - RTC
EINT0_IRQHandler, // 34, 0x88 - EINT0
EINT1_IRQHandler, // 35, 0x8c - EINT1
EINT2_IRQHandler, // 36, 0x90 - EINT2
EINT3_IRQHandler, // 37, 0x94 - EINT3
ADC_IRQHandler, // 38, 0x98 - ADC
BOD_IRQHandler, // 39, 0x9c - BOD
USB_IRQHandler, // 40, 0xA0 - USB
CAN_IRQHandler, // 41, 0xa4 - CAN
DMA_IRQHandler, // 42, 0xa8 - GP DMA
I2S_IRQHandler, // 43, 0xac - I2S
#if defined (__USE_LPCOPEN)
ETH_IRQHandler, // 44, 0xb0 - Ethernet
SDIO_IRQHandler, // 45, 0xb4 - SD/MMC card I/F
#else
ENET_IRQHandler, // 44, 0xb0 - Ethernet
MCI_IRQHandler, // 45, 0xb4 - SD/MMC card I/F
#endif
MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
UART4_IRQHandler, // 51, 0xcc - UART4
SSP2_IRQHandler, // 52, 0xd0 - SSP2
LCD_IRQHandler, // 53, 0xd4 - LCD
GPIO_IRQHandler, // 54, 0xd8 - GPIO
PWM0_IRQHandler, // 55, 0xdc - PWM0
EEPROM_IRQHandler, // 56, 0xe0 - EEPROM
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void
ResetISR(void) {
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
/*
* Code to enable the Cortex-M4 FPU only included
* if appropriate build options have been selected.
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
*/
// Read CPACR (located at address 0xE000ED88)
// Set bits 20-23 to enable CP10 and CP11 coprocessors
// Write back the modified value to the CPACR
asm volatile ("LDR.W R0, =0xE000ED88\n\t"
"LDR R1, [R0]\n\t"
"ORR R1, R1, #(0xF << 20)\n\t"
"STR R1, [R0]");
#endif // (__VFP_FP__) && !(__SOFTFP__)
// Check to see if we are running the code from a non-zero
// address (eg RAM, external flash), in which case we need
// to modify the VTOR register to tell the CPU that the
// vector table is located at a non-0x0 address.
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
// CMSIS : SCB->VTOR = <address of vector table>
*pSCB_VTOR = (unsigned int)g_pfnVectors;
}
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void MemManage_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void BusFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void UsageFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void DebugMon_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void)
{ while(1) {}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void)
{ while(1) {}
}

24
hw/bsp/ea4357/board.mk
View File

@ -7,6 +7,11 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX \
-D__USE_LPCOPEN
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc43xx/lpc_chip_43xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/ea4357/lpc4357.ld
@ -14,17 +19,18 @@ LD_FILE = hw/bsp/ea4357/lpc4357.ld
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/chip_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/clock_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/gpio_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/sysinit_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/i2c_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/i2cm_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/uart_18xx_43xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \
$(MCU_DIR)/src/chip_18xx_43xx.c \
$(MCU_DIR)/src/clock_18xx_43xx.c \
$(MCU_DIR)/src/gpio_18xx_43xx.c \
$(MCU_DIR)/src/sysinit_18xx_43xx.c \
$(MCU_DIR)/src/i2c_18xx_43xx.c \
$(MCU_DIR)/src/i2cm_18xx_43xx.c \
$(MCU_DIR)/src/uart_18xx_43xx.c
INC += \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_43xx/inc \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_43xx/inc/config_43xx
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_43xx
# For TinyUSB port source
VENDOR = nxp

515
hw/bsp/ea4357/cr_startup_lpc43xx.c
View File

@ -1,515 +0,0 @@
//*****************************************************************************
// LPC43xx (Cortex-M4) Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 150706
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2013-2015
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern void SystemInit(void);
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void MemManage_Handler(void);
WEAK void BusFault_Handler(void);
WEAK void UsageFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void DebugMon_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
#if defined (__USE_LPCOPEN)
void M0APP_IRQHandler(void) ALIAS(IntDefaultHandler);
#else
void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
#endif
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
#if defined (__USE_LPCOPEN)
void ADCHS_IRQHandler(void) ALIAS(IntDefaultHandler);
#else
void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
#endif
void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
void M0SUB_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
//
// External declaration for LPC MCU vector table checksum from Linker Script
//
//*****************************************************************************
WEAK extern void __valid_user_code_checksum(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((used,section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
// Core Level - CM4
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
__valid_user_code_checksum, // LPC MCU Checksum
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// Chip Level - LPC43 (M4)
DAC_IRQHandler, // 16
#if defined (__USE_LPCOPEN)
M0APP_IRQHandler, // 17 CortexM4/M0 (LPC43XX ONLY)
#else
M0CORE_IRQHandler, // 17
#endif
DMA_IRQHandler, // 18
0, // 19
FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
ETH_IRQHandler, // 21
SDIO_IRQHandler, // 22
LCD_IRQHandler, // 23
USB0_IRQHandler, // 24
USB1_IRQHandler, // 25
SCT_IRQHandler, // 26
RIT_IRQHandler, // 27
TIMER0_IRQHandler, // 28
TIMER1_IRQHandler, // 29
TIMER2_IRQHandler, // 30
TIMER3_IRQHandler, // 31
MCPWM_IRQHandler, // 32
ADC0_IRQHandler, // 33
I2C0_IRQHandler, // 34
I2C1_IRQHandler, // 35
SPI_IRQHandler, // 36
ADC1_IRQHandler, // 37
SSP0_IRQHandler, // 38
SSP1_IRQHandler, // 39
UART0_IRQHandler, // 40
UART1_IRQHandler, // 41
UART2_IRQHandler, // 42
UART3_IRQHandler, // 43
I2S0_IRQHandler, // 44
I2S1_IRQHandler, // 45
SPIFI_IRQHandler, // 46
SGPIO_IRQHandler, // 47
GPIO0_IRQHandler, // 48
GPIO1_IRQHandler, // 49
GPIO2_IRQHandler, // 50
GPIO3_IRQHandler, // 51
GPIO4_IRQHandler, // 52
GPIO5_IRQHandler, // 53
GPIO6_IRQHandler, // 54
GPIO7_IRQHandler, // 55
GINT0_IRQHandler, // 56
GINT1_IRQHandler, // 57
EVRT_IRQHandler, // 58
CAN1_IRQHandler, // 59
0, // 60
#if defined (__USE_LPCOPEN)
ADCHS_IRQHandler, // 61 ADCHS combined interrupt
#else
VADC_IRQHandler, // 61
#endif
ATIMER_IRQHandler, // 62
RTC_IRQHandler, // 63
0, // 64
WDT_IRQHandler, // 65
M0SUB_IRQHandler, // 66
CAN0_IRQHandler, // 67
QEI_IRQHandler, // 68
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__((section(".after_vectors"
)))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//
//*****************************************************************************
void ResetISR(void) {
// *************************************************************
// The following conditional block of code manually resets as
// much of the peripheral set of the LPC43 as possible. This is
// done because the LPC43 does not provide a means of triggering
// a full system reset under debugger control, which can cause
// problems in certain circumstances when debugging.
//
// You can prevent this code block being included if you require
// (for example when creating a final executable which you will
// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
//
#ifndef DONT_RESET_ON_RESTART
// Disable interrupts
__asm volatile ("cpsid i");
// equivalent to CMSIS '__disable_irq()' function
unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
// LPC_RGU->RESET_CTRL0 @ 0x40053100
// LPC_RGU->RESET_CTRL1 @ 0x40053104
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
// Write to LPC_RGU->RESET_CTRL0
*(RESET_CONTROL + 0) = 0x10DF1000;
// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
// USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST
// Write to LPC_RGU->RESET_CTRL1
*(RESET_CONTROL + 1) = 0x01DFF7FF;
// M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
// Clear all pending interrupts in the NVIC
volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
unsigned int irqpendloop;
for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
*(NVIC_ICPR + irqpendloop) = 0xFFFFFFFF;
}
// Reenable interrupts
__asm volatile ("cpsie i");
// equivalent to CMSIS '__enable_irq()' function
#endif // ifndef DONT_RESET_ON_RESTART
// *************************************************************
#if defined (__USE_LPCOPEN)
SystemInit();
#endif
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
#if !defined (__USE_LPCOPEN)
// LPCOpen init code deals with FP and VTOR initialisation
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
/*
* Code to enable the Cortex-M4 FPU only included
* if appropriate build options have been selected.
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
*/
// CPACR is located at address 0xE000ED88
asm("LDR.W R0, =0xE000ED88");
// Read CPACR
asm("LDR R1, [R0]");
// Set bits 20-23 to enable CP10 and CP11 coprocessors
asm(" ORR R1, R1, #(0xF << 20)");
// Write back the modified value to the CPACR
asm("STR R1, [R0]");
#endif // (__VFP_FP__) && !(__SOFTFP__)
// ******************************
// Check to see if we are running the code from a non-zero
// address (eg RAM, external flash), in which case we need
// to modify the VTOR register to tell the CPU that the
// vector table is located at a non-0x0 address.
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
if ((unsigned int *) g_pfnVectors != (unsigned int *) 0x00000000) {
// CMSIS : SCB->VTOR = <address of vector table>
*pSCB_VTOR = (unsigned int) g_pfnVectors;
}
#endif
#if defined (__USE_CMSIS)
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main();
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void MemManage_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void BusFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void UsageFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void DebugMon_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void) {
while (1) {
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void) {
while (1) {
}
}

18
hw/bsp/lpcxpresso11u37/board.mk
View File

@ -12,22 +12,22 @@ CFLAGS += \
# startup.c and lpc_types.h cause following errors
CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx/lpc_chip_11uxx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/lpcxpresso11u37/lpc11u37.ld
SRC_C += \
$(MCU_DIR)/cr_startup_lpc11xx.c \
$(MCU_DIR)/lpc_chip_11uxx/src/chip_11xx.c \
$(MCU_DIR)/lpc_chip_11uxx/src/clock_11xx.c \
$(MCU_DIR)/lpc_chip_11uxx/src/gpio_11xx_1.c \
$(MCU_DIR)/lpc_chip_11uxx/src/iocon_11xx.c \
$(MCU_DIR)/lpc_chip_11uxx/src/sysctl_11xx.c \
$(MCU_DIR)/lpc_chip_11uxx/src/sysinit_11xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \
$(MCU_DIR)/src/chip_11xx.c \
$(MCU_DIR)/src/clock_11xx.c \
$(MCU_DIR)/src/gpio_11xx_1.c \
$(MCU_DIR)/src/iocon_11xx.c \
$(MCU_DIR)/src/sysctl_11xx.c \
$(MCU_DIR)/src/sysinit_11xx.c
INC += \
$(TOP)/$(MCU_DIR)/lpc_chip_11uxx/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

18
hw/bsp/lpcxpresso11u68/board.mk
View File

@ -10,22 +10,22 @@ CFLAGS += \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x/lpc_chip_11u6x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld
SRC_C += \
$(MCU_DIR)/cr_startup_lpc11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/chip_11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/clock_11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/gpio_11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/iocon_11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/syscon_11u6x.c \
$(MCU_DIR)/lpc_chip_11u6x/src/sysinit_11u6x.c
$(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \
$(MCU_DIR)/src/chip_11u6x.c \
$(MCU_DIR)/src/clock_11u6x.c \
$(MCU_DIR)/src/gpio_11u6x.c \
$(MCU_DIR)/src/iocon_11u6x.c \
$(MCU_DIR)/src/syscon_11u6x.c \
$(MCU_DIR)/src/sysinit_11u6x.c
INC += \
$(TOP)/$(MCU_DIR)/lpc_chip_11u6x/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

17
hw/bsp/lpcxpresso1347/board.mk
View File

@ -12,19 +12,22 @@ CFLAGS += \
# startup.c and lpc_types.h cause following errors
CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc13xx/lpc_chip_13xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/lpcxpresso1347/lpc1347.ld
SRC_C += \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/chip_13xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/clock_13xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/gpio_13xx_1.c \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/iocon_13xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/sysctl_13xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/sysinit_13xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \
$(MCU_DIR)/src/chip_13xx.c \
$(MCU_DIR)/src/clock_13xx.c \
$(MCU_DIR)/src/gpio_13xx_1.c \
$(MCU_DIR)/src/iocon_13xx.c \
$(MCU_DIR)/src/sysctl_13xx.c \
$(MCU_DIR)/src/sysinit_13xx.c
INC += \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_13xx/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

473
hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c
View File

@ -1,473 +0,0 @@
//*****************************************************************************
// +--+
// | ++----+
// +-++ |
// | |
// +-+--+ |
// | +--+--+
// +----+ Copyright (c) 2011-12 Code Red Technologies Ltd.
//
// Microcontroller Startup code for use with Red Suite
//
// Version : 120126
//
// Software License Agreement
//
// The software is owned by Code Red Technologies and/or its suppliers, and is
// protected under applicable copyright laws. All rights are reserved. Any
// use in violation of the foregoing restrictions may subject the user to criminal
// sanctions under applicable laws, as well as to civil liability for the breach
// of the terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
// CODE RED TECHNOLOGIES LTD.
//
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
/* Include sys_config.h to get the CHIP_11* device identifier */
#include "sys_config.h"
// Code Red - if CMSIS is being used, then SystemInit() routine
// will be called by startup code rather than in application's main()
extern void SystemInit(void);
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
#if defined(CHIP_LPC1343)
void WAKEUP_IRQHandler (void) ALIAS(IntDefaultHandler);
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT3_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT2_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
#elif defined(CHIP_LPC1347)
void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void RIT_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
void OSCFAIL_IRQHandler (void) ALIAS(IntDefaultHandler);
void PVTCIRCUIT_IRQHandler (void) ALIAS(IntDefaultHandler);
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
#else
#error No CHIP_134* device defined
#endif
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for redlib based applications
// main() is the entry point for newlib based applications
//
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
void (* const g_pfnVectors[])(void) = {
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
0, // Reserved
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
#if defined(CHIP_LPC1343)
WAKEUP_IRQHandler, // Wakeup PIO0.0
WAKEUP_IRQHandler, // Wakeup PIO0.1
WAKEUP_IRQHandler, // Wakeup PIO0.2
WAKEUP_IRQHandler, // Wakeup PIO0.3
WAKEUP_IRQHandler, // Wakeup PIO0.4
WAKEUP_IRQHandler, // Wakeup PIO0.5
WAKEUP_IRQHandler, // Wakeup PIO0.6
WAKEUP_IRQHandler, // Wakeup PIO0.7
WAKEUP_IRQHandler, // Wakeup PIO0.8
WAKEUP_IRQHandler, // Wakeup PIO0.9
WAKEUP_IRQHandler, // Wakeup PIO0.10
WAKEUP_IRQHandler, // Wakeup PIO0.11
WAKEUP_IRQHandler, // Wakeup PIO1.0
WAKEUP_IRQHandler, // Wakeup PIO1.1
WAKEUP_IRQHandler, // Wakeup PIO1.2
WAKEUP_IRQHandler, // Wakeup PIO1.3
WAKEUP_IRQHandler, // Wakeup PIO1.4
WAKEUP_IRQHandler, // Wakeup PIO1.5
WAKEUP_IRQHandler, // Wakeup PIO1.6
WAKEUP_IRQHandler, // Wakeup PIO1.7
WAKEUP_IRQHandler, // Wakeup PIO1.8
WAKEUP_IRQHandler, // Wakeup PIO1.9
WAKEUP_IRQHandler, // Wakeup PIO1.10
WAKEUP_IRQHandler, // Wakeup PIO1.11
WAKEUP_IRQHandler, // Wakeup PIO2.0
WAKEUP_IRQHandler, // Wakeup PIO2.1
WAKEUP_IRQHandler, // Wakeup PIO2.2
WAKEUP_IRQHandler, // Wakeup PIO2.3
WAKEUP_IRQHandler, // Wakeup PIO2.4
WAKEUP_IRQHandler, // Wakeup PIO2.5
WAKEUP_IRQHandler, // Wakeup PIO2.6
WAKEUP_IRQHandler, // Wakeup PIO2.7
WAKEUP_IRQHandler, // Wakeup PIO2.8
WAKEUP_IRQHandler, // Wakeup PIO2.9
WAKEUP_IRQHandler, // Wakeup PIO2.10
WAKEUP_IRQHandler, // Wakeup PIO2.11
WAKEUP_IRQHandler, // Wakeup PIO3.0
WAKEUP_IRQHandler, // Wakeup PIO3.1
WAKEUP_IRQHandler, // Wakeup PIO3.2
WAKEUP_IRQHandler, // Wakeup PIO3.3
I2C_IRQHandler, // I2C
TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0
TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1
TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0
TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1
SSP0_IRQHandler, // SSP0
UART_IRQHandler, // UART
USB_IRQHandler, // USB IRQ
USB_FIQHandler, // USB FIQ
ADC_IRQHandler, // A/D Converter
WDT_IRQHandler, // Watchdog Timer
BOD_IRQHandler, // Brown Out Detect
FMC_IRQHandler, // IP2111 Flash Memory Controller
PIOINT3_IRQHandler, // PIO INT3
PIOINT2_IRQHandler, // PIO INT2
PIOINT1_IRQHandler, // PIO INT1
PIOINT0_IRQHandler, // PIO INT0
#elif defined(CHIP_LPC1347)
PIN_INT0_IRQHandler, // All GPIO pin can be routed to PIN_INTx
PIN_INT1_IRQHandler,
PIN_INT2_IRQHandler,
PIN_INT3_IRQHandler,
PIN_INT4_IRQHandler,
PIN_INT5_IRQHandler,
PIN_INT6_IRQHandler,
PIN_INT7_IRQHandler,
GINT0_IRQHandler,
GINT1_IRQHandler, // PIO0 (0:7)
0,
0,
RIT_IRQHandler,
0,
SSP1_IRQHandler, // SSP1
I2C_IRQHandler, // I2C
TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0
TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1
TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0
TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1
SSP0_IRQHandler, // SSP0
UART_IRQHandler, // UART
USB_IRQHandler, // USB IRQ
USB_FIQHandler, // USB FIQ
ADC_IRQHandler, // A/D Converter
WDT_IRQHandler, // Watchdog Timer
BOD_IRQHandler, // Brown Out Detect
FMC_IRQHandler, // IP2111 Flash Memory Controller
OSCFAIL_IRQHandler, // OSC FAIL
PVTCIRCUIT_IRQHandler, // PVT CIRCUIT
USBWakeup_IRQHandler, // USB wake up
0,
#else
#error No CHIP_13* device defined
#endif
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
#else
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the load address, execution address and length of the RW data section and
// the execution and length of the BSS (zero initialized) section.
// Note that these symbols are not normally used by the managed linker script
// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
// They are provide here simply so this startup code can be used with earlier
// versions of Red Suite which do not support the more advanced managed linker
// script mechanism introduced in the above version. To enable their use,
// define "USE_OLD_STYLE_DATA_BSS_INIT".
//*****************************************************************************
extern unsigned int _etext;
extern unsigned int _data;
extern unsigned int _edata;
extern unsigned int _bss;
extern unsigned int _ebss;
#endif
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void
ResetISR(void) {
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
#else
// Use Old Style Data and BSS section initialization.
// This will only initialize a single RAM bank.
unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
// Copy the data segment from flash to SRAM.
LoadAddr = &_etext;
ExeAddr = &_data;
EndAddr = &_edata;
SectionLen = (void*)EndAddr - (void*)ExeAddr;
data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
// Zero fill the bss segment
ExeAddr = &_bss;
EndAddr = &_ebss;
SectionLen = (void*)EndAddr - (void*)ExeAddr;
bss_init ((unsigned int)ExeAddr, SectionLen);
#endif
extern void SystemInit(void);
SystemInit();
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void)
{
while(1)
{
}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void)
{
while(1)
{
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void)
{
while(1)
{
}
}

22
hw/bsp/lpcxpresso1769/board.mk
View File

@ -11,26 +11,26 @@ CFLAGS += \
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x/lpc_chip_175x_6x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x
# TODO remove later
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
$(MCU_DIR)/cr_startup_lpc175x_6x.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/chip_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/clock_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/uart_17xx_40xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
$(MCU_DIR)/src/chip_17xx_40xx.c \
$(MCU_DIR)/src/clock_17xx_40xx.c \
$(MCU_DIR)/src/gpio_17xx_40xx.c \
$(MCU_DIR)/src/iocon_17xx_40xx.c \
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/src/uart_17xx_40xx.c
INC += \
$(TOP)/$(MCU_DIR)/lpc_chip_175x_6x/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

22
hw/bsp/mbed1768/board.mk
View File

@ -11,26 +11,26 @@ CFLAGS += \
# startup.c and lpc_types.h cause following errors
CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x/lpc_chip_175x_6x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/mbed1768/lpc1768.ld
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x
# TODO remove later
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
$(MCU_DIR)/cr_startup_lpc175x_6x.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/chip_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/clock_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/lpc_chip_175x_6x/src/uart_17xx_40xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
$(MCU_DIR)/src/chip_17xx_40xx.c \
$(MCU_DIR)/src/clock_17xx_40xx.c \
$(MCU_DIR)/src/gpio_17xx_40xx.c \
$(MCU_DIR)/src/iocon_17xx_40xx.c \
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/src/uart_17xx_40xx.c
INC += \
$(TOP)/$(MCU_DIR)/lpc_chip_175x_6x/inc
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp

17
hw/bsp/mcb1800/board.mk
View File

@ -10,6 +10,8 @@ CFLAGS += \
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc18xx/lpc_chip_18xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/mcb1800/lpc1857.ld
@ -17,15 +19,16 @@ LD_FILE = hw/bsp/mcb1800/lpc1857.ld
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/chip_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/clock_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/gpio_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/sysinit_18xx_43xx.c \
hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/uart_18xx_43xx.c
$(MCU_DIR)/../gcc/cr_startup_lpc18xx.c \
$(MCU_DIR)/src/chip_18xx_43xx.c \
$(MCU_DIR)/src/clock_18xx_43xx.c \
$(MCU_DIR)/src/gpio_18xx_43xx.c \
$(MCU_DIR)/src/sysinit_18xx_43xx.c \
$(MCU_DIR)/src/uart_18xx_43xx.c
INC += \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_18xx/inc \
$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_18xx/inc/config_18xx
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_18xx
# For TinyUSB port source
VENDOR = nxp

477
hw/bsp/mcb1800/cr_startup_lpc18xx.c
View File

@ -1,477 +0,0 @@
//*****************************************************************************
// LPC18xx Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 150706
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2013-2015
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern void SystemInit(void);
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void MemManage_Handler(void);
WEAK void BusFault_Handler(void);
WEAK void UsageFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void DebugMon_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
//
// External declaration for LPC MCU vector table checksum from Linker Script
//
//*****************************************************************************
WEAK extern void __valid_user_code_checksum(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((used,section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
// Core Level - CM3
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
__valid_user_code_checksum, // LPC MCU Checksum
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// Chip Level - LPC18
DAC_IRQHandler, // 16
0, // 17
DMA_IRQHandler, // 18
0, // 19
FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
ETH_IRQHandler, // 21
SDIO_IRQHandler, // 22
LCD_IRQHandler, // 23
USB0_IRQHandler, // 24
USB1_IRQHandler, // 25
SCT_IRQHandler, // 26
RIT_IRQHandler, // 27
TIMER0_IRQHandler, // 28
TIMER1_IRQHandler, // 29
TIMER2_IRQHandler, // 30
TIMER3_IRQHandler, // 31
MCPWM_IRQHandler, // 32
ADC0_IRQHandler, // 33
I2C0_IRQHandler, // 34
I2C1_IRQHandler, // 35
0, // 36
ADC1_IRQHandler, // 37
SSP0_IRQHandler, // 38
SSP1_IRQHandler, // 39
UART0_IRQHandler, // 40
UART1_IRQHandler, // 41
UART2_IRQHandler, // 42
UART3_IRQHandler, // 43
I2S0_IRQHandler, // 44
I2S1_IRQHandler, // 45
SPIFI_IRQHandler, // 46
SGPIO_IRQHandler, // 47
GPIO0_IRQHandler, // 48
GPIO1_IRQHandler, // 49
GPIO2_IRQHandler, // 50
GPIO3_IRQHandler, // 51
GPIO4_IRQHandler, // 52
GPIO5_IRQHandler, // 53
GPIO6_IRQHandler, // 54
GPIO7_IRQHandler, // 55
GINT0_IRQHandler, // 56
GINT1_IRQHandler, // 57
EVRT_IRQHandler, // 58
CAN1_IRQHandler, // 59
0, // 60
0, // 61
ATIMER_IRQHandler, // 62
RTC_IRQHandler, // 63
0, // 64
WDT_IRQHandler, // 65
0, // 66
CAN0_IRQHandler, // 67
QEI_IRQHandler, // 68
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//
//*****************************************************************************
void
ResetISR(void) {
// *************************************************************
// The following conditional block of code manually resets as
// much of the peripheral set of the LPC18 as possible. This is
// done because the LPC18 does not provide a means of triggering
// a full system reset under debugger control, which can cause
// problems in certain circumstances when debugging.
//
// You can prevent this code block being included if you require
// (for example when creating a final executable which you will
// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
//
#ifndef DONT_RESET_ON_RESTART
// Disable interrupts
__asm volatile ("cpsid i");
// equivalent to CMSIS '__disable_irq()' function
unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
// LPC_RGU->RESET_CTRL0 @ 0x40053100
// LPC_RGU->RESET_CTRL1 @ 0x40053104
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
// Write to LPC_RGU->RESET_CTRL0
*(RESET_CONTROL+0) = 0x10DF0000;
// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
// USB1_RST|USB0_RST|LCD_RST
// Write to LPC_RGU->RESET_CTRL1
*(RESET_CONTROL+1) = 0x00DFF7FF;
// CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
// Clear all pending interrupts in the NVIC
volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
unsigned int irqpendloop;
for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
*(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
}
// Reenable interrupts
__asm volatile ("cpsie i");
// equivalent to CMSIS '__enable_irq()' function
#endif // ifndef DONT_RESET_ON_RESTART
// *************************************************************
#if defined (__USE_LPCOPEN)
SystemInit();
#endif
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
// ******************************
// Check to see if we are running the code from a non-zero
// address (eg RAM, external flash), in which case we need
// to modify the VTOR register to tell the CPU that the
// vector table is located at a non-0x0 address.
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
// CMSIS : SCB->VTOR = <address of vector table>
*pSCB_VTOR = (unsigned int)g_pfnVectors;
}
#if defined (__USE_CMSIS)
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void MemManage_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void BusFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void UsageFault_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void DebugMon_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void) {
while (1) {
}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void) {
while (1) {
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void) {
while (1) {
}
}

45
hw/bsp/ngx4330/board.mk Normal file
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CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-nostdlib \
-DCORE_M4 \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX \
-D__USE_LPCOPEN
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc43xx/lpc_chip_43xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/ngx4330.ld
# TODO remove later
SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
SRC_C += \
$(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \
$(MCU_DIR)/src/chip_18xx_43xx.c \
$(MCU_DIR)/src/clock_18xx_43xx.c \
$(MCU_DIR)/src/gpio_18xx_43xx.c \
$(MCU_DIR)/src/sysinit_18xx_43xx.c \
$(MCU_DIR)/src/uart_18xx_43xx.c
INC += \
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_43xx
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc18_43
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4
# For flash-jlink target
JLINK_DEVICE = LPC4330
JLINK_IF = swd
# flash using jlink
flash: flash-jlink

263
hw/bsp/ngx4330/ngx4330.c Normal file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "chip.h"
#include "../board.h"
#define LED_PORT 1
#define LED_PIN 12
#define LED_STATE_ON 0
#define BUTTON_PORT 0
#define BUTTON_PIN 7
#define BUTTON_STATE_ACTIVE 0
#define BOARD_UART_PORT LPC_USART0
#define BOARD_UART_PIN_PORT 0x0f
#define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD
#define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD
/*------------------------------------------------------------------*/
/* BOARD API
*------------------------------------------------------------------*/
/* System configuration variables used by chip driver */
const uint32_t OscRateIn = 12000000;
const uint32_t ExtRateIn = 0;
static const PINMUX_GRP_T pinmuxing[] =
{
// LED P2.12 as GPIO 1.12
{2, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_PULLDOWN | SCU_MODE_FUNC0)},
// Button P2.7 as GPIO 0.7
{2, 7, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)},
// USB
{2, 6, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC4)}, // USB1_PWR_EN
{2, 5, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2)}, // USB1_VBUS
{1, 7, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC4)}, // USB0_PWRN_EN
// SPIFI
{3, 3, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI CLK */
{3, 4, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D3 */
{3, 5, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D2 */
{3, 6, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D1 */
{3, 7, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D0 */
{3, 8, (SCU_PINIO_FAST | SCU_MODE_FUNC3)} /* SPIFI CS/SSEL */
};
// Invoked by startup code
extern void (* const g_pfnVectors[])(void);
void SystemInit(void)
{
// Remap isr vector
*((uint32_t *) 0xE000ED08) = (uint32_t) &g_pfnVectors;
// Set up pinmux
Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
//------------- Set up clock -------------//
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IRC, true, false); // change SPIFI to IRC during clock programming
LPC_SPIFI->CTRL |= SPIFI_CTRL_FBCLK(1); // and set FBCLK in SPIFI controller
Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);
/* Reset and enable 32Khz oscillator */
LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2));
LPC_CREG->CREG0 |= (1 << 1) | (1 << 0);
/* Setup a divider E for main PLL clock switch SPIFI clock to that divider.
Divide rate is based on CPU speed and speed of SPI FLASH part. */
#if (MAX_CLOCK_FREQ > 180000000)
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 5);
#else
Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 4);
#endif
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);
/* Setup system base clocks and initial states. This won't enable and
disable individual clocks, but sets up the base clock sources for
each individual peripheral clock. */
Chip_Clock_SetBaseClock(CLK_BASE_USB1, CLKIN_IDIVD, true, true);
}
void board_init(void)
{
SystemCoreClockUpdate();
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
#endif
Chip_GPIO_Init(LPC_GPIO_PORT);
// LED
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN);
// Button
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
#if 0
//------------- UART -------------//
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1);
scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1);
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Clock_Speed = 0;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
#endif
//------------- USB -------------//
enum {
USBMODE_DEVICE = 2,
USBMODE_HOST = 3
};
enum {
USBMODE_VBUS_LOW = 0,
USBMODE_VBUS_HIGH = 1
};
/* USB0
* For USB Device operation; insert jumpers in position 1-2 in JP17/JP18/JP19. GPIO28 controls USB
* connect functionality and LED32 lights when the USB Device is connected. SJ4 has pads 1-2 shorted
* by default. LED33 is controlled by GPIO27 and signals USB-up state. GPIO54 is used for VBUS
* sensing.
* For USB Host operation; insert jumpers in position 2-3 in JP17/JP18/JP19. USB Host power is
* controlled via distribution switch U20 (found in schematic page 11). Signal GPIO26 is active low and
* enables +5V on VBUS2. LED35 light whenever +5V is present on VBUS2. GPIO55 is connected to
* status feedback from the distribution switch. GPIO54 is used for VBUS sensing. 15Kohm pull-down
* resistors are always active
*/
#if CFG_TUSB_RHPORT0_MODE
Chip_USB0_Init();
// Reset controller
LPC_USB0->USBCMD_D |= 0x02;
while( LPC_USB0->USBCMD_D & 0x02 ) {}
// Set mode
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5);
LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging
#else // TODO OTG
LPC_USB0->USBMODE_D = USBMODE_DEVICE;
LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/;
#endif
#endif
/* USB1
* When USB channel #1 is used as USB Host, 15Kohm pull-down resistors are needed on the USB data
* signals. These are activated inside the USB OTG chip (U31), and this has to be done via the I2C
* interface of GPIO52/GPIO53.
* J20 is the connector to use when USB Host is used. In order to provide +5V to the external USB
* device connected to this connector (J20), channel A of U20 must be enabled. It is enabled by default
* since SJ5 is normally connected between pin 1-2. LED34 lights green when +5V is available on J20.
* JP15 shall not be inserted. JP16 has no effect
*
* When USB channel #1 is used as USB Device, a 1.5Kohm pull-up resistor is needed on the USB DP
* data signal. There are two methods to create this. JP15 is inserted and the pull-up resistor is always
* enabled. Alternatively, the pull-up resistor is activated inside the USB OTG chip (U31), and this has to
* be done via the I2C interface of GPIO52/GPIO53. In the latter case, JP15 shall not be inserted.
* J19 is the connector to use when USB Device is used. Normally it should be a USB-B connector for
* creating a USB Device interface, but the mini-AB connector can also be used in this case. The status
* of VBUS can be read via U31.
* JP16 shall not be inserted.
*/
#if CFG_TUSB_RHPORT1_MODE
Chip_USB1_Init();
// Reset controller
LPC_USB1->USBCMD_D |= 0x02;
while( LPC_USB1->USBCMD_D & 0x02 ) {}
// Set mode
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST
LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB1->USBMODE_D = USBMODE_DEVICE;
#endif
// USB1 as fullspeed
LPC_USB1->PORTSC1_D |= (1<<24);
// Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */
// Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
}
uint32_t board_button_read(void)
{
return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

343
hw/bsp/ngx4330/ngx4330.ld Normal file
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/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2019
* Generated linker script file for LPC4330
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.23
* MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Sep 9, 2019 12:09:49 PM
*/
MEMORY
{
/* Define each memory region */
RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */
RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */
RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */
}
/* Define a symbol for the top of each memory region */
__base_RamLoc128 = 0x10000000 ; /* RamLoc128 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */
__top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */
__base_RamLoc72 = 0x10080000 ; /* RamLoc72 */
__base_RAM2 = 0x10080000 ; /* RAM2 */
__top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */
__top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */
__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
__base_RAM3 = 0x20000000 ; /* RAM3 */
__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
__base_RAM4 = 0x20008000 ; /* RAM4 */
__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
__base_RAM5 = 0x2000c000 ; /* RAM5 */
__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
__base_SPIFI = 0x14000000 ; /* SPIFI */
__base_Flash = 0x14000000 ; /* Flash */
__top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */
__top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4));
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5));
LONG( SIZEOF(.data_RAM5));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} > SPIFI
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > SPIFI
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > SPIFI
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > SPIFI
__exidx_end = .;
_etext = .;
/* DATA section for RamLoc72 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamLoc72)
*(.data.$RAM2)
*(.data.$RamLoc72)
*(.data.$RAM2.*)
*(.data.$RamLoc72.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > RamLoc72 AT>SPIFI
/* DATA section for RamAHB32 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$RamAHB32)
*(.data.$RAM3)
*(.data.$RamAHB32)
*(.data.$RAM3.*)
*(.data.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
} > RamAHB32 AT>SPIFI
/* DATA section for RamAHB16 */
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM4 = .) ;
*(.ramfunc.$RAM4)
*(.ramfunc.$RamAHB16)
*(.data.$RAM4)
*(.data.$RamAHB16)
*(.data.$RAM4.*)
*(.data.$RamAHB16.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM4 = .) ;
} > RamAHB16 AT>SPIFI
/* DATA section for RamAHB_ETB16 */
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM5 = .) ;
*(.ramfunc.$RAM5)
*(.ramfunc.$RamAHB_ETB16)
*(.data.$RAM5)
*(.data.$RamAHB_ETB16)
*(.data.$RAM5.*)
*(.data.$RamAHB_ETB16.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM5 = .) ;
} > RamAHB_ETB16 AT>SPIFI
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) :
{
. = ALIGN(4) ;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc128
/* Main DATA section (RamLoc128) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > RamLoc128 AT>SPIFI
/* BSS section for RamLoc72 */
.bss_RAM2 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2)
*(.bss.$RamLoc72)
*(.bss.$RAM2.*)
*(.bss.$RamLoc72.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
} > RamLoc72
/* BSS section for RamAHB32 */
.bss_RAM3 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM3 = .) ;
*(.bss.$RAM3)
*(.bss.$RamAHB32)
*(.bss.$RAM3.*)
*(.bss.$RamAHB32.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
} > RamAHB32
/* BSS section for RamAHB16 */
.bss_RAM4 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM4 = .) ;
*(.bss.$RAM4)
*(.bss.$RamAHB16)
*(.bss.$RAM4.*)
*(.bss.$RamAHB16.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM4 = .) ;
} > RamAHB16
/* BSS section for RamAHB_ETB16 */
.bss_RAM5 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM5 = .) ;
*(.bss.$RAM5)
*(.bss.$RamAHB_ETB16)
*(.bss.$RAM5.*)
*(.bss.$RamAHB_ETB16.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM5 = .) ;
} > RamAHB_ETB16
/* MAIN BSS SECTION */
.bss :
{
. = ALIGN(4) ;
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc128
/* NOINIT section for RamLoc72 */
.noinit_RAM2 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM2)
*(.noinit.$RamLoc72)
*(.noinit.$RAM2.*)
*(.noinit.$RamLoc72.*)
. = ALIGN(4) ;
} > RamLoc72
/* NOINIT section for RamAHB32 */
.noinit_RAM3 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM3)
*(.noinit.$RamAHB32)
*(.noinit.$RAM3.*)
*(.noinit.$RamAHB32.*)
. = ALIGN(4) ;
} > RamAHB32
/* NOINIT section for RamAHB16 */
.noinit_RAM4 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM4)
*(.noinit.$RamAHB16)
*(.noinit.$RAM4.*)
*(.noinit.$RamAHB16.*)
. = ALIGN(4) ;
} > RamAHB16
/* NOINIT section for RamAHB_ETB16 */
.noinit_RAM5 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM5)
*(.noinit.$RamAHB_ETB16)
*(.noinit.$RAM5.*)
*(.noinit.$RamAHB_ETB16.*)
. = ALIGN(4) ;
} > RamAHB_ETB16
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD):
{
. = ALIGN(4) ;
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc128
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc128 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

0
hw/bsp/stm32h743nucleo/board_stm32h743nucleo.c → hw/bsp/stm32h743nucleo/stm32h743nucleo.c
View File

2
hw/mcu/nxp/lpc_driver

@ -1 +1 @@
Subproject commit 83dc833bfb0972b1df1bbf271f3a9e574d5f2876
Subproject commit 7d2ca4123ec4fe04c6ea0aa2662d7a6aebc0c4f7

2
hw/mcu/st/st_driver

@ -1 +1 @@
Subproject commit 4279a02b87d3b327f058b5d6b53132e5dcc0cf17
Subproject commit 3fc2e0f3db155b33177bb0705e0dd65cadb58412

2
src/class/cdc/cdc_device.h
View File

@ -135,7 +135,7 @@ static inline uint8_t tud_cdc_get_line_state (void)
static inline void tud_cdc_get_line_coding (cdc_line_coding_t* coding)
{
return tud_cdc_n_get_line_coding(0, coding);
tud_cdc_n_get_line_coding(0, coding);
}
static inline void tud_cdc_set_wanted_char (char wanted)