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https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
fix build with rx
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parent
1eefc2b3ef
commit
c53acb1455
@ -36,12 +36,6 @@
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#include "device/dcd.h"
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#include "device/dcd.h"
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#include "rusb2_type.h"
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#include "rusb2_type.h"
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#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
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// fallback
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#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
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#define CFG_TUSB_RHPORT1_MODE 0
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#endif
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#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
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#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
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#include "rusb2_rx.h"
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#include "rusb2_rx.h"
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#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
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#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
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@ -86,7 +80,7 @@ typedef union TU_ATTR_PACKED {
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volatile uint8_t reserved8;
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volatile uint8_t reserved8;
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};
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};
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volatile uint16_t u16;
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volatile uint16_t u16;
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} hw_fifo_t;
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} hw_fifo16_t;
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typedef union TU_ATTR_PACKED {
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typedef union TU_ATTR_PACKED {
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struct {
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struct {
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@ -140,9 +134,11 @@ static dcd_data_t _dcd;
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// INTERNAL OBJECT & FUNCTION DECLARATION
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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TU_ATTR_ALWAYS_INLINE static inline bool is_highspeed(uint8_t rhport) {
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#ifdef RUSB2_SUPPORT_HIGHSPEED
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return rhport == 1;
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#define is_highspeed_usbip(_p) (_p == 1)
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}
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#else
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#define is_highspeed_usbip(_p) (false)
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#endif
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static unsigned find_pipe(unsigned xfer)
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static unsigned find_pipe(unsigned xfer)
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{
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{
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@ -229,14 +225,17 @@ static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
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volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
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#else
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#else
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volatile hw_fifo_t *reg = (volatile hw_fifo_t*) fifo;
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volatile hw_fifo16_t *reg = (volatile hw_fifo16_t*) fifo;
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#endif
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#endif
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uintptr_t addr = (uintptr_t)buf;
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uintptr_t addr = (uintptr_t)buf;
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while (len >= 2) {
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while (len >= 2) {
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reg->u16 = *(const uint16_t *)addr;
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reg->u16 = *(const uint16_t *)addr;
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addr += 2;
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addr += 2;
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len -= 2;
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len -= 2;
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}
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}
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if (len > 0) {
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if (len > 0) {
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reg->u8 = *(const uint8_t *)addr;
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reg->u8 = *(const uint8_t *)addr;
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++addr;
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++addr;
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@ -260,11 +259,14 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
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/* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
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/* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
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/* IN */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
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/* IN */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
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};
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};
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tu_fifo_buffer_info_t info;
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tu_fifo_buffer_info_t info;
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ops[dir].tu_fifo_get_info(f, &info);
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ops[dir].tu_fifo_get_info(f, &info);
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unsigned total_len = len;
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unsigned total_len = len;
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len = TU_MIN(total_len, info.len_lin);
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len = TU_MIN(total_len, info.len_lin);
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ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
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ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
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unsigned rem = total_len - len;
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unsigned rem = total_len - len;
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if (rem) {
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if (rem) {
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len = TU_MIN(rem, info.len_wrap);
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len = TU_MIN(rem, info.len_wrap);
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@ -689,7 +691,8 @@ void dcd_init(uint8_t rhport)
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rusb2_module_start(rhport, true);
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rusb2_module_start(rhport, true);
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if ( is_highspeed(rhport) ) {
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#ifdef RUSB2_SUPPORT_HIGHSPEED
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if ( is_highspeed_usbip(rhport) ) {
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rusb->SYSCFG_b.HSE = 1;
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rusb->SYSCFG_b.HSE = 1;
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// leave CLKSEL as default (0x11) 24Mhz
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// leave CLKSEL as default (0x11) 24Mhz
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@ -715,7 +718,9 @@ void dcd_init(uint8_t rhport)
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rusb->CFIFOSEL_b.MBW = 1;
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rusb->CFIFOSEL_b.MBW = 1;
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rusb->D0FIFOSEL_b.MBW = 1;
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rusb->D0FIFOSEL_b.MBW = 1;
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rusb->D1FIFOSEL_b.MBW = 1;
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rusb->D1FIFOSEL_b.MBW = 1;
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} else {
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} else
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#endif
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{
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rusb->SYSCFG_b.SCKE = 1;
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rusb->SYSCFG_b.SCKE = 1;
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while (!rusb->SYSCFG_b.SCKE) {}
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while (!rusb->SYSCFG_b.SCKE) {}
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rusb->SYSCFG_b.DRPD = 0;
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rusb->SYSCFG_b.DRPD = 0;
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@ -772,7 +777,7 @@ void dcd_connect(uint8_t rhport)
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{
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{
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rusb2_reg_t* rusb = RUSB2_REG(rhport);
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rusb2_reg_t* rusb = RUSB2_REG(rhport);
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if ( is_highspeed(rhport)) {
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if ( is_highspeed_usbip(rhport)) {
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rusb->SYSCFG_b.CNEN = 1;
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rusb->SYSCFG_b.CNEN = 1;
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}
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}
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rusb->SYSCFG_b.DPRPU = 1;
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rusb->SYSCFG_b.DPRPU = 1;
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@ -809,7 +814,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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if (xfer == TUSB_XFER_ISOCHRONOUS) {
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if (xfer == TUSB_XFER_ISOCHRONOUS) {
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// Fullspeed ISO is limit to 256 bytes
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// Fullspeed ISO is limit to 256 bytes
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if ( !is_highspeed(rhport) && mps > 256) {
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if ( !is_highspeed_usbip(rhport) && mps > 256) {
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return false;
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return false;
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}
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}
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}
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}
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@ -823,7 +828,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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/* setup pipe */
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/* setup pipe */
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dcd_int_disable(rhport);
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dcd_int_disable(rhport);
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if ( is_highspeed(rhport) ) {
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if ( is_highspeed_usbip(rhport) ) {
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// FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
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// FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
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// depending on the allocation scheme
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// depending on the allocation scheme
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rusb->PIPEBUF = 0x7C08;
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rusb->PIPEBUF = 0x7C08;
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@ -62,7 +62,7 @@ typedef struct {
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}rusb2_controller_t;
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}rusb2_controller_t;
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#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
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#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
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#define RUSB2_HAS_HIGHSPEED
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#define RUSB2_SUPPORT_HIGHSPEED
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#define RUSB2_CONTROLLER_COUNT 2
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#define RUSB2_CONTROLLER_COUNT 2
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#else
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#else
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#define RUSB2_CONTROLLER_COUNT 1
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#define RUSB2_CONTROLLER_COUNT 1
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@ -71,7 +71,7 @@ typedef struct {
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// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
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// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
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static rusb2_controller_t rusb2_controller[] = {
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static rusb2_controller_t rusb2_controller[] = {
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{ .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
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{ .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
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#ifdef RUSB2_HAS_HIGHSPEED
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#ifdef RUSB2_SUPPORT_HIGHSPEED
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{ .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
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{ .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
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#endif
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#endif
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};
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};
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@ -37,7 +37,10 @@ extern "C" {
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#define RUSB2_REG_BASE (0x000A0000)
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#define RUSB2_REG_BASE (0x000A0000)
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#define RUSB2_REG(_p) ((rusb2_reg_t *) RUSB2_REG_BASE)
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TU_ATTR_ALWAYS_INLINE static inline rusb2_reg_t* RUSB2_REG(uint8_t rhport) {
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(void) rhport;
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return (rusb2_reg_t *) RUSB2_REG_BASE;
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}
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// Start/Stop MSTP TODO implement later
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// Start/Stop MSTP TODO implement later
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TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
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TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
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