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https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
clean up ohci, remove obsolete api
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hathach
parent
04797bc5a5
commit
da8000d42d
@ -27,7 +27,7 @@
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#include <common/tusb_common.h>
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#if TUSB_OPT_HOST_ENABLED && \
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(CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
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(CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
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//--------------------------------------------------------------------+
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// INCLUDE
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@ -244,7 +244,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// CONTROL PIPE API
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// List Helper
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//--------------------------------------------------------------------+
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static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed)
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{
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@ -310,57 +310,6 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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return true;
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}
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// TODO move around
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static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr);
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static ohci_gtd_t * gtd_find_free(void);
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static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd);
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
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{
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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// FIXME control only for now
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if ( epnum == 0 )
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{
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ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed;
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ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd;
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gtd_init(p_data, buffer, buflen);
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p_data->index = dev_addr;
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p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT;
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p_data->data_toggle = TU_BIN8(11); // DATA1
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p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
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p_ed->td_head.address = (uint32_t) p_data;
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OHCI_REG->command_status_bit.control_list_filled = 1;
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}else
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{
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ohci_ed_t * p_ed = ed_from_addr(dev_addr, ep_addr);
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ohci_gtd_t* p_gtd = gtd_find_free();
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TU_ASSERT(p_gtd);
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gtd_init(p_gtd, buffer, buflen);
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p_gtd->index = p_ed-ohci_data.ed_pool;
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p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
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td_insert_to_ed(p_ed, p_gtd);
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tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) );
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if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1;
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}
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return true;
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}
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//--------------------------------------------------------------------+
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// BULK/INT/ISO PIPE API
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//--------------------------------------------------------------------+
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static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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{
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if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed;
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@ -420,6 +369,33 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
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}
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}
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static ohci_gtd_t * gtd_find_free(void)
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{
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for(uint8_t i=0; i < HCD_MAX_XFER; i++)
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{
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if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i];
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}
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return NULL;
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}
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static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd)
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{
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// tail is always NULL
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if ( tu_align16(p_ed->td_head.address) == 0 )
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{ // TD queue is empty --> head = TD
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p_ed->td_head.address |= (uint32_t) p_gtd;
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}
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else
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{ // TODO currently only support queue up to 2 TD each endpoint at a time
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((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd;
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}
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}
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//--------------------------------------------------------------------+
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// Endpoint API
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//--------------------------------------------------------------------+
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bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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{
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(void) rhport;
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@ -454,63 +430,46 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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return true;
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}
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static ohci_gtd_t * gtd_find_free(void)
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
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{
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for(uint8_t i=0; i < HCD_MAX_XFER; i++)
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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// FIXME control only for now
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if ( epnum == 0 )
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{
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if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i];
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ohci_ed_t* ed = &ohci_data.control[dev_addr].ed;
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ohci_gtd_t* gtd = &ohci_data.control[dev_addr].gtd;
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gtd_init(gtd, buffer, buflen);
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gtd->index = dev_addr;
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gtd->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT;
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gtd->data_toggle = 3; // Both Data and Ack stage start with DATA1
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gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
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ed->td_head.address = (uint32_t) gtd;
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OHCI_REG->command_status_bit.control_list_filled = 1;
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}else
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{
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ohci_ed_t * ed = ed_from_addr(dev_addr, ep_addr);
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ohci_gtd_t* gtd = gtd_find_free();
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TU_ASSERT(gtd);
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gtd_init(gtd, buffer, buflen);
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gtd->index = ed-ohci_data.ed_pool;
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gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
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td_insert_to_ed(ed, gtd);
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tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) );
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if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1;
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}
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return NULL;
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}
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static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd)
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{
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// tail is always NULL
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if ( tu_align16(p_ed->td_head.address) == 0 )
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{ // TD queue is empty --> head = TD
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p_ed->td_head.address |= (uint32_t) p_gtd;
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}
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else
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{ // TODO currently only support queue up to 2 TD each endpoint at a time
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((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd;
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}
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}
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static bool pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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ohci_ed_t* const p_ed = ed_from_addr(dev_addr, ep_addr);
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// not support ISO yet
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TU_VERIFY ( !p_ed->is_iso );
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ohci_gtd_t * const p_gtd = gtd_find_free();
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TU_ASSERT(p_gtd); // not enough gtd
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gtd_init(p_gtd, buffer, total_bytes);
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p_gtd->index = p_ed-ohci_data.ed_pool;
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if ( int_on_complete ) p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
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td_insert_to_ed(p_ed, p_gtd);
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return true;
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}
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bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes)
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{
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return pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, false);
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}
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bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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(void) int_on_complete;
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TU_ASSERT( pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, true) );
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tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) );
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if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1;
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return true;
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}
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