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https://github.com/hathach/tinyusb.git
synced 2025-01-31 05:52:55 +08:00
update f4 to build with iar
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f4c3f0800d
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F405xx
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LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f405rg
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F405xx
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LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f405rg
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F401xC
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LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f401cc
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@ -1,8 +1,13 @@
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CFLAGS += -DSTM32F407xx
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LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
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# For flash-jlink target
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JLINK_DEVICE = stm32f407vg
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F411xE
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LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f411ce
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F411xE
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LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f411ve
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F412Zx
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LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f412zg
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F412Zx
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LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f412zg
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@ -1,8 +1,12 @@
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CFLAGS += -DSTM32F439xx
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LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32f439zi
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@ -150,7 +150,8 @@ void board_init(void)
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void board_led_write(bool state)
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{
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
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GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
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}
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uint32_t board_button_read(void)
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@ -190,7 +191,7 @@ uint32_t board_millis(void)
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void HardFault_Handler (void)
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{
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asm("bkpt");
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__asm("BKPT #0\n");
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}
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// Required by __libc_init_array in startup code if we are compiling using
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@ -7,18 +7,28 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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include $(TOP)/$(BOARD_PATH)/board.mk
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# --------------
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# Compiler Flags
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# --------------
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CFLAGS += \
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-DCFG_TUSB_MCU=OPT_MCU_STM32F4
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# GCC Flags
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GCC_CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m4 \
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-mfloat-abi=hard \
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-mfpu=fpv4-sp-d16 \
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-nostdlib -nostartfiles \
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-DCFG_TUSB_MCU=OPT_MCU_STM32F4
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-nostdlib -nostartfiles
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# suppress warning caused by vendor mcu driver
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CFLAGS += -Wno-error=cast-align
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GCC_CFLAGS += -Wno-error=cast-align
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# IAR Flags
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IAR_CFLAGS += --cpu cortex-m4
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IAR_ASFLAGS += --cpu cortex-m4
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SRC_C += \
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src/portable/synopsys/dwc2/dcd_dwc2.c \
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