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https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
use weak local for dcache function to skip if()
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@ -164,6 +164,25 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
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static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
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static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer);
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TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
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(void) addr;
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(void) data_size;
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}
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// invalidate data cache: mark cache as invalid, next read will read from memory
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// Required BOTH before and after an DMA RX transfer
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TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
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(void) addr;
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(void) data_size;
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}
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// clean and invalidate data cache
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// Required before an DMA transfer where memory is both read/write by DMA
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TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
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(void) addr;
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(void) data_size;
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}
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//--------------------------------------------------------------------+
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// HCD API
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//--------------------------------------------------------------------+
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@ -342,9 +361,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
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regs->periodic_list_base = (uint32_t) framelist;
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if(hcd_dcache_clean) {
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hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
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}
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hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
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//------------- TT Control (NXP only) -------------//
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regs->nxp_tt_control = 0;
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@ -429,10 +446,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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// TODO might need to disable async/period list
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list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
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if(hcd_dcache_clean) {
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hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
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hcd_dcache_clean(list_head, sizeof(ehci_link_t));
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}
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hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
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hcd_dcache_clean(list_head, sizeof(ehci_link_t));
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return true;
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}
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@ -447,10 +462,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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qtd_init(td, setup_packet, 8);
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td->pid = EHCI_PID_SETUP;
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if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
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hcd_dcache_clean((void *) setup_packet, 8);
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hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
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}
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hcd_dcache_clean((void *) setup_packet, 8);
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hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
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// sw region
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qhd->p_qtd_list_head = td;
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@ -459,9 +472,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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// attach TD
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qhd->qtd_overlay.next.address = (uint32_t) td;
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if (hcd_dcache_clean_invalidate) {
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hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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}
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hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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return true;
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}
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@ -496,15 +507,13 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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qtd->pid = qhd->pid;
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}
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if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
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// IN transfer: invalidate buffer, OUT transfer: clean buffer
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if (dir) {
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hcd_dcache_invalidate(buffer, buflen);
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}else {
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hcd_dcache_clean(buffer, buflen);
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}
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hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
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// IN transfer: invalidate buffer, OUT transfer: clean buffer
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if (dir) {
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hcd_dcache_invalidate(buffer, buflen);
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}else {
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hcd_dcache_clean(buffer, buflen);
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}
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hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
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// Software: assign TD to QHD
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qhd->p_qtd_list_head = qtd;
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@ -513,9 +522,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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// attach TD to QHD start transferring
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qhd->qtd_overlay.next.address = (uint32_t) qtd;
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if (hcd_dcache_clean_invalidate) {
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hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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}
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hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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return true;
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}
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@ -570,9 +577,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
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{
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ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
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if (hcd_dcache_invalidate) {
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hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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}
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hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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bool const is_ioc = (qtd->int_on_complete != 0);
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uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
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@ -596,9 +601,7 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
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ehci_qhd_t *p_qhd = async_head;
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do
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{
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if (hcd_dcache_invalidate) {
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hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
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}
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hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
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// halted or error is processed in error isr
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if ( !p_qhd->qtd_overlay.halted ) {
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