6 Commits

Author	SHA1	Message	Date
hathach	0e06c4cfdf	clang u5, also bump up cmsis u5 version	2024-04-24 00:03:13 +07:00
hathach	6ab7875aab	uart working on u5a5	2023-10-31 11:39:20 +07:00
hathach	db3ff4b352	usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL set	2023-10-31 11:26:31 +07:00
hathach	a4c542a7b4	addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to get passed otg clock reset	2023-10-30 22:21:58 +07:00
hathach	27a2c8cba4	adding nulceo stm32u5a5, fix clock configure issue ... dwc2 core stuck at reset	2023-10-18 18:43:07 +07:00
hathach	5025e80c9e	adding u5a5 nucleo	2023-10-18 15:27:06 +07:00