Implemented a special copy strategy to copy directly from the FIFO. This
function, however, is untested and should be regarded as unreliable
until somebody was able to test it
Some ST parts (like STM32F74xxx / STM32F75xxx) allow the USB_OTG_HS core to be used with
either an external high-speed ULPI PHY or an internal full-speed-only (12mbps) PHY. Currently
the code assumes than an ULPI PHY is used unless the chip has an internal high-speed PHY
(`#if defined(USB_HS_PHYC)`), with no provision to use the internal FS PHY.
Current implementation always sets odd/even bit for ISO transactions.
This is a good strategy only if interval is 1.
For ISO endpoint interval in (micro)frames is computed as
2^(interval-1), which means that odd/frame number should stay
same for interval values > 1.
With this change only when interval is 1 odd/even bit is modified.
dcd_edpt_close() no longer modifies FIFO distribution.
Code that that was commented out is removed along with
variables that are no longer used.
FIFO distribution among endpoints is handled upfront
and does not need to be modified in open and close endpoint
functions.
Recommended FIFO allocation schema includes 2 maximum endpoint sizes.
Comment suggested that this is the case while it would work according
to this description only in checked endpoints were ascending sizes.
Also two same size endpoints would be counted as one.
That is fixed by way sz is filled.
Calculation used too much modulo operation while single division was enough
to account for odd FIFO sizes.
Extra space that is evenly distributed between Bulk and control endpoints
was incorrectly calculated it could prevent allocation of ISO endpoint FIFO
when bulk endpoints existed with smaller endpoint numbers.
Minimum endpoint FIFO size is 16 32bit words, FIFO space requirement is
now observed.
Endpoint close was implemented only in one driver so far.
This function is needed for interfaces with several alternate settings.
The way FIFO is allocated in dcd_edpt_open() allows to correctly close
only one IN endpoint (the one that was opened last).
Wrong FIFO was flushed in dcd_edpt_stall().
(epnum - 1) should only be used when accessing DIEPTXF registers.
For DIEPCTL and GRSTCTL epnum is correct index.
For ISO endpoint driver has to specify when data
is to be transmitted (odd or even frame).
Currently code was not updating this bit resulting in
data being sent every other frame.
If interval was 1ms full data packed was sent every 2ms, and
ZLP was sent in between.
