4867 Commits

Author SHA1 Message Date
hathach
37d9f940ee add gd32vf103 to riscv ci 2021-08-15 17:21:31 +07:00
hathach
09e4348adc move gd32vf103 to its own family 2021-08-15 17:19:25 +07:00
Stefan Kerkmann
1b6540a61c Update systick reload value
The systick timer is driven by the AHB bus divided by 4, set the correct
reload value to generate a timer irq every ms.
2021-08-09 21:37:06 +02:00
Stefan Kerkmann
27f147f421 Minor style changes 2021-08-07 14:08:18 +02:00
Stefan Kerkmann
8b78067cc1 Use linear buffer for GD32VF103
As the peripheral is the same as on the STM32F1 and STM32F4 lines we do the same.
2021-08-07 12:06:54 +02:00
Stefan Kerkmann
4cebde65ec Remove unnecessary define guard
The GD32VF103 family only has USB-OTG peripherals.
2021-08-07 12:00:13 +02:00
Stefan Kerkmann
0399996ee5 Code style changes 2021-08-07 11:33:36 +02:00
Stefan Kerkmann
66d566f8c0 Use functions provided by the nuclei-sdk hal 2021-08-07 11:33:36 +02:00
Stefan Kerkmann
60d03110f7 Correctly initialize and handle the system tick
Forgot to reload the systick timer in the irq handler
2021-08-07 11:33:36 +02:00
Stefan Kerkmann
1d2a57a9e1 Remove unsuitable clock configurations from init code
Only 48MHz, 72MHz, 96MHz and 120 MHz system clocks derived from an
external crystal are suitable for the usb peripheral, as the internal
oscillator is not stable enough. Also the usb-prescaler only supports
division by 1 (48MHZ), 1.5(72MHz), 2(96MHz) and 2.5(120Mhz).
120Mhz is also out of spec and not added here.
2021-08-07 11:33:36 +02:00
Stefan Kerkmann
733a362436 Use nuclei-sdk functions for init code
Instead of using the HAL functions we can just use the defines from the
board support for the longan nano that comes with the nuclei-sdk. Also
we move some includes and defines to the header file.
2021-08-07 11:32:06 +02:00
Stefan Kerkmann
6e287a7c5e Cleanup include paths and use linker files from nuclei-sdk 2021-08-07 09:51:56 +02:00
Stefan Kerkmann
b473923f42 Remove redundant linker files
We use the linker files provided by nuclei-sdk instead
2021-08-07 09:51:16 +02:00
Stefan Kerkmann
7682829820 Add correct endpoint count for GD32VF103
This controller family only supports USB FS with four endpoints
2021-08-07 09:01:01 +02:00
Stefan Kerkmann
c6d495d643 Remove dependencies to external libraries for the dcd driver
The core of tinyusb must be as independent as possible, we previously
relied on nuclei-sdk or the GD32VF103 firmware library for the synopsys
driver to work with the GD32VF103. Fortunatly we needed very few parts
from them so we implement them here.
2021-08-07 08:55:25 +02:00
Stefan Kerkmann
3eb54d878a Add stm32 license header 2021-08-03 20:21:06 +02:00
Stefan Kerkmann
ab1979e2d3 Revert "Disable -Werror for now"
This reverts commit 5e0c2e122300e7a6289b3bd08044f9cf1dbdef05.
2021-08-03 20:01:10 +02:00
Stefan Kerkmann
e5bd6bdeff Update nuclei-sdk with __riscv_flen fix 2021-08-03 20:01:10 +02:00
Stefan Kerkmann
790d90bf26 Set FreeRTOS to RISC-V (doesn't compile) 2021-08-03 20:01:10 +02:00
Stefan Kerkmann
23e3b1680b Use JTAG for jlink flashing 2021-08-03 20:01:10 +02:00
Stefan Kerkmann
3db2089aa9 Minor clean ups 2021-08-03 20:00:39 +02:00
Stefan Kerkmann
771bbe8af7 Use https github as submodule 2021-08-03 20:00:39 +02:00
Stefan Kerkmann
ddb83787a0 Disable -Werror for now
Without having __riscv_flen defined we get multiple warinings. But
defining it causes the startup code to contain floating point instructions.
This results in a exception right after booting.

See startup_gd32vf103.S lines 289-294 should open a PR at nuclei sdk
2021-08-03 20:00:39 +02:00
Stefan Kerkmann
19b971cb24 Add board support for gd32vf103 longan nano 2021-08-03 20:00:39 +02:00
Stefan Kerkmann
2657560b63 Add hacky GD32VF103 support 2021-08-03 20:00:35 +02:00
Ha Thach
af8e5a90f4
Merge pull request #991 from hathach/fix-midi-available
correct midi available with already stream read
2021-08-02 19:25:24 +07:00
hathach
794bbd7177 fix warning 2021-08-02 18:58:27 +07:00
hathach
98e4ba6a12 correct midi available with already stream read 2021-08-02 18:55:12 +07:00
Ha Thach
8a48e994b6
Merge pull request #874 from kkitayam/add_xfer_fifo_for_rx63
Add dcd_edpt_xfer_fifo() for RX63N
2021-08-02 17:12:20 +07:00
kkitayam
45e55a8ea0 fix: D0FIFOSEL setting was incorrectly when big-endian is selected.
In pipe_xfer_in(), the endianness setting of D0FIFOSEL was lacking due to refactoring.
And add type cast operation to avoid warnings by CCRX.
2021-07-31 12:20:19 +09:00
kkitayam
ff20e4d6bc add the entry for RX72N 2021-07-29 20:45:51 +09:00
kkitayam
3c3563288d add RX65N 2021-07-29 20:24:12 +09:00
kkitayam
6b9f8e454e add a condition regarding OPT_MCU_RX63N 2021-07-29 20:24:12 +09:00
kkitayam
e7c9cf4aea Change the accessing method of TU_FIFO from read/write_n_const_addr_full_words to get_write/read_info and advance_write/read_pointer pairs. 2021-07-29 20:24:11 +09:00
kkitayam
3f49380b37 added support for dcd_edpt_xfer_fifo 2021-07-29 20:22:33 +09:00
kkitayam
1c2e353193 Refactor and clean up 2021-07-29 20:22:33 +09:00
Ha Thach
c552677a52
Merge pull request #980 from BennyEvans/master
Waveshare OpenH743I-C BSP
2021-07-29 17:12:42 +07:00
Ha Thach
fa00377d93
Merge pull request #859 from Wini-Buh/CCRX_Port
Adaptations for Renesas CCRX toolchain and Rx72N controller performed
2021-07-29 16:13:13 +07:00
Ha Thach
aca24ed481
Merge pull request #982 from HiFiPhile/dfu_warning
Fix IAR warning
2021-07-29 13:50:13 +07:00
MasterPhi
0ba4315ae5 Fix IAR warning 2021-07-27 18:08:52 +02:00
Ben Evans
0953be9d7f Small tidy up for waveshare openh743i BSP. 2021-07-27 12:07:19 +10:00
Ben Evans
d058645f97 Updated docs to add Wavehsare OpenH743I-C to STM32 boards list. 2021-07-27 12:02:13 +10:00
Ben Evans
f01074681a Added BSP for waveshare openh743i. 2021-07-27 11:58:20 +10:00
Ha Thach
b6b5a33806
Merge pull request #976 from hathach/readme
Quick Readme update
2021-07-23 18:15:36 +07:00
HiFiPhile
ef63037f1a
Update README.md
Use SAME7x
2021-07-23 11:21:51 +02:00
HiFiPhile
a9726aad0c
Quick Readme update 2021-07-22 20:39:55 +02:00
hathach
15112fdbba clean up compiler 2021-07-22 22:10:48 +07:00
hathach
8cd23489d5 update endian 2021-07-22 17:49:39 +07:00
hathach
c4da1abb1e rename bit filed order
clean up packed/bit order begin end
2021-07-22 17:30:08 +07:00
hathach
4e50ceba48 rename packed begin/end 2021-07-22 17:07:39 +07:00