hathach
fad088719e
merge CFG_TUSB_RHPORT1_MODE into CFG_TUSB_RHPORT0_MODE
...
each port is 1 byte for easy maintenance
2020-05-26 15:21:23 +07:00
hathach
62a746bdc7
wip
2020-05-26 12:18:36 +07:00
hathach
ba9c774a2a
board test work fine
2020-05-23 13:29:30 +07:00
hathach
4c01099a3d
update makefile to build with ohci host
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update ses project for lpc1769 with rtt
2020-05-22 20:57:52 +07:00
hathach
f308990ab5
Merge branch 'master' into update-host
2020-05-22 15:28:22 +07:00
hathach
58cedf4c06
usb0 host on mcb1800 work with fullspeed mode.
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use usbh_edpt_open() to correctly map ep2drv[]
2020-05-19 00:55:43 +07:00
hathach
550746097b
fix cast-align warning for nuc505
2020-05-18 13:03:41 +07:00
hathach
1a8ce043ed
enable -Wcast-align
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suppress vendor sdk driver at board.mk
2020-05-17 14:24:15 +07:00
Mark Olsson
3c43009278
Add support for stm32f746nucleo board
2020-05-15 10:23:01 +02:00
Jerzy Kasenberg
615369a6eb
stm32l476disco: Fix system clock setup
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Code suggested that PLL with MSI is used resulting in 80MHz clock.
When in fact PLL was not configured and system clock was left at MSI 48MHz.
This happens because PLL configuration requires that SysTick interrupt
has interrupt priority level configured correctly.
As it seems ST code intentionally setups variable uwTickPrio to invalid
value and later when it is not setup by user code configuration
of oscillator will fail before PLL is configured.
This simple changes systick priority to some valid value that
allows clock to use PLL.
2020-05-06 15:13:55 +02:00
Jerzy Kasenberg
d9e534f6f2
stm32l476disco: fix uninitialized filed usage
...
Field PLLState was not initialized in RCC_OscInitStruct.PLL in
function SystemClock_Config().
Value is used in HAL_RCC_OscConfig() regardless of oscillator.
In lucky case value would be 0 RCC_PLL_NONE and nothing would
happen.
If value was incorrect following line would end up in assert:
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
If value was valid but no RCC_PLL_NONE pll could be configured
with some other random values.
Setting PLLState to RCC_PLL_NONE eliminates potential problem.
2020-05-06 14:25:46 +02:00
hathach
905a80d1b2
temporarily remove osal_task_delay() from osal
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- add hcd_uframe_number() API, update EHCI to return uframe number
- get host running on ea4357
2020-05-04 14:11:58 +07:00
hathach
4a3a448340
clean up things, add makefile for host example
2020-05-04 00:29:52 +07:00
hathach
9538ca7d74
add uart for mcb1800
2020-05-03 14:50:12 +07:00
hathach
94fed7db0e
fix esp32 ci adding FREERTOS STATIC to sdkconfig default
2020-04-29 11:31:04 +07:00
hathach
7acdcc2ebc
Merge branch 'master' into add-more-example
2020-04-22 19:50:23 +07:00
hathach
1fc7f54a8a
added swo as logger
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tested with feather nrf52840 + jlink
2020-04-22 19:18:03 +07:00
hathach
afc4042375
add LOGGER option to use rtt
...
update example readme for debug log. Update bug template to ask for LOG
as well.
2020-04-22 17:08:41 +07:00
hathach
e4570c35f7
add uart for ea4357
2020-04-20 00:27:35 +07:00
Ha Thach
1f69807621
Merge pull request #354 from hathach/cxd56-disconnect-connect
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Cxd56 disconnect connect
2020-04-17 13:12:47 +07:00
hathach
50be9d7c3a
mass rename tud/dcd_irq_handler to tud/dcd_init_handler
2020-04-17 12:27:53 +07:00
hathach
89f99426fc
add code for disconnect/connect (not tested)
2020-04-17 11:48:49 +07:00
hathach
989cca5b1a
update per review
2020-04-17 09:29:02 +07:00
hathach
bb2669fbc0
add dfu generate target for fomu
2020-04-16 22:24:48 +07:00
hathach
a009775745
dcd disconnect/connect for transdimension ip
2020-04-16 16:56:16 +07:00
Ha Thach
04a06ec401
Merge branch 'master' into refactor-irqhandler
2020-04-11 15:49:34 +07:00
hathach
d8d5902ccb
change saola-1 led to pin 18 by default
2020-04-10 15:44:50 +07:00
hathach
cefbd9579c
add neopixel led strip driver for saola, make saola as an component
2020-04-09 11:02:16 +07:00
hathach
40e23672ff
rename hal_dcd_isr to dcd_irq_handler for fomu
2020-04-08 16:47:20 +07:00
hathach
e879ad1e6f
move irq from msp430
2020-04-08 16:42:36 +07:00
hathach
8f17945b67
move irq for stm32 synopsys
2020-04-08 16:37:09 +07:00
hathach
9014ca5528
move irq for stm32 fsdev
2020-04-08 16:26:14 +07:00
hathach
fc9170b2c1
clean up
2020-04-08 15:15:52 +07:00
hathach
70df1aff13
add TODO for saola on-board neopixel
2020-04-08 15:00:16 +07:00
hathach
a2dee7fb50
rename saola to saola_1
2020-04-07 23:07:25 +07:00
hathach
6a9f971882
add saola button pin support, esp32 build with board_test
2020-04-07 13:42:48 +07:00
hathach
a344427e3f
fix CROSS_COMPILE for esp32s2
2020-04-06 20:39:20 +07:00
hathach
06377a341b
add tud_irq_handler() for all lpc ip3511 (13, 15, 11)
2020-04-06 18:00:37 +07:00
hathach
138965d1d1
add tud_irq_handler() to all NUC board
2020-04-06 17:43:56 +07:00
hathach
4179334aca
call tud_irq_handler() for all nrf5x board
2020-04-06 17:35:11 +07:00
hathach
dc4bf02dcb
mass rename tud_isr to tud_irq_handler
2020-04-06 17:04:49 +07:00
hathach
2d6d298302
move irqhandler to application
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tud_isr() must be called by application to forward the irqhandle to the
stack
2020-04-06 14:11:45 +07:00
hathach
748cc88769
add saola board.mk
2020-04-03 12:20:06 +07:00
hathach
19f977a274
add esp32s2 saola bsp
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update cdc_msc_freertos main.c to work with esp32s2
add CMake file
2020-04-01 20:24:46 +07:00
Ha Thach
a582674b91
Merge pull request #312 from hathach/develop
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house keeping work
2020-03-29 00:40:36 +07:00
Nathan Conrad
3926b28faa
Update UARTs for stm32f4xx discovery boards. Other minor cleanups.
2020-03-28 12:05:30 -04:00
hathach
ad2824df8b
add ENTRY(Reset_Handler) to linker of samd21 and samd51 board
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fix #303
2020-03-28 22:25:07 +07:00
Nathan Conrad
4191363c55
Update F4 BSP with new HAL config
2020-03-28 10:58:36 -04:00
Nathan Conrad
07c1ce76b8
Update F3 BSP for new HAL
2020-03-28 10:58:36 -04:00
Nathan Conrad
62a68034d9
Update F0 BSP for new HAL
2020-03-28 10:58:36 -04:00
