1178 Commits

Author SHA1 Message Date
hathach
7e68894726 grouping stm32L4 family in bsp 2021-11-02 16:10:40 +07:00
hathach
b809429873 minor clean up 2021-11-02 14:51:15 +07:00
hathach
aa682d7301 add fix for stm32l4 (version 3.10a) which generate transfer complete when setup recieved and control out data complete 2021-11-02 13:52:30 +07:00
hathach
215e0595ab change F207 to use new dwc2 2021-10-31 00:09:40 +07:00
hathach
b85a6898af remove dcd_efm32 2021-10-30 20:45:58 +07:00
hathach
9cd5a87c64 add support for EFM32GG
merge GG12 GG12 to simply OPT_MCU_EFM32GG
2021-10-30 20:42:55 +07:00
hathach
660e8b8c88 skip snpsid check for gd32, abstract phyfs turnaround, set max timeout calibration.
still has issue with gd32 with msc (does work with running with rtt as
log).
2021-10-29 16:08:19 +07:00
hathach
6c67fc4125 correctly init hs phy for bcm 2021-10-29 00:53:30 +07:00
hathach
7def380058 support bcm2711 on pi4, enhance dcd init with utmi and ulpi hs phy 2021-10-28 12:52:18 +07:00
Gordon McNab
6a658007a5 Changes to use ft90x-sdk as submodule or installed SDK from toolchain. 2021-10-27 12:30:51 +01:00
hathach
49aa69a301 update bcm dcd 2021-10-26 23:57:48 +07:00
hathach
07829510e7 Merge branch 'tannewt-rpi' into generalize-synopsys-dwc2 2021-10-26 23:43:35 +07:00
hathach
9f1cd1a753 add synopsys id check, rename GCCFG_* to STM32_GCCFG-* 2021-10-26 23:10:26 +07:00
hathach
bb5dab5c2e add hw config struct 2021-10-26 22:48:01 +07:00
hathach
68fa9d4064
enhance fifo read/write 2021-10-26 13:56:56 +07:00
hathach
5d05f8758f
more clean up 2021-10-26 13:36:43 +07:00
hathach
4ebfd00d67
clean up 2021-10-26 13:33:40 +07:00
hathach
de413183d4
use dwc2->epin 2021-10-26 13:07:00 +07:00
hathach
e7655a7567
update the access epout 2021-10-26 13:02:26 +07:00
hathach
34844c9061
use dwc2->fifo[] 2021-10-26 12:53:29 +07:00
hathach
5e1a031800
complete dwc2 regs struct 2021-10-26 12:22:41 +07:00
hathach
3755814f57
add epin, epout to dwc2 regs 2021-10-26 11:49:59 +07:00
hathach
8df078dc9e
more rename 2021-10-26 11:11:46 +07:00
hathach
7369d2441d
update dwc2_type 2021-10-26 00:55:24 +07:00
hathach
460052c8a0
spacing 2021-10-25 21:20:58 +07:00
suda-morris
7d0d6f85f2 update dcd_esp32sx with correct include list 2021-10-25 21:53:14 +08:00
hathach
dbd31895bc
change usage of TU_CHECK_MCU() to prevent macro conflict 2021-10-25 17:04:03 +07:00
hathach
85e18b9172
house keeping 2021-10-25 15:58:12 +07:00
hathach
4ccf60954d
moving esp32s2 to dwc2, abstract dwc2_set_turnaround() 2021-10-25 15:51:41 +07:00
hathach
61c80840c3
update dwc int enable/disable 2021-10-25 00:40:21 +07:00
hathach
4ab931a361
more clean up 2021-10-25 00:23:18 +07:00
hathach
0e7c103e98
minor rename 2021-10-25 00:11:17 +07:00
hathach
32742571da
switch gd32 and stm32f4 to use new dwc2 driver 2021-10-25 00:06:57 +07:00
hathach
06de6b725c
adding generalized dwc2 driver 2021-10-24 23:24:46 +07:00
Ha Thach
55e0b5882a
Merge pull request #1160 from cr1901/msp-fix
msp430x5xx: Set base of transmit_packet buffer earlier to avoid incre…
2021-10-24 17:28:11 +07:00
hathach
109b7a6661 more wMaxPacketSize 2021-10-24 14:39:02 +07:00
hathach
5af989384b remove ep descriptor wMaxPacketSize bitfield due to endian issue 2021-10-24 13:11:21 +07:00
William D. Jones
07c74c76d0 msp430x5xx: Set base of transmit_packet buffer earlier to avoid incrementing past unsent data. 2021-10-23 14:04:44 -04:00
Ha Thach
311c05b401
Merge branch 'master' into fix-warnings 2021-10-23 21:23:56 +07:00
Scott Shawcroft
2ef200003d
Update broadcom library 2021-10-22 09:31:24 -07:00
Scott Shawcroft
35b62810c3
Update submodule 2021-10-22 09:00:42 -07:00
hathach
5e437ee186
pi cm4 enumerated as full speed device 2021-10-22 21:55:15 +07:00
Ha Thach
4bfab30c02
Merge pull request #1139 from hathach/release-0.12.0
update changelog and increase version for 0.12.0
2021-10-19 13:27:53 +07:00
hathach
826b34a8ac enable -Wnull-dereference 2021-10-18 00:13:40 +07:00
hathach
099d3b377f add volatile to EPx_REGS for -Wcast-qual
since gcc does difference between volatile struct and member when
casting pointer
2021-10-17 17:33:14 +07:00
hathach
31cd366935 more -Wcast-qual 2021-10-17 17:32:03 +07:00
hathach
a5f516893b more with -Wcast-qual 2021-10-17 16:36:53 +07:00
hathach
0b249618b0 fix -Wcast-qual 2021-10-15 23:54:31 +07:00
Jerzy Kasenberg
bf4b133084 dcd_da146xx: Drop unexpected data
USB3CV tool verifies MSC device by sending too short or
too long packets.
In case of too long packets (msc_device requested 31 bytes
but incoming data had 32 bytes) extra byte(s) were left in
FIFO resulting in some data mismatch later on.

Now if more data is received in packet that expected extra
bytes are just dropped.
2021-10-15 12:02:15 +02:00
Jerzy Kasenberg
49aa0b72a8 dcd_da146xx: Fix EPIN stall notification handling
Normal TX handler for IN non-0 endpoints is called during
outgoing transfer or just after it was finished.
It may need to fill TX fifo with same data if TX_DONE is present
but ACK_STAT is not.
It may need to fill more data when called during transfer.
But it may also be called when STALL was sent.
In this case TX_DONE is set ACK_STAT is not, just like for packets
that were sent but no ACK was received.
Code was trying to send something again. There was nothing to send
so empty ZLP was scheduled for stalled endpoint.
This ZLP was later send to host where valid response was required.

This change checks if notification was for STALL endpoint and
does not try to fill TX FIFO in that case.
2021-10-15 12:02:15 +02:00