hathach
2ed027f2bd
use stock core_riscv.h for ch32 v2 v3
2024-06-14 12:51:28 +07:00
hathach
927015baae
wch usbfs/usbhs need to specify which driver to use. for v307 default to highspeed
2024-05-24 11:38:44 +07:00
hathach
953e3bd634
- minor update to ep_set_response_and_toggle/xfer_data_packet
...
- merge USBHS_ISO_ACT_FLAG, USBHS_TRANSFER_FLAG handler since they are similar
- improve uart output
- add note for link speed in bus reset
2024-05-21 17:50:50 +07:00
hathach
b19295c1c1
use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEED
2024-05-20 17:26:04 +07:00
hathach
5fee292606
temp code
2024-05-20 11:54:48 +07:00
hathach
2a67ce773d
change default risv-gcc to riscv-none-elf- and add _zicsr extension
...
add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM
update to use openocd with wlinke adapter
2024-05-16 19:18:43 +07:00
Matthew Tran
db60fa1c63
add CH32V20x USB OTG/FS driver
2024-05-15 20:01:00 +07:00
Ha Thach
ba6babf570
Rework ci ( #2631 )
...
* add name field to usbd_class_driver_t
* ci: use set matrix py script
* add riscv32 and cmake support for ch32v307, fomu, gd32vf103
* update build_cmake.py to take --family --board --toolchain
* separate hil test to its own workflow
* move esp32 board into separated hil json
* add make build to ci
* remov build_make.py
* build.py support esp32 board
* setup toolchain support esp-idf
* fix missing click
* merge family in matrix build to reduce jobs
* skip cifuzz since it still has issue with get_deps and click
2024-05-09 20:43:46 +07:00
Ha Thach
0601d174b1
Merge branch 'master' into feature/ch32f20x
2023-11-24 11:33:34 +07:00
hathach
82880eecbd
make nanolib linking explicitly by each family/board
2023-11-23 12:43:13 +07:00
denis.krasutski
ce627f4318
feat(ch32f20x): add support of ch32f20x
2023-10-06 13:04:54 +03:00
hathach
a5768f52b4
more board_api.h rename
2023-08-03 15:50:52 +07:00
hathach
4493b838d9
rename ch32v307 and tm4c123 to use underscore
2023-08-03 15:35:01 +07:00
hathach
3623ba1884
fix trailing space and new line
...
temporarily disable codespell
2023-03-17 16:12:49 +07:00
hathach
ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
...
also fix trailing spaces
2023-03-16 23:11:11 +07:00
hathach
160d64b00a
minor clean up. ch32v307 has issue with uart LOG=2 (skipping characters)
2023-01-12 15:34:29 +07:00
hathach
f05f81e8b3
add button support
2023-01-12 15:19:26 +07:00
hathach
65f7a8006c
rename board to lower case ch32v307v-r1-1v0
2023-01-12 13:31:36 +07:00
hathach
e6a3cfb350
rename link file
2023-01-12 13:12:37 +07:00
hathach
658897cf4e
fix redundant-decls warnings with USART_Printf_Init()
2023-01-12 12:30:18 +07:00
hathach
e61d4aefe6
rename driver with dcd_ to be consitent with other ports
2023-01-12 12:08:56 +07:00
hathach
3cc6cece07
add note for openocd with wch, also add wch-riscv.cfg
2023-01-12 10:25:48 +07:00
hathach
a7e1de1e83
temporarily suppress redundant-decls due to USART_Printf_Init()
...
fix codespell
2023-01-08 00:02:25 +07:00
Greg Davill
a09c1648f5
Fix typo
2022-03-22 23:31:20 +10:30
Greg Davill
1d254be1a4
Increase stack size to 4096 bytes
2022-03-22 16:03:53 +10:30
Greg Davill
fccbcfc889
Add WCH CH32V307 port
...
Add WCH mcu submodule
Add CH32V307V-R1-1v0 bsp
2022-03-22 00:30:46 +10:30
