5918 Commits

Author SHA1 Message Date
hathach
51acc3e1b9 update g4 bsp 2021-12-09 12:42:08 +07:00
Greg Steiert
e72a6e90b9 added support for building uf2 file 2021-12-08 15:24:14 -08:00
Greg Steiert
59dcf2062f adding support for KUIIC board 2021-12-08 14:31:44 -08:00
Ha Thach
6bf7fba2a4
Merge pull request #1221 from kasjer/kasjer/fix-nrf5x-vbus-race-condition
nrf5x: Fix race condition during startup
2021-12-09 00:44:44 +07:00
Gordon McNab
21fa7ea468 Correct path for using the ft90x-sdk submodule (BRTSG-FOSS / ft90x-sdk). Default to ft90x-sdk instead of pre-built library. 2021-12-08 13:56:23 +00:00
Gordon McNab
bcbcdf87de Fix spelling mistakes and verify endpoint numbering. 2021-12-08 11:24:39 +00:00
Gordon McNab
79f1f4e171 Revert "Merge in upstream changes"
This reverts commit fa06bd01c97a3a14215ea145764c09aecaa0dd79.
2021-12-08 11:17:05 +00:00
Valentin Milea
ae970ba2e2 Handle xfer events before closing EP 2021-12-08 12:34:00 +02:00
Gordon McNab
fa06bd01c9 Merge in upstream changes
Merge upstream changes and expand example support to hid examples.
2021-12-08 10:05:32 +00:00
Gordon McNab
45869958f6 Add FT9xx to more examples which support High-Speed 2021-12-08 10:03:33 +00:00
Gordon McNab
5039a5e54c Update code to implement changes from upstream master 2021-12-08 09:34:29 +00:00
Gordon McNab
9a7db98593 Merge branch 'master' into port-ft90x 2021-12-08 08:36:43 +00:00
Jerzy Kasenberg
21db2351fd nrf5x: Fix race condition during startup
When NRF5x device is reset by software (after DFU for example),
power event is ready from the beginning.
When power interrupt is triggered before tud_init() finished
USBD_IRQn is enabled before it would be enabled in tud_init().
This in turn may result in BUS RESET event being sent from
USB interrupt to USB task when queue is not initialized yet.
This scenario often happens in Mynewt build where queue creation
takes more time.

To prevent this scenario USBD_IRQn is not enabled in power event
interrupt handler before dcd_init() was called.
2021-12-08 08:27:27 +01:00
Yunhao Tian
527036b1f5 Initialize MMU if we are executing from DDR 2021-12-08 13:39:27 +08:00
hathach
cd76193f3c try updating clock configure for g4 nucleo (not work yet) 2021-12-08 10:37:46 +07:00
Yunhao Tian
43621ab9ed Update README 2021-12-07 22:58:19 +08:00
Yunhao Tian
75f7fb3d9d Add mksunxi tool to make flashable image 2021-12-07 22:53:52 +08:00
Valentin Milea
36e69b86bf Remove buffer reclaim logs 2021-12-07 15:35:30 +02:00
Ha Thach
cde824f17f
Merge pull request #1222 from scoudreau/swo_logger
Remove unused-parameter errors when LOGGER=swo
2021-12-07 19:53:27 +07:00
Ha Thach
c157837878
Merge pull request #1213 from kkitayam/add_hcd_for_msp_exp432e401y
Add a HCD driver for MSP-EXP432E401Y
2021-12-07 19:24:41 +07:00
hathach
a5251cb86b skip host ci for tm4c due to sram overflow 2021-12-07 17:14:20 +07:00
hathach
8e0400d531 change uart baudrate for tm4c123 to 115200 2021-12-07 16:28:24 +07:00
hathach
03835c8183 move hcd_musb.c include to family.mk 2021-12-07 16:27:48 +07:00
Valentin Milea
ef879e8a8a Support disabling feedback format correction #1234 2021-12-06 18:49:58 +02:00
Yunhao Tian
96979a2c4a Fix handling of RXRDY bit 2021-12-06 19:56:27 +08:00
Ha Thach
f8288be03f
Merge pull request #1227 from kkitayam/fix_dcd_musb_buffer_overrun
Fix buffer overrun in dcd_musb driver
2021-12-06 00:43:25 +07:00
Yunhao Tian
1ffc366aa9 Change FIFO size to 4KB (not sure)
The datasheet says 2KB FIFO, but accroding to many
code examples, the F1C100s has at least 4KB of FIFO memory.
This is working with cdc_msc example,
but I'm not sure, this should be checked.
2021-12-05 22:40:05 +08:00
Yunhao Tian
f308603a3a Fix a typo that leads to incorrect RX handling 2021-12-05 22:31:09 +08:00
Yunhao Tian
702698ee29 Add FIFO size check 2021-12-05 18:18:41 +08:00
Yunhao Tian
64b81fd4d3 Close all EPs upon reset 2021-12-05 18:08:01 +08:00
Yunhao Tian
fa0e4d91f9 Save current EP before querying other EPs 2021-12-05 18:07:35 +08:00
Valentin Milea
48e1f6d899 Handle the closing of endpoints on RP2040 2021-12-04 16:04:48 +02:00
Yunhao Tian
28fb51c180 Add TODO to README 2021-12-04 18:08:23 +08:00
Yunhao Tian
68ca62dfd7 Add BSP support for F1C100s 2021-12-04 18:02:07 +08:00
Yunhao Tian
dff54d854d Modify sunxi_musb code 2021-12-04 17:18:39 +08:00
kkitayam
7137a0a92f Fix buffer overrun at pipe_read_packet() 2021-12-04 01:25:34 +09:00
kkitayam
81285273a6 Fix memory overrun at pipe_read_packet() 2021-12-04 01:18:42 +09:00
Ha Thach
6ecd93eb60
Merge branch 'master' into add_hcd_for_msp_exp432e401y 2021-12-03 00:30:09 +07:00
Ha Thach
3e9bb3bee1
Merge pull request #1225 from perigoso/doc-requirements
after commit: eae4132 this dependency is no longer required
2021-12-03 00:27:37 +07:00
Rafael Silva
c52c9cda91 after commit: eae4132 this dependency is no longer required
Signed-off-by: Rafael Silva <perigoso@riseup.net>
2021-12-02 10:24:19 +00:00
Ha Thach
6f0c2cf0d8
Merge pull request #1224 from hathach/chipidea-controller
rename transdimension to chipidea
2021-12-02 14:10:24 +07:00
hathach
94c35de0d2 minor doc update 2021-12-02 13:19:27 +07:00
Ha Thach
821c0a9f38
Merge pull request #1223 from hathach/fix-s3-ci
temporarily skip s3 build on ci
2021-12-02 12:48:31 +07:00
hathach
1d1e75236c temporarily skip s3 build on ci 2021-12-02 12:02:25 +07:00
hathach
369f11fe5c fix ci 2021-12-02 11:50:28 +07:00
hathach
eae4132fbb update supported doc 2021-12-02 11:31:27 +07:00
hathach
207c60d055 more chipidea 2021-12-02 00:03:44 +07:00
hathach
83dc3e25f0 more work to abstract chipidea driver 2021-12-01 23:30:09 +07:00
hathach
61a9e125db more ci abstract 2021-12-01 23:19:17 +07:00
Sebastien COUDREAU
c9d9bfab92 Remove unused-parameter errors when LOGGER=SWO 2021-12-01 17:10:31 +01:00