13 Commits

Author	SHA1	Message	Date
hathach	8ebdf2b097	ip3511 correct buffer offset, nbytes layout for highspeed port1 ... able to get passed enumeration and up to READ10	2021-04-26 14:43:58 +07:00
hathach	b15d126d59	lpc55 improve multiple controller support ... port1 highspeed requires USB_RAM	2021-04-24 13:36:05 +07:00
hathach	7089df2088	lpc55 correct bus_reset with highspeed on support controller ... correct hsphy init for family	2021-04-24 12:19:13 +07:00
hathach	8642c2045c	update dcd ip3511 for better multiple rhport support	2021-04-24 10:44:14 +07:00
hathach	5c5d4b189f	add lpc55 uart write	2021-04-22 19:24:19 +07:00
hathach	253430a765	add example specific DEPS_SUBMODULES	2021-03-18 16:28:44 +07:00
hathach	ed8f117dd1	explicitly add dcd source file without vendor/family	2021-03-17 16:52:07 +07:00
hathach	7afe1d9e16	clean up ... some how lpc55 ci cannot build without pre-checkout lib/sct_neopixel	2021-03-05 22:49:29 +07:00
hathach	7d877e286a	update DEPS_SUBMODULES to optimize ci	2021-03-05 22:24:03 +07:00
hathach	590d8d4d5c	rename FAMILY_SUBMODULES to DEPS_SUBMODULES	2021-03-04 22:53:02 +07:00
hathach	9bc921b342	update family submodule ... temporarily disable other orphaned and esp32s2 build	2021-03-01 20:48:30 +07:00
hathach	e9059b5d84	added lpcxpresso 55s28	2021-03-01 12:31:31 +07:00
hathach	2e42858537	move lpc55 into its own family	2021-03-01 00:39:48 +07:00