9 Commits

Author	SHA1	Message	Date
hathach	96a9eca6a0	move VBUS sense out of dcd_synosys to bsp	2019-12-11 14:03:36 +07:00
hathach	f638594536	move -flto to board.mk ... current board that doesn work with flto is spresense and mimxrt10xx (due to xip image_vector_table is optimized out).	2019-11-20 16:06:40 +07:00
hathach	6f952a8e84	fix missing board uart read/write()	2019-10-24 12:20:06 +07:00
hathach	6183dbd0ce	add -Wextra for more warnings to example ... non-stack warning (probably mcu driver) should be suppressed in the board.mk	2019-09-27 00:15:43 +07:00
hathach	ff7261600c	ported stm32f2, added board stm32f207zg nucleo ... close #127	2019-09-12 10:41:03 +07:00
hathach	de659be83e	tested all the stm32f4 board, work great	2019-09-11 17:37:23 +07:00
William D. Jones	1385d7c494	stm32: Refactor so F4 and H7 use a single Synopsys IP source file.	2019-09-09 10:48:14 -04:00
hathach	4663f9084d	ported board stm32f412g discovery ... - added soft connect for enable pull up register dcd stm32f4	2019-09-08 21:57:02 +07:00
hathach	8fd7836ff6	added board stm32f412 discovery, board_test exmaple run	2019-09-06 17:31:37 +07:00