17 Commits

Author	SHA1	Message	Date
hathach	04f1a34c39	add rusb2_common.c for dynami irq	2023-08-01 17:03:07 +07:00
hathach	40833b585b	enable flto for ra makefile ... - remove ra from ci make build since it is already in cmake ci	2023-08-01 15:44:54 +07:00
hathach	789e478d4d	add portenta c33 bsp, add flash by dfu-util	2023-08-01 13:16:37 +07:00
hathach	feb58ebd54	add uno r4 wih FLASH_IMAGE_START=0x4000, running but interrupt (systick) does not seems to work	2023-07-28 19:01:12 +07:00
hathach	88478a9d05	add PORT selection for makefile	2023-07-07 16:24:22 +07:00
hathach	f308435b64	update ra type to include usbhs registers	2023-07-06 09:34:33 +07:00
hathach	04b1a67898	Merge branch 'master' into renesas_ra_hs_rebased	2023-07-03 13:09:43 +07:00
hathach	50381f7b4c	refactor to match fsp_cfg	2023-07-01 17:09:09 +07:00
hathach	22fb66436d	update linker	2023-07-01 16:40:47 +07:00
hathach	99e75e6a8a	rework ra build	2023-07-01 12:41:12 +07:00
hathach	3cb4d73899	clean up ra makefile	2023-06-30 14:52:04 +07:00
hathach	eb7fcf1b74	add CPU_CORE for all family	2023-06-24 18:38:41 +07:00
Martino Facchin	be54870c3b	renesas_ra: add support for HS port	2023-05-03 10:02:24 +02:00
hathach	ffdffc7e06	rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC ... also fix trailing spaces	2023-03-16 23:11:11 +07:00
hathach	bc2127b330	rename file link to rusb2	2023-03-16 11:03:53 +07:00
hathach	7428a16d2d	remove ra submodules	2023-03-11 08:23:21 +07:00
Rafael Silva	4c89776a27	add renesas ek-ra4m3 board port ... Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>	2022-06-02 09:35:30 +01:00